Leaked source code of windows server 2003
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  1. //===========================================================================
  2. //
  3. // THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
  4. // KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
  5. // IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR
  6. // PURPOSE.
  7. //
  8. // Copyright (c) 1996 - 2000 Microsoft Corporation. All Rights Reserved.
  9. //
  10. //===========================================================================
  11. /*++
  12. Module Name:
  13. Device.c
  14. Abstract:
  15. This file contains code to read/write request from the DCam.
  16. Author:
  17. Yee J. Wu 9-Sep-97
  18. Environment:
  19. Kernel mode only
  20. Revision History:
  21. --*/
  22. #include "strmini.h"
  23. #include "ksmedia.h"
  24. #include "1394.h"
  25. #include "wdm.h" // for DbgBreakPoint() defined in dbg.h
  26. #include "dbg.h"
  27. #include "dcamdef.h"
  28. #include "dcampkt.h"
  29. #include "sonydcam.h"
  30. NTSTATUS
  31. DCamReadRegister(
  32. IN PIRB pIrb,
  33. PDCAM_EXTENSION pDevExt,
  34. ULONG ulFieldOffset,
  35. ULONG * pulValue
  36. )
  37. {
  38. NTSTATUS status;
  39. LARGE_INTEGER deltaTime;
  40. PIRP pIrp;
  41. //
  42. // Delay for camera before next request
  43. //
  44. ASSERT(pDevExt->BusDeviceObject != NULL);
  45. pIrp = IoAllocateIrp(pDevExt->BusDeviceObject->StackSize, FALSE);
  46. if (!pIrp) {
  47. ASSERT(FALSE);
  48. return (STATUS_INSUFFICIENT_RESOURCES);
  49. }
  50. //
  51. // Delay for camera before next request
  52. //
  53. if(KeGetCurrentIrql() < DISPATCH_LEVEL) {
  54. deltaTime.LowPart = DCAM_DELAY_VALUE;
  55. deltaTime.HighPart = -1;
  56. KeDelayExecutionThread(KernelMode, TRUE, &deltaTime);
  57. }
  58. pIrb->FunctionNumber = REQUEST_ASYNC_READ;
  59. pIrb->Flags = 0;
  60. pIrb->u.AsyncRead.DestinationAddress.IA_Destination_Offset.Off_High = INITIAL_REGISTER_SPACE_HI;
  61. pIrb->u.AsyncRead.DestinationAddress.IA_Destination_Offset.Off_Low = pDevExt->BaseRegister + ulFieldOffset;
  62. pIrb->u.AsyncRead.nNumberOfBytesToRead = sizeof(ULONG);
  63. pIrb->u.AsyncRead.nBlockSize = 0;
  64. pIrb->u.AsyncRead.fulFlags = 0;
  65. InterlockedExchange(&pIrb->u.AsyncRead.ulGeneration, pDevExt->CurrentGeneration);
  66. pDevExt->RegisterWorkArea.AsULONG = 0; // Initilize the return buffer.
  67. pIrb->u.AsyncRead.Mdl =
  68. IoAllocateMdl(&pDevExt->RegisterWorkArea, sizeof(ULONG), FALSE, FALSE, NULL);
  69. MmBuildMdlForNonPagedPool(pIrb->u.AsyncRead.Mdl);
  70. DbgMsg3(("\'DCamReadRegister: Read from address (%x, %x)\n",
  71. pIrb->u.AsyncRead.DestinationAddress.IA_Destination_Offset.Off_High,
  72. pIrb->u.AsyncRead.DestinationAddress.IA_Destination_Offset.Off_Low));
  73. status = DCamSubmitIrpSynch(pDevExt, pIrp, pIrb);
  74. if (status) {
  75. ERROR_LOG(("DCamRange: Error %x while trying to read from register\n", status));
  76. } else {
  77. *pulValue = pDevExt->RegisterWorkArea.AsULONG;
  78. DbgMsg3(("\'DCamReadRegister: status=0x%x, value=0x%x\n", status, *pulValue));
  79. }
  80. IoFreeMdl(pIrb->u.AsyncWrite.Mdl);
  81. IoFreeIrp(pIrp);
  82. return status;
  83. }
  84. NTSTATUS
  85. DCamWriteRegister(
  86. IN PIRB pIrb,
  87. PDCAM_EXTENSION pDevExt,
  88. ULONG ulFieldOffset,
  89. ULONG ulValue
  90. )
  91. {
  92. NTSTATUS status;
  93. LARGE_INTEGER deltaTime;
  94. PIRP pIrp;
  95. ASSERT(pDevExt->BusDeviceObject != NULL);
  96. pIrp = IoAllocateIrp(pDevExt->BusDeviceObject->StackSize, FALSE);
  97. if (!pIrp) {
  98. ASSERT(FALSE);
  99. return (STATUS_INSUFFICIENT_RESOURCES);
  100. }
  101. //
  102. // Delay for camera before next request
  103. //
  104. if(KeGetCurrentIrql() < DISPATCH_LEVEL) {
  105. deltaTime.LowPart = DCAM_DELAY_VALUE;
  106. deltaTime.HighPart = -1;
  107. KeDelayExecutionThread(KernelMode, TRUE, &deltaTime);
  108. }
  109. pIrb->FunctionNumber = REQUEST_ASYNC_WRITE;
  110. pIrb->Flags = 0;
  111. pIrb->u.AsyncWrite.DestinationAddress.IA_Destination_Offset.Off_High = INITIAL_REGISTER_SPACE_HI;
  112. pIrb->u.AsyncWrite.DestinationAddress.IA_Destination_Offset.Off_Low = pDevExt->BaseRegister + ulFieldOffset;
  113. pIrb->u.AsyncWrite.nNumberOfBytesToWrite = sizeof(ULONG);
  114. pIrb->u.AsyncWrite.nBlockSize = 0;
  115. pIrb->u.AsyncWrite.fulFlags = 0;
  116. InterlockedExchange(&pIrb->u.AsyncWrite.ulGeneration, pDevExt->CurrentGeneration);
  117. pDevExt->RegisterWorkArea.AsULONG = ulValue; // Initilize the return buffer.
  118. pIrb->u.AsyncWrite.Mdl =
  119. IoAllocateMdl(&pDevExt->RegisterWorkArea, sizeof(ULONG), FALSE, FALSE, NULL);
  120. MmBuildMdlForNonPagedPool(pIrb->u.AsyncWrite.Mdl);
  121. DbgMsg3(("\'DCamWriteRegister: Write to address (%x, %x)\n", pIrb->u.AsyncWrite.DestinationAddress.IA_Destination_Offset.Off_High, pIrb->u.AsyncWrite.DestinationAddress.IA_Destination_Offset.Off_Low));
  122. status = DCamSubmitIrpSynch(pDevExt, pIrp, pIrb);
  123. if (status) {
  124. ERROR_LOG(("\'DCamWriteRegister: Error %x while trying to write to register\n", status));
  125. }
  126. IoFreeMdl(pIrb->u.AsyncWrite.Mdl);
  127. IoFreeIrp(pIrp);
  128. return status;
  129. }