Leaked source code of windows server 2003
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6.5 KiB

  1. dnl---------------------------------------------------------------------------
  2. dnl
  3. dnl ramppix.mh
  4. dnl
  5. dnl Ramp pixel processing macros used in specialized and general
  6. dnl span processing.
  7. dnl
  8. dnl Copyright (C) Microsoft Corporation, 1997.
  9. dnl
  10. dnl---------------------------------------------------------------------------
  11. dnl
  12. dnl ATTENTION
  13. dnl What we were doing.
  14. dnl Note that this does not have much precision, esp on UoW and VoW
  15. dnl which was causing problems in Quake. There are faster alternatives
  16. dnl to this (like getting UoW, VoW in a better range) that we can look at
  17. dnl when we get to optimizing this.
  18. dnl define(`d_RpWTimesUVoW', `imul32h(($1)<<4, ($2)<<8)')dnl
  19. define(`d_RpWTimesUVoW', `imul32h_s20($1, $2)')dnl
  20. dnl
  21. dnl d_RpTexelAddrNoLOD
  22. dnl
  23. dnl Texel addressing code. Assumes pTex is set to the current texture.
  24. dnl
  25. define(`d_RpTexelAddrNoLOD',
  26. `// iU00, iV00 must be 16 bit, since the mask functions below are 16 bit
  27. // existing code seems to always wrap
  28. INT16 iU00, iV00;
  29. iU00 = (INT16)(pCtx->SI.iU1 >> iShiftU0) & uMaskU0;
  30. iV00 = (INT16)(pCtx->SI.iV1 >> iShiftV0) & uMaskV0;')dnl
  31. dnl
  32. dnl d_RpTexelAddrLOD
  33. dnl
  34. dnl Texel addressing code. Assumes pTex is set to the current texture.
  35. dnl LOD is used in addressing.
  36. dnl
  37. define(`d_RpTexelAddrLOD',
  38. `INT16 iLOD0;
  39. iLOD0 = (INT16)(min(max(pS->iLOD >> 11, 0), pTex->cLOD));
  40. INT16 iShiftU0;
  41. iShiftU0 = pTex->iShiftU - iLOD0;
  42. INT16 iShiftV0;
  43. iShiftV0 = pTex->iShiftV - iLOD0;
  44. // iU00, iV00 must be 16 bit, since the mask functions below are 16 bit
  45. INT16 iU00;
  46. iU00 = (INT16)(pCtx->SI.iU1 >> (TEX_FINAL_SHIFT - iShiftU0));
  47. INT16 iV00;
  48. iV00 = (INT16)(pCtx->SI.iV1 >> (TEX_FINAL_SHIFT - iShiftV0));
  49. UINT16 uMaskU0;
  50. uMaskU0 = pTex->uMaskU >> iLOD0;
  51. UINT16 uMaskV0;
  52. uMaskV0 = pTex->uMaskV >> iLOD0;
  53. // existing code seems to always wrap
  54. iU00 &= uMaskU0;
  55. iV00 &= uMaskV0;')dnl
  56. dnl
  57. dnl d_RpDither
  58. dnl
  59. dnl Dithering code. Assumes iIIdx is the current index.
  60. dnl
  61. define(`d_RpDither',
  62. `// Add on 0 or 1 depending on the
  63. // fractional part of the intensity
  64. iIIdx += (INT32)(((iIdx >> 8) & 0xff) >
  65. g_uRampDitherTable[pCtx->SI.uDitherOffset]);')dnl
  66. dnl
  67. dnl d_RpAlphaTest
  68. dnl
  69. dnl Alpha test code. Can be specialized or general.
  70. dnl Assumes iMapIdx is the texture map index if texture is used.
  71. dnl
  72. dnl $1 is one of NoTex Tex Gen.
  73. dnl $2 is the no-pixel target to jump to.
  74. dnl
  75. define(`d_RpAlphaTest',
  76. `INT32 Alpha;
  77. ifelse($1, `Gen',
  78. ` if (pCtx->cActTex != 0)
  79. {
  80. ')dnl
  81. ifelse(eval(ifelse($1, `Tex', `1', `0') || ifelse($1, `Gen', `1', `0')), `1',
  82. ` Alpha = RGBA_GETALPHA(iMapIdx);
  83. ')dnl
  84. ifelse($1, `Gen',
  85. ` }
  86. else
  87. {
  88. ')dnl
  89. ifelse(eval(ifelse($1, `NoTex', `1', `0') || ifelse($1, `Gen', `1', `0')), `1',
  90. ` Alpha = pS->iIdxA >> INDEX_COLOR_SHIFT;
  91. ')dnl
  92. ifelse($1, `Gen',
  93. ` }
  94. ')dnl
  95. // Determine whether this pixel is transparent or not.
  96. if ((Alpha & 0xff) <= g_uRampDitherTable[pCtx->SI.uDitherOffset])
  97. {
  98. goto $2;
  99. }')dnl
  100. dnl
  101. dnl d_RpZInit16
  102. dnl
  103. dnl 16-bit Z test initialization.
  104. dnl
  105. define(`d_RpZInit16',
  106. `UINT16 uZS, uZB;')dnl
  107. dnl
  108. dnl d_RpZTest16Any
  109. dnl
  110. dnl 16-bit arithmetic Z test handling.
  111. dnl
  112. dnl $1 is the no-pixel target to jump to.
  113. dnl
  114. define(`d_RpZTest16Any',
  115. `// 16 bit unsigned format
  116. uZS = uZ >> 15;
  117. uZB = *((UINT16*)pZ);
  118. uZ += iDZDX;
  119. if (!ZCMP16(pCtx, uZS, uZB))
  120. {
  121. goto $1;
  122. }')dnl
  123. dnl
  124. dnl d_RpZTest16LE
  125. dnl
  126. dnl 16-bit less-equal Z test handling.
  127. dnl
  128. dnl $1 is the no-pixel target to jump to.
  129. dnl
  130. define(`d_RpZTest16LE',
  131. `// 16 bit unsigned format
  132. uZS = uZ >> 15;
  133. uZB = *((UINT16*)pZ);
  134. uZ += iDZDX;
  135. if (uZS > uZB)
  136. {
  137. goto $1;
  138. }')dnl
  139. dnl
  140. dnl d_RpZWrite16
  141. dnl
  142. dnl 16-bit deferred Z write handling.
  143. dnl Assumes RpZInit16 and RpZTest16 have already been generated.
  144. dnl
  145. dnl $1 is one of ZWrite Gen.
  146. dnl
  147. define(`d_RpZWrite16',
  148. `ifelse($1, `Gen',
  149. `if (pCtx->pdwRenderState[D3DRENDERSTATE_ZWRITEENABLE])
  150. {
  151. ')dnl
  152. *((UINT16*)pZ) = uZS;
  153. ifelse($1, `Gen',
  154. ` }
  155. ')dnl
  156. ')dnl
  157. dnl
  158. dnl d_RpSpecialWPerspStepTex
  159. dnl
  160. dnl Steps texture coordinates in perspective correct space.
  161. dnl
  162. define(`d_RpSpecialWPerspStepTexLOD',
  163. `pS->iUoW1 += pP->iDUoW1DX;
  164. pS->iVoW1 += pP->iDVoW1DX;
  165. pS->iLOD += pS->iDLOD;
  166. pS->iOoW += pP->iDOoWDX;
  167. INT32 iWn0 = pS->iW + pCtx->SI.iDW; // 1.15.16
  168. if (pCtx->SI.iSpecialW < 0)
  169. {
  170. INT32 iWn1;
  171. if (iWn0 < 0)
  172. {
  173. iWn0 = pS->iW >> 1; // use iW/2 as a guess, instead
  174. }
  175. INT32 iWnOld = iWn0 + 0x100; // make sure while fails first time
  176. INT32 iGiveUp = 7;
  177. while((abs(iWnOld - iWn0) > 0x20) && (iGiveUp-- > 0))
  178. {
  179. iWnOld = iWn0;
  180. iWn1 = imul32h(pS->iOoW, iWn0); // 1.31*1.15.16 = 1.16.47 >> 32 = 1.16.15
  181. iWn1 = (1L<<16) - iWn1; // 2.0 - iWn1
  182. while(iWn1 < 0)
  183. {
  184. iWn1=(iWn1+(1L<<15))>>1; // iWn1 = (iWn1 + 1.0)/2
  185. }
  186. iWn1 <<= 15; // 1.16.15 << 15 = 1.1.30
  187. iWn0 = imul32h(iWn1, iWn0)<<2; // 1.1.30 * 1.15.16 = 1.17.46 >> 32 = 1.17.14 << 2 = 1.15.16
  188. }
  189. }
  190. else
  191. {
  192. INT32 iWn1;
  193. iWn1 = imul32h(pS->iOoW, iWn0); // 1.31*1.15.16 = 1.16.47 >> 32 = 1.16.15
  194. iWn1 = (1L<<16) - iWn1; // 2.0 - iWn1
  195. iWn1 <<= 15; // 1.16.15 << 15 = 1.1.30
  196. iWn0 = imul32h(iWn1, iWn0)<<2; // 1.1.30 * 1.15.16 = 1.17.46 >> 32 = 1.17.14 << 2 = 1.15.16
  197. }
  198. pCtx->SI.iDW = iWn0 - pS->iW;
  199. pCtx->SI.iSpecialW += 1; // this is supposed to wrap past 0x7fff sometimes
  200. pS->iW = iWn0;
  201. pCtx->SI.iU1 = d_RpWTimesUVoW(pS->iW, pS->iUoW1);
  202. pCtx->SI.iV1 = d_RpWTimesUVoW(pS->iW, pS->iVoW1);')dnl
  203. dnl
  204. dnl d_RpAffineStepTex
  205. dnl
  206. dnl Steps texture coordinates linearly.
  207. dnl
  208. define(`d_RpAffineStepTexLOD',
  209. `pS->iUoW1 += pP->iDUoW1DX;
  210. pS->iVoW1 += pP->iDVoW1DX;
  211. pS->iLOD += pS->iDLOD;
  212. pCtx->SI.iU1 = pS->iUoW1>>TEX_TO_FINAL_SHIFT; // 1.11.20 >> 4 == 1.15.16
  213. pCtx->SI.iV1 = pS->iVoW1>>TEX_TO_FINAL_SHIFT;')dnl
  214. dnl
  215. dnl d_RpAffineStepTexNoLOD
  216. dnl
  217. dnl Steps texture coordinates linearly.
  218. dnl
  219. define(`d_RpAffineStepTexNoLOD',
  220. `pS->iUoW1 += pP->iDUoW1DX;
  221. pS->iVoW1 += pP->iDVoW1DX;
  222. pCtx->SI.iU1 = pS->iUoW1>>TEX_TO_FINAL_SHIFT; // 1.11.20 >> 4 == 1.15.16
  223. pCtx->SI.iV1 = pS->iVoW1>>TEX_TO_FINAL_SHIFT;')dnl