Leaked source code of windows server 2003
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  1. //----------------------------------------------------------------------------
  2. //
  3. // AMD64 register definitions.
  4. //
  5. // Copyright (C) Microsoft Corporation, 2000-2002.
  6. //
  7. //----------------------------------------------------------------------------
  8. #ifndef __AMD64_REG_H__
  9. #define __AMD64_REG_H__
  10. //
  11. // x86 common registers.
  12. //
  13. #define AMD64_RAX X86_NAX
  14. #define AMD64_RCX X86_NCX
  15. #define AMD64_RDX X86_NDX
  16. #define AMD64_RBX X86_NBX
  17. #define AMD64_RSP X86_NSP
  18. #define AMD64_RBP X86_NBP
  19. #define AMD64_RSI X86_NSI
  20. #define AMD64_RDI X86_NDI
  21. #define AMD64_RIP X86_NIP
  22. #define AMD64_EFL X86_NFL
  23. #define AMD64_CS X86_NCS
  24. #define AMD64_DS X86_NDS
  25. #define AMD64_ES X86_NES
  26. #define AMD64_FS X86_NFS
  27. #define AMD64_GS X86_NGS
  28. #define AMD64_SS X86_NSS
  29. #define AMD64_SEG_FIRST X86_NSEG_FIRST
  30. #define AMD64_SEG_LAST X86_NSEG_LAST
  31. //
  32. // AMD64 registers.
  33. //
  34. #define AMD64_R8 17
  35. #define AMD64_R9 18
  36. #define AMD64_R10 19
  37. #define AMD64_R11 20
  38. #define AMD64_R12 21
  39. #define AMD64_R13 22
  40. #define AMD64_R14 23
  41. #define AMD64_R15 24
  42. #define AMD64_CR0 25
  43. #define AMD64_CR2 26
  44. #define AMD64_CR3 27
  45. #define AMD64_CR4 28
  46. #define AMD64_CR8 29
  47. #define AMD64_DR0 30
  48. #define AMD64_DR1 31
  49. #define AMD64_DR2 32
  50. #define AMD64_DR3 33
  51. #define AMD64_DR6 34
  52. #define AMD64_DR7 35
  53. #define AMD64_GDTR 36
  54. #define AMD64_GDTL 37
  55. #define AMD64_IDTR 38
  56. #define AMD64_IDTL 39
  57. #define AMD64_TR 40
  58. #define AMD64_LDTR 41
  59. #define AMD64_KMXCSR 42
  60. #define AMD64_KDR0 43
  61. #define AMD64_KDR1 44
  62. #define AMD64_KDR2 45
  63. #define AMD64_KDR3 46
  64. #define AMD64_KDR6 47
  65. #define AMD64_KDR7 48
  66. // Floating-point registers:
  67. #define AMD64_FPCW 50
  68. #define AMD64_FPSW 51
  69. #define AMD64_FPTW 52
  70. #define AMD64_FPCTRL_FIRST AMD64_FPCW
  71. #define AMD64_FPCTRL_LAST AMD64_FPTW
  72. #define AMD64_ST0 53
  73. #define AMD64_ST1 54
  74. #define AMD64_ST2 55
  75. #define AMD64_ST3 56
  76. #define AMD64_ST4 57
  77. #define AMD64_ST5 58
  78. #define AMD64_ST6 59
  79. #define AMD64_ST7 60
  80. #define AMD64_ST_FIRST AMD64_ST0
  81. #define AMD64_ST_LAST AMD64_ST7
  82. // MMX registers:
  83. #define AMD64_MM0 61
  84. #define AMD64_MM1 62
  85. #define AMD64_MM2 63
  86. #define AMD64_MM3 64
  87. #define AMD64_MM4 65
  88. #define AMD64_MM5 66
  89. #define AMD64_MM6 67
  90. #define AMD64_MM7 68
  91. #define AMD64_MM_FIRST AMD64_MM0
  92. #define AMD64_MM_LAST AMD64_MM7
  93. // SSE registers:
  94. #define AMD64_MXCSR 69
  95. #define AMD64_XMM0 70
  96. #define AMD64_XMM1 71
  97. #define AMD64_XMM2 72
  98. #define AMD64_XMM3 73
  99. #define AMD64_XMM4 74
  100. #define AMD64_XMM5 75
  101. #define AMD64_XMM6 76
  102. #define AMD64_XMM7 77
  103. #define AMD64_XMM8 78
  104. #define AMD64_XMM9 79
  105. #define AMD64_XMM10 80
  106. #define AMD64_XMM11 81
  107. #define AMD64_XMM12 82
  108. #define AMD64_XMM13 83
  109. #define AMD64_XMM14 84
  110. #define AMD64_XMM15 85
  111. #define AMD64_XMM_FIRST AMD64_XMM0
  112. #define AMD64_XMM_LAST AMD64_XMM15
  113. #define AMD64_EAX 100
  114. #define AMD64_ECX 101
  115. #define AMD64_EDX 102
  116. #define AMD64_EBX 103
  117. #define AMD64_ESP 104
  118. #define AMD64_EBP 105
  119. #define AMD64_ESI 106
  120. #define AMD64_EDI 107
  121. #define AMD64_R8D 108
  122. #define AMD64_R9D 109
  123. #define AMD64_R10D 110
  124. #define AMD64_R11D 111
  125. #define AMD64_R12D 112
  126. #define AMD64_R13D 113
  127. #define AMD64_R14D 114
  128. #define AMD64_R15D 115
  129. #define AMD64_EIP 116
  130. #define AMD64_AX 117
  131. #define AMD64_CX 118
  132. #define AMD64_DX 119
  133. #define AMD64_BX 120
  134. #define AMD64_SP 121
  135. #define AMD64_BP 122
  136. #define AMD64_SI 123
  137. #define AMD64_DI 124
  138. #define AMD64_R8W 125
  139. #define AMD64_R9W 126
  140. #define AMD64_R10W 127
  141. #define AMD64_R11W 128
  142. #define AMD64_R12W 129
  143. #define AMD64_R13W 130
  144. #define AMD64_R14W 131
  145. #define AMD64_R15W 132
  146. #define AMD64_IP 133
  147. #define AMD64_FL 134
  148. #define AMD64_AL 135
  149. #define AMD64_CL 136
  150. #define AMD64_DL 137
  151. #define AMD64_BL 138
  152. #define AMD64_SPL 139
  153. #define AMD64_BPL 140
  154. #define AMD64_SIL 141
  155. #define AMD64_DIL 142
  156. #define AMD64_R8B 143
  157. #define AMD64_R9B 144
  158. #define AMD64_R10B 145
  159. #define AMD64_R11B 146
  160. #define AMD64_R12B 147
  161. #define AMD64_R13B 148
  162. #define AMD64_R14B 149
  163. #define AMD64_R15B 150
  164. #define AMD64_AH 151
  165. #define AMD64_CH 152
  166. #define AMD64_DH 153
  167. #define AMD64_BH 154
  168. #define AMD64_IOPL 200
  169. #define AMD64_OF 201
  170. #define AMD64_DF 202
  171. #define AMD64_IF 203
  172. #define AMD64_TF 204
  173. #define AMD64_SF 205
  174. #define AMD64_ZF 206
  175. #define AMD64_AF 207
  176. #define AMD64_PF 208
  177. #define AMD64_CF 209
  178. #define AMD64_VIP 210
  179. #define AMD64_VIF 211
  180. #define AMD64_SUBREG_BASE AMD64_EAX
  181. #endif // #ifndef __AMD64_AMD64_H__