Leaked source code of windows server 2003
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  1. // string.s: function to compare two strings
  2. // Copyright (c) 2000, Intel Corporation
  3. // All rights reserved.
  4. //
  5. // WARRANTY DISCLAIMER
  6. //
  7. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  8. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  9. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  10. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
  11. // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  12. // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  13. // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  14. // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  15. // OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
  16. // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  17. // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  18. //
  19. // Intel Corporation is the author of this code, and requests that all
  20. // problem reports or change requests be submitted to it directly at
  21. // http://developer.intel.com/opensource.
  22. //
  23. .file "strcmp.s"
  24. .section .text
  25. // -- Begin strcmp
  26. .proc strcmp#
  27. .global strcmp#
  28. .align 32
  29. .prologue
  30. strcmp:
  31. { .mib
  32. alloc r14=ar.pfs,1,7,0,8 //8 rotating registers, 7 locals
  33. .save pr, r11
  34. mov r11=pr //Save predicate register file
  35. brp.loop.imp .b1_4, .bw1 ;; // Put loop backedge target in TAR
  36. }
  37. .body
  38. // Setup for doing software pipelined loops
  39. { .mii
  40. mov r8=r33 // r8 = s2
  41. mov pr.rot=0x10000 // p16=1
  42. mov ar.ec=0
  43. } { .mfb
  44. mov r9=r32 // r9 = s1
  45. nop.f 0
  46. nop.b 0 ;;
  47. }
  48. .b1_4:
  49. { .mii
  50. ld1.s r37=[r9],1 // *s1 (r37,r38)
  51. cmp4.eq.unc p16,p0=r0,r0 // p16 = 1
  52. (p17) chk.s r38,.natfault1_0 //
  53. }
  54. .b1_5:
  55. { .mmi
  56. ld1.s r32=[r8],1 ;; // *s2 (r32,r33)
  57. (p17) cmp4.ne.and p16,p0=r38,r0 // *s1!=0 (p16,p17)
  58. (p17) chk.s r33,.natfault1_1 //
  59. }
  60. .bw1:
  61. { .mib
  62. (p17) cmp4.ne.and p16,p0=r33,r0 // *s2!=0 (p16,p17)
  63. (p17) cmp4.eq.and p16,p0=r38,r33 // *s1==*s2 (p16,p17)
  64. (p16) br.wtop.dptk .b1_4 ;; //
  65. }
  66. .b1_1:
  67. { .mii
  68. mov r8=r0 // return 0 for *s1 == *s2
  69. cmp4.geu.unc p0,p6=r38,r33 // do unsigned comparison *s1 : *s2
  70. cmp4.leu.unc p0,p7=r38,r33 ;;
  71. } { .mmi
  72. (p6) mov r8=-1 ;; // return -1 if *s1 < *s2
  73. (p7) mov r8=1 // return +1 if *s1 > *s2
  74. mov pr=r11,0x1003e
  75. } { .mib
  76. nop.m 0
  77. nop.i 0
  78. br.ret.sptk.many b0 ;;
  79. }
  80. .natfault1_0:
  81. add r9 = -2, r9;;
  82. ld1 r38 = [r9],2
  83. br.cond.sptk .b1_5;;
  84. .natfault1_1:
  85. add r8 = -2, r8;;
  86. ld1 r33 = [r8],2
  87. br.cond.sptk .bw1;;
  88. _2_1_2auto_size == 0x0
  89. // -- End strcmp
  90. .endp strcmp#
  91. // mark_proc_addr_taken strcmp;
  92. // End