Leaked source code of windows server 2003
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4.5 KiB

  1. /*++
  2. Copyright (c) 1995 Microsoft Corporation
  3. Module Name:
  4. fpufrags.h
  5. Abstract:
  6. Prototypes for floating-point instruction fragments.
  7. Author:
  8. 11-Jul-1995 BarryBo, Created
  9. Revision History:
  10. --*/
  11. FRAG0(FpuInit);
  12. FRAG1(FpuSaveContext, BYTE);
  13. FRAG0(F2XM1);
  14. FRAG0(FABS);
  15. FRAG1(FADD32, FLOAT); // FADD m32real
  16. FRAG1(FADD64, DOUBLE); // FADD m64real
  17. FRAG1IMM(FADD_STi_ST, INT); // FADD ST(i), ST = add ST to ST(i)
  18. FRAG1IMM(FADD_ST_STi, INT); // FADD ST, ST(i) = add ST(i) to ST
  19. FRAG1IMM(FADDP_STi_ST, INT); // FADDP ST(i), ST = add ST to ST(i) and pop ST
  20. FRAG1(FIADD16, USHORT); // FIADD m16int
  21. FRAG1(FIADD32, ULONG); // FIADD m32int
  22. FRAG1(FBLD, BYTE);
  23. FRAG1(FBSTP, BYTE);
  24. FRAG0(FCHS);
  25. FRAG0(FNCLEX);
  26. FRAG1(FCOM32, FLOAT); // FCOM m32real
  27. FRAG1(FCOM64, DOUBLE); // FCOM m64real
  28. FRAG1IMM(FCOM_STi, INT); // FCOM ST(i)
  29. FRAG1(FCOMP32, FLOAT); // FCOMP m32real
  30. FRAG1(FCOMP64, DOUBLE); // FCOMP m64real
  31. FRAG1IMM(FCOMP_STi, INT); // FCOMP ST(i)
  32. FRAG0(FCOMPP);
  33. FRAG0(FCOS);
  34. FRAG0(FDECSTP);
  35. FRAG1(FDIV32, FLOAT); // FDIV m32real
  36. FRAG1(FDIV64, DOUBLE); // FDIV m64real
  37. FRAG1IMM(FDIV_ST_STi, INT); // FDIV ST, ST(i)
  38. FRAG1IMM(FDIV_STi_ST, INT); // FDIV ST(i), ST
  39. FRAG1(FIDIV16, USHORT); // FIDIV m16int
  40. FRAG1(FIDIV32, ULONG); // FIDIV m32int
  41. FRAG1IMM(FDIVP_STi_ST, INT); // FDIVP ST(i), ST
  42. FRAG1(FDIVR32, FLOAT); // FDIVR m32real
  43. FRAG1(FDIVR64, DOUBLE); // FDIVR m64real
  44. FRAG1IMM(FDIVR_ST_STi, INT); // FDIVR ST, ST(i)
  45. FRAG1IMM(FDIVR_STi_ST, INT); // FDIVR ST(i), ST
  46. FRAG1IMM(FDIVRP_STi_ST, INT); // FDIVRP ST(i)
  47. FRAG1(FIDIVR16, USHORT); // FIDIVR m16int
  48. FRAG1(FIDIVR32, ULONG); // FIDIVR m32int
  49. FRAG1IMM(FFREE, INT);
  50. FRAG1(FICOM16, USHORT); // FICOM m16int (Intel docs say m16real);
  51. FRAG1(FICOM32, ULONG); // FICOM m32int (Intel docs say m32real);
  52. FRAG1(FICOMP16, USHORT); // FICOMP m16int
  53. FRAG1(FICOMP32, ULONG); // FICOMP m32int
  54. FRAG1(FILD16, SHORT); // FILD m16int
  55. FRAG1(FILD32, LONG); // FILD m32int
  56. FRAG1(FILD64, LONGLONG); // FILD m64int
  57. FRAG0(FINCSTP);
  58. FRAG0(FNINIT);
  59. FRAG1(FIST16, SHORT); // FIST m16int
  60. FRAG1(FISTP16, SHORT); // FISTP m16int
  61. FRAG1(FIST32, LONG); // FIST m32int
  62. FRAG1(FISTP32, LONG); // FISTP m32int
  63. FRAG1(FIST64, LONGLONG); // FIST m64int
  64. FRAG1(FISTP64, LONGLONG); // FISTP m64int
  65. FRAG1(FLD32, FLOAT); // FLD m32real
  66. FRAG1(FLD64, DOUBLE); // FLD m64real
  67. FRAG1(FLD80, BYTE); // FLD m80real
  68. FRAG0(FLD1);
  69. FRAG0(FLDL2T);
  70. FRAG0(FLDL2E);
  71. FRAG0(FLDPI);
  72. FRAG0(FLDLG2);
  73. FRAG0(FLDLN2);
  74. FRAG1IMM(FLD_STi, INT);
  75. FRAG0(FLDZ);
  76. FRAG1(FLDCW, USHORT*);
  77. FRAG1(FLDENV, BYTE);
  78. FRAG1(FMUL32, FLOAT); // FMUL m32real
  79. FRAG2(FMUL64, DOUBLE); // FMUL m64real
  80. FRAG1IMM(FMUL_STi_ST, INT); // FMUL ST(i), ST
  81. FRAG1IMM(FMUL_ST_STi, INT); // FMUL ST, ST(i)
  82. FRAG1IMM(FMULP_STi_ST, INT); // FMULP ST(i), ST
  83. FRAG1(FIMUL16, USHORT); // FIMUL m16int
  84. FRAG1(FIMUL32, ULONG); // FIMUL m32int
  85. FRAG0(FPATAN);
  86. FRAG0(FPREM);
  87. FRAG0(FPREM1);
  88. FRAG0(FPTAN);
  89. FRAG0(FRNDINT);
  90. FRAG1(FRSTOR, BYTE);
  91. FRAG1(FNSAVE, BYTE);
  92. FRAG0(FSCALE);
  93. FRAG0(FSIN);
  94. FRAG0(FSINCOS);
  95. FRAG0(FSQRT);
  96. FRAG1(FST32, FLOAT); // FST m32real
  97. FRAG1(FSTP32, FLOAT); // FSTP m32real
  98. FRAG1(FST64, DOUBLE); // FST m64real
  99. FRAG1(FSTP64, DOUBLE); // FSTP m64real
  100. FRAG1(FSTP80, BYTE); // FSTP m80real
  101. FRAG1IMM(FST_STi, INT); // FST ST(i)
  102. FRAG1IMM(FSTP_STi, INT); // FSTP ST(i)
  103. FRAG0(OPT_FSTP_ST0); // FSTP ST(0)
  104. FRAG1(FNSTCW, USHORT);
  105. FRAG1(FNSTENV, BYTE);
  106. FRAG1(FNSTSW, USHORT);
  107. FRAG0(OPT_FNSTSWAxSahf); // FNSTSW AX, SAHF
  108. FRAG1(FSUB32, FLOAT); // FSUB m32real
  109. FRAG1(FSUBP32, FLOAT); // FSUBP m32real
  110. FRAG1(FSUB64, DOUBLE); // FSUB m64real
  111. FRAG1(FSUBP64, DOUBLE); // FSUBP m64real
  112. FRAG1IMM(FSUB_ST_STi, INT); // FSUB ST, ST(i)
  113. FRAG1IMM(FSUB_STi_ST, INT); // FSUB ST(i), ST
  114. FRAG1IMM(FSUBP_STi_ST, INT); // FSUBP ST(i), ST
  115. FRAG1(FISUB16, USHORT); // FISUB m16int
  116. FRAG1(FISUB32, ULONG); // FISUB m64int
  117. FRAG1(FSUBR32, FLOAT); // FSUBR m32real
  118. FRAG1(FSUBR64, DOUBLE); // FSUBR m64real
  119. FRAG1IMM(FSUBR_ST_STi, INT); // FSUBR ST, ST(i)
  120. FRAG1IMM(FSUBR_STi_ST, INT); // FSUBR ST(i), ST
  121. FRAG1IMM(FSUBRP_STi_ST, INT); // FSUBRP ST(i)
  122. FRAG1(FISUBR16, USHORT);
  123. FRAG1(FISUBR32, ULONG);
  124. FRAG0(FTST);
  125. FRAG1IMM(FUCOM, INT); // FUCOM ST(i) / FUCOM
  126. FRAG1IMM(FUCOMP, INT); // FUCOMP ST(i) / FUCOMP
  127. FRAG0(FUCOMPP);
  128. FRAG0(FXAM);
  129. FRAG1IMM(FXCH_STi, INT);
  130. FRAG0(FXTRACT);
  131. FRAG0(FYL2X);
  132. FRAG0(FYL2XP1);
  133. FRAG0(WaitFrag);
  134. FRAG0(FNOP);