Leaked source code of windows server 2003
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

3138 lines
113 KiB

  1. //----------------------------------------------------------------------------
  2. //
  3. // Disassembly portions of IA64 machine implementation.
  4. //
  5. // Copyright (C) Microsoft Corporation, 2000-2002.
  6. //
  7. //----------------------------------------------------------------------------
  8. #include "ntsdp.hpp"
  9. #include "ia64_dis.h"
  10. #define PRED0_MASK (0x3f << 5)
  11. #define PRED1_MASK (0x3f << 14)
  12. #define PRED2_MASK (0x3f << 23)
  13. // Breakpoint insertion and removal are done on bundle boundaries.
  14. #define IA64_BP_ALIGN 0xf
  15. #define IA64_BP_LEN 16
  16. // defined in IA64INST.H
  17. ULONGLONG g_Ia64TrapInstr = BREAK_INSTR | (IA64_DEBUG_STOP_BREAKPOINT << 6);
  18. #ifdef DW3 // defined in vdmdbg.h which is in conflict with iel.h
  19. #undef DW3
  20. #endif
  21. #define DECEM 1 /* GetNextOffset() based on Intel Falcon decoder DLL */
  22. #include "decem.h"
  23. /*****************************************************************************/
  24. // Temporary variables for IEL library
  25. unsigned int IEL_t1, IEL_t2, IEL_t3, IEL_t4;
  26. U32 IEL_tempc;
  27. U64 IEL_et1, IEL_et2;
  28. U128 IEL_ext1, IEL_ext2, IEL_ext3, IEL_ext4, IEL_ext5;
  29. S128 IEL_ts1, IEL_ts2;
  30. #define IEL_GETQW0(x) ((ULONG64)IEL_GETDW1(x)) << 32 | IEL_GETDW0(x)
  31. /*****************************************************************************/
  32. #ifdef DECEM
  33. EM_Decoder_Machine_Type machineType = EM_DECODER_CPU_P7;
  34. EM_Decoder_Machine_Mode machineMode = EM_DECODER_MODE_EM;
  35. BOOL fDecoderInitDone = FALSE;
  36. BOOL fDecoderActive = FALSE;
  37. EM_Decoder_Id DecoderId = -1;
  38. EM_Decoder_Id (__cdecl *pfnEM_Decoder_open)(void);
  39. EM_Decoder_Err (__cdecl *pfnEM_Decoder_associate_one)(const EM_Decoder_Id,
  40. const EM_Decoder_Inst_Id,
  41. const void *);
  42. EM_Decoder_Err (__cdecl *pfnEM_Decoder_associate_check)(const EM_Decoder_Id,
  43. EM_Decoder_Inst_Id *);
  44. EM_Decoder_Err (__cdecl *pfnEM_Decoder_setenv)(const EM_Decoder_Id,
  45. const EM_Decoder_Machine_Type,
  46. const EM_Decoder_Machine_Mode);
  47. EM_Decoder_Err (__cdecl *pfnEM_Decoder_close)(const EM_Decoder_Id);
  48. EM_Decoder_Err (__cdecl *pfnEM_Decoder_decode)(const EM_Decoder_Id,
  49. const unsigned char *,
  50. const int,
  51. const EM_IL,
  52. EM_Decoder_Info *);
  53. EM_Decoder_Err (__cdecl *pfnEM_Decoder_inst_static_info)(const EM_Decoder_Id,
  54. const EM_Decoder_Inst_Id,
  55. EM_Decoder_Inst_Static_Info *);
  56. const char* (__cdecl *pfnEM_Decoder_ver_str)(void);
  57. void (__cdecl *pfnEM_Decoder_get_version)(EM_library_version_t *);
  58. const char* (__cdecl *pfnEM_Decoder_err_msg)(EM_Decoder_Err);
  59. EM_Decoder_Err (__cdecl *pfnEM_Decoder_decode_bundle)(const EM_Decoder_Id,
  60. const unsigned char*,
  61. const int,
  62. EM_Decoder_Bundle_Info*);
  63. BOOL
  64. InitDecoder (void)
  65. {
  66. EM_library_version_t dec_vs;
  67. EM_library_version_t *dec_version;
  68. EM_Decoder_Err err;
  69. HINSTANCE hmodDecoder;
  70. // load EM deocder library if it is not done yet
  71. if (!fDecoderInitDone) {
  72. fDecoderInitDone = TRUE;
  73. const char* c_szFailure = NULL;
  74. if (
  75. (hmodDecoder = LoadLibrary("DECEM.DLL")) &&
  76. (pfnEM_Decoder_open = (EM_Decoder_Id (__cdecl*)(void))
  77. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_open")
  78. ) &&
  79. (pfnEM_Decoder_associate_one = (EM_Decoder_Err (__cdecl*)(const EM_Decoder_Id, const EM_Decoder_Inst_Id, const void*))
  80. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_associate_one")
  81. ) &&
  82. (pfnEM_Decoder_associate_check = (EM_Decoder_Err (__cdecl*)(const EM_Decoder_Id, EM_Decoder_Inst_Id*))
  83. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_associate_check")
  84. ) &&
  85. (pfnEM_Decoder_setenv =
  86. (EM_Decoder_Err (__cdecl*)(const EM_Decoder_Id, const EM_Decoder_Machine_Type, const EM_Decoder_Machine_Mode))
  87. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_setenv")
  88. ) &&
  89. (pfnEM_Decoder_close = (EM_Decoder_Err (__cdecl*)(const EM_Decoder_Id))
  90. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_close")
  91. ) &&
  92. (pfnEM_Decoder_decode = (EM_Decoder_Err (__cdecl*)(const EM_Decoder_Id, const unsigned char*, const int, const EM_IL, EM_Decoder_Info*))
  93. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_decode")
  94. ) &&
  95. (pfnEM_Decoder_inst_static_info = (EM_Decoder_Err (__cdecl*)(const EM_Decoder_Id, const EM_Decoder_Inst_Id, EM_Decoder_Inst_Static_Info*))
  96. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_inst_static_info")
  97. ) &&
  98. (pfnEM_Decoder_ver_str = (const char* (__cdecl*)(void))
  99. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_ver_str")
  100. ) &&
  101. (pfnEM_Decoder_get_version = (void (__cdecl*)(EM_library_version_t*))
  102. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_get_version")
  103. ) &&
  104. (pfnEM_Decoder_err_msg = (const char* (__cdecl*)(EM_Decoder_Err))
  105. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_err_msg")
  106. ) &&
  107. (pfnEM_Decoder_decode_bundle = (EM_Decoder_Err (__cdecl*)(const EM_Decoder_Id, const unsigned char*, const int, EM_Decoder_Bundle_Info*))
  108. GetProcAddress(hmodDecoder, c_szFailure = "em_decoder_decode_bundle")
  109. )
  110. ){
  111. // Display DECEM.DLL version on initial load
  112. dec_version = &dec_vs;
  113. (*pfnEM_Decoder_get_version)(dec_version);
  114. dprintf("Falcon EM Decoder xversion "
  115. "%d.%d, api %d.%d, emdb %d.%d\n",
  116. dec_version->xversion.major, dec_version->xversion.minor,
  117. dec_version->api.major, dec_version->api.minor,
  118. dec_version->emdb.major, dec_version->emdb.minor);
  119. if ((DecoderId = (*pfnEM_Decoder_open)()) == -1)
  120. {
  121. ErrOut("em_decoder_open failed\n");
  122. }
  123. else {
  124. if (
  125. (err = (*pfnEM_Decoder_setenv)(DecoderId,
  126. machineType,
  127. machineMode)
  128. ) != EM_DECODER_NO_ERROR)
  129. {
  130. ErrOut("em_decoder_setenv: %s\n", (*pfnEM_Decoder_err_msg)((EM_Decoder_Err)err));
  131. }
  132. else
  133. {
  134. fDecoderActive = TRUE;
  135. }
  136. }
  137. }
  138. else
  139. {
  140. // error processing....
  141. if (!hmodDecoder)
  142. {
  143. ErrOut("LoadLibrary(DECEM.DLL) failed.\n");
  144. }
  145. else if (c_szFailure && *c_szFailure)
  146. {
  147. ErrOut("GetProcAddress failed for %s at DECEM.DLL\n", c_szFailure);
  148. }
  149. else
  150. {
  151. ErrOut("Unknown failure while initializing DECEM.DLL\n");
  152. }
  153. }
  154. }
  155. return fDecoderActive;
  156. }
  157. #endif /* DECEM */
  158. BOOL fDisasmInitDone = FALSE;
  159. BOOL fDisasmActive = FALSE;
  160. //
  161. // CIa64Disasm - disassemble an IA64 instruction
  162. //
  163. typedef class CIa64Disasm
  164. {
  165. public:
  166. typedef union SBundle
  167. {
  168. UCHAR BundleBuffer[EM_BUNDLE_SIZE];
  169. } typedef_SBundle;
  170. static bool GetBundleAndSlot(ULONG64 uLocation,
  171. ULONG64* pBundleLoc,
  172. UINT* pSlotNum)
  173. {
  174. if (pSlotNum)
  175. {
  176. switch (uLocation & 0xf)
  177. {
  178. case 0: *pSlotNum = 0; break;
  179. case 4: *pSlotNum = 1; break;
  180. case 8: *pSlotNum = 2; break;
  181. default: return false;
  182. }
  183. }
  184. if (pBundleLoc)
  185. {
  186. *pBundleLoc = uLocation & ~0xf;
  187. }
  188. return true;
  189. }
  190. CIa64Disasm(TargetInfo* Target,
  191. Ia64MachineInfo* pMachineInit);
  192. bool
  193. DecodeInstruction(ULONG64 uBundleLoc, const SBundle& r_Bundle,
  194. UINT uSlotNum, EM_Decoder_Info* pInstrInfo);
  195. bool Disassemble(ULONG64 uLocation, const SBundle& r_Bundle,
  196. UINT* pInstrLen, char* szDisBuf, size_t nDisBufSize,
  197. bool bContext);
  198. private:
  199. TargetInfo* m_Target;
  200. Ia64MachineInfo* m_Machine;
  201. typedef class CSzBuffer
  202. {
  203. public:
  204. CSzBuffer(char* szDisBuf, size_t nDisBufSize);
  205. void Add(const char* szSrc, size_t nStart = 0);
  206. void Validate();
  207. bool IsValid() const {return bValid;}
  208. size_t length() const {return nSize;}
  209. const char* c_str() const {return szBuf;}
  210. protected:
  211. char* szBuf;
  212. size_t nMaxSize;
  213. size_t nSize;
  214. bool bValid;
  215. } typedef_CSzBuffer;
  216. typedef struct SRegFileInfo
  217. {
  218. EM_Decoder_Regfile_Name DecoderName;
  219. char* szName;
  220. char* szAlias;
  221. char* szMasm;
  222. } typedef_SRegFileInfo;
  223. typedef struct SRegInfo
  224. {
  225. EM_Decoder_Reg_Name DecoderName;
  226. char* szName;
  227. char* szAlias;
  228. char* szMasm;
  229. } typedef_SRegInfo;
  230. void
  231. AddRegister(CSzBuffer* pBuf, const EM_Decoder_Reg_Info& c_RegInfo);
  232. void
  233. AddRegister(CSzBuffer* pBuf, const EM_Decoder_Regfile_Info& c_RegInfo);
  234. void
  235. AddRegister(CSzBuffer* pBuf, EM_Decoder_Reg_Name RegName);
  236. void
  237. AddPredicate(CSzBuffer* pBuf,
  238. const EM_Decoder_Info& c_InstrInfo, bool bContext);
  239. void
  240. AddMnemonic(CSzBuffer* pBuf, const EM_Decoder_Info& c_InstrInfo);
  241. void
  242. AddOperandList(CSzBuffer* pBuf, ULONG64 uBundleLoc,
  243. UINT uSlotNum, const EM_Decoder_Info& c_InstrInfo);
  244. void
  245. AddComment(CSzBuffer* pBuf, ULONG64 uBundleLoc,
  246. UINT uSlotNum, const EM_Decoder_Info& c_InstrInfo,
  247. bool bContext);
  248. bool
  249. AddOperand(CSzBuffer* pBuf, ULONG64 uBundleLoc, UINT uSlotNum,
  250. const EM_Decoder_Operand_Info& c_OperandInfo,
  251. bool bSeparator);
  252. void
  253. AddSeparator(CSzBuffer* pBuf);
  254. static void
  255. AddString(CSzBuffer* pBuf, const char* szSrc, size_t nStart = 0)
  256. {
  257. pBuf->Add(szSrc, nStart);
  258. }
  259. void
  260. AddSymAddr(CSzBuffer* pBuf, ULONG64 uAddress);
  261. static SRegFileInfo c_aRegFileInfo[];
  262. static SRegInfo c_aRegInfo[];
  263. } typedef_CIa64Disasm;
  264. //
  265. // CIa64Disasm::CSzBuffer implementation
  266. //
  267. CIa64Disasm::CSzBuffer::CSzBuffer(char* szDisBuf,
  268. size_t nDisBufSize)
  269. :szBuf(szDisBuf), nMaxSize(nDisBufSize)
  270. {
  271. if (nMaxSize)
  272. {
  273. --nMaxSize;
  274. }
  275. Validate();
  276. }
  277. void
  278. CIa64Disasm::CSzBuffer::Validate()
  279. {
  280. nSize = 0;
  281. bValid = false;
  282. if (szBuf && nMaxSize)
  283. {
  284. nSize = strlen(szBuf);
  285. bValid = true;
  286. }
  287. }
  288. void
  289. CIa64Disasm::CSzBuffer::Add(const char* szSrc,
  290. size_t nStart /*= 0*/)
  291. {
  292. if (!bValid || (nSize >= nMaxSize))
  293. {
  294. return;
  295. }
  296. if (nSize < nStart)
  297. {
  298. size_t nSpaceSize = nStart - nSize;
  299. memset(szBuf + nSize, ' ', nSpaceSize);
  300. szBuf[nStart] = char(0);
  301. nSize = nStart;
  302. }
  303. if (!(szSrc && *szSrc))
  304. {
  305. return;
  306. }
  307. strncat(szBuf, szSrc, nMaxSize - nSize);
  308. szBuf[nMaxSize] = char(0);
  309. nSize += strlen(szBuf + nSize);
  310. }
  311. //
  312. // CIa64Disasm implementation
  313. //
  314. CIa64Disasm::CIa64Disasm(TargetInfo* Target, Ia64MachineInfo* pMachineInit)
  315. : m_Target(Target), m_Machine(pMachineInit)
  316. {
  317. InitDecoder();
  318. }
  319. bool
  320. CIa64Disasm::DecodeInstruction(ULONG64 uBundleLoc,
  321. const SBundle& r_Bundle,
  322. UINT uSlot,
  323. EM_Decoder_Info* pInstrInfo)
  324. {
  325. if ((uBundleLoc & 0xf) || (uSlot > 2) || !pInstrInfo)
  326. {
  327. return false;
  328. }
  329. uBundleLoc += uSlot;
  330. U64 Location;
  331. //IEL_ZERO(DecLocation);
  332. IEL_ASSIGNU(Location, *(U64*)&uBundleLoc);
  333. EM_Decoder_Err Error = pfnEM_Decoder_decode(DecoderId,
  334. (unsigned char*)&r_Bundle,
  335. sizeof(r_Bundle), Location,
  336. pInstrInfo);
  337. return ((Error == EM_DECODER_NO_ERROR) && (pInstrInfo->inst != EM_IGNOP));
  338. }
  339. bool
  340. CIa64Disasm::Disassemble(ULONG64 uLocation,
  341. const CIa64Disasm::SBundle& r_Bundle,
  342. UINT* pInstrLen,
  343. char* szDisBuf,
  344. size_t nDisBufSize,
  345. bool bContext)
  346. {
  347. if (!InitDecoder())
  348. {
  349. ErrOut("EM decoder library(DECEM.DLL) not active\n");
  350. return false;
  351. }
  352. ULONG64 uBundleLoc;
  353. UINT uSlotNum;
  354. if (!GetBundleAndSlot(uLocation, &uBundleLoc, &uSlotNum))
  355. {
  356. return false;
  357. }
  358. CSzBuffer Buf(szDisBuf, nDisBufSize);
  359. EM_Decoder_Info InstrInfo;
  360. if (!DecodeInstruction(uBundleLoc, r_Bundle, uSlotNum, &InstrInfo))
  361. {
  362. EM_Decoder_static_info_t StaticInfo;
  363. ZeroMemory(&StaticInfo, sizeof(StaticInfo));
  364. StaticInfo.mnemonic = "???";
  365. InstrInfo.static_info = &StaticInfo;
  366. AddMnemonic(&Buf, InstrInfo);
  367. return true;
  368. }
  369. AddPredicate(&Buf, InstrInfo, bContext);
  370. AddMnemonic(&Buf, InstrInfo);
  371. AddString(&Buf, " ");
  372. AddOperandList(&Buf, uBundleLoc, uSlotNum, InstrInfo);
  373. if (EM_DECODER_CYCLE_BREAK((&InstrInfo)))
  374. {
  375. AddString(&Buf, " ;;");
  376. }
  377. AddComment(&Buf, uBundleLoc, uSlotNum, InstrInfo, bContext);
  378. if (pInstrLen)
  379. {
  380. *pInstrLen = InstrInfo.size;
  381. }
  382. return true;
  383. }
  384. void
  385. CIa64Disasm::AddRegister(CSzBuffer* pBuf,
  386. const EM_Decoder_Reg_Info& c_RegInfo)
  387. {
  388. AddString(pBuf, c_aRegInfo[c_RegInfo.name].szAlias);
  389. }
  390. void
  391. CIa64Disasm::AddRegister(CSzBuffer* pBuf,
  392. const EM_Decoder_Regfile_Info& c_RegFileInfo)
  393. {
  394. AddString(pBuf, c_aRegFileInfo[c_RegFileInfo.index.name].szName);
  395. }
  396. void
  397. CIa64Disasm::AddRegister(CSzBuffer* pBuf,
  398. EM_Decoder_Reg_Name RegName)
  399. {
  400. AddString(pBuf, c_aRegInfo[RegName].szAlias);
  401. }
  402. void
  403. CIa64Disasm::AddPredicate(CSzBuffer* pBuf,
  404. const EM_Decoder_Info& c_InstrInfo,
  405. bool bContext)
  406. {
  407. if (!(c_InstrInfo.pred.valid && c_InstrInfo.pred.value))
  408. {
  409. return;
  410. }
  411. AddString(pBuf, "(");
  412. AddRegister(pBuf, c_InstrInfo.pred);
  413. const char* szClose;
  414. if (bContext)
  415. {
  416. if ((m_Machine->GetReg64(PREDS) >> c_InstrInfo.pred.value) & 0x1)
  417. {
  418. szClose = "=1)";
  419. }
  420. else
  421. {
  422. szClose = "=0)";
  423. }
  424. }
  425. else
  426. {
  427. szClose = ")";
  428. }
  429. AddString(pBuf, szClose);
  430. }
  431. void
  432. CIa64Disasm::AddMnemonic(CSzBuffer* pBuf,
  433. const EM_Decoder_Info& c_InstrInfo)
  434. {
  435. AddString(pBuf, c_InstrInfo.static_info->mnemonic, 7);
  436. AddString(pBuf, NULL, 13);
  437. }
  438. void
  439. CIa64Disasm::AddOperandList(CSzBuffer* pBuf,
  440. ULONG64 uBundleLoc,
  441. UINT uSlotNum,
  442. const EM_Decoder_Info& c_InstrInfo)
  443. {
  444. bool bAdd = false;
  445. bAdd |= AddOperand(pBuf, uBundleLoc, uSlotNum, c_InstrInfo.dst1, false);
  446. bAdd |= AddOperand(pBuf, uBundleLoc, uSlotNum, c_InstrInfo.dst2, bAdd);
  447. if ((c_InstrInfo.dst1.type != EM_DECODER_NO_OPER) &&
  448. (c_InstrInfo.src1.type != EM_DECODER_NO_OPER))
  449. {
  450. AddString(pBuf, "=");
  451. bAdd = false;
  452. }
  453. bAdd = AddOperand(pBuf, uBundleLoc, uSlotNum, c_InstrInfo.src1, bAdd);
  454. bAdd = AddOperand(pBuf, uBundleLoc, uSlotNum, c_InstrInfo.src2, bAdd);
  455. bAdd = AddOperand(pBuf, uBundleLoc, uSlotNum, c_InstrInfo.src3, bAdd);
  456. bAdd = AddOperand(pBuf, uBundleLoc, uSlotNum, c_InstrInfo.src4, bAdd);
  457. bAdd = AddOperand(pBuf, uBundleLoc, uSlotNum, c_InstrInfo.src5, bAdd);
  458. }
  459. void
  460. CIa64Disasm::AddComment(CSzBuffer* pBuf,
  461. ULONG64 uBundleLoc,
  462. UINT uSlotNum,
  463. const EM_Decoder_Info& c_InstrInfo,
  464. bool bContext)
  465. {
  466. if (bContext)
  467. {
  468. char szComment[128];
  469. *szComment = 0;
  470. CSzBuffer Comment(szComment, sizeof(szComment) / sizeof(*szComment));
  471. if (
  472. !strncmp(c_InstrInfo.static_info->mnemonic, "br.", 3) &&
  473. (c_InstrInfo.src1.reg_info.type == EM_DECODER_BR_REG))
  474. {
  475. ULONG64 uTargetAddr =
  476. m_Machine->GetReg64(c_InstrInfo.src1.reg_info.value + BRRP);
  477. Comment.Add(" // ");
  478. AddSymAddr(&Comment, uTargetAddr);
  479. if ((uTargetAddr == IA64_MM_EPC_VA + 0x20) &&
  480. !IS_KERNEL_TARGET(m_Target))
  481. {
  482. Comment.Add(" system call");
  483. }
  484. }
  485. if (Comment.length())
  486. {
  487. long iCommentStart =
  488. (g_AsmOptions & DEBUG_ASMOPT_IGNORE_OUTPUT_WIDTH) ?
  489. 0 : (long(g_OutputWidth) - Comment.length() - 18);
  490. AddString(pBuf, Comment.c_str(),
  491. (iCommentStart > 0) ? size_t(iCommentStart) : 0);
  492. }
  493. }
  494. }
  495. bool
  496. CIa64Disasm::AddOperand(CSzBuffer* pBuf,
  497. ULONG64 uBundleLoc,
  498. UINT uSlotNum,
  499. const EM_Decoder_Operand_Info& c_OperandInfo,
  500. bool bSeparator)
  501. {
  502. switch (c_OperandInfo.type)
  503. {
  504. case EM_DECODER_REGISTER:
  505. {
  506. if (bSeparator)
  507. {
  508. AddSeparator(pBuf);
  509. }
  510. AddRegister(pBuf, c_OperandInfo.reg_info);
  511. }
  512. break;
  513. case EM_DECODER_REGFILE:
  514. {
  515. if (bSeparator)
  516. {
  517. AddSeparator(pBuf);
  518. }
  519. AddString(pBuf,
  520. c_aRegFileInfo[c_OperandInfo.regfile_info.name].szName);
  521. AddString(pBuf, "[");
  522. AddRegister(pBuf, c_OperandInfo.regfile_info.index.name);
  523. AddString(pBuf, "]");
  524. }
  525. break;
  526. case EM_DECODER_IMMEDIATE:
  527. {
  528. if (bSeparator)
  529. {
  530. AddSeparator(pBuf);
  531. }
  532. if (EM_DECODER_OPER_IMM_REG((&c_OperandInfo)))
  533. {
  534. EM_Decoder_Reg_Name RegName;
  535. if (EM_DECODER_OPER_IMM_FREG((&c_OperandInfo)))
  536. {
  537. RegName = EM_DECODER_REG_F0;
  538. }
  539. else
  540. {
  541. DBG_ASSERT(EM_DECODER_OPER_IMM_IREG((&c_OperandInfo)));
  542. RegName = EM_DECODER_REG_R0;
  543. }
  544. RegName = EM_Decoder_Reg_Name(
  545. UINT(RegName) + IEL_GETDW0(c_OperandInfo.imm_info.val64));
  546. AddRegister(pBuf, RegName);
  547. }
  548. else
  549. {
  550. U64 ImmVal = c_OperandInfo.imm_info.val64;
  551. ULONG64 uImmVal = IEL_GETQW0(ImmVal);
  552. if (c_OperandInfo.imm_info.size == 64)
  553. {
  554. AddSymAddr(pBuf, uImmVal);
  555. }
  556. else
  557. {
  558. AddString(pBuf, FormatDisp64(uImmVal));
  559. }
  560. }
  561. }
  562. break;
  563. case EM_DECODER_MEMORY:
  564. {
  565. if (bSeparator)
  566. {
  567. AddSeparator(pBuf);
  568. }
  569. AddString(pBuf, "[");
  570. AddRegister(pBuf, c_OperandInfo.mem_info.mem_base.name);
  571. AddString(pBuf, "]");
  572. }
  573. break;
  574. case EM_DECODER_IP_RELATIVE: {
  575. if (bSeparator)
  576. {
  577. AddSeparator(pBuf);
  578. }
  579. ULONG64 uOffset = IEL_GETQW0(c_OperandInfo.imm_info.val64);
  580. if (uOffset)
  581. {
  582. uOffset += uBundleLoc;
  583. AddSymAddr(pBuf, uOffset);
  584. }
  585. else
  586. {
  587. AddString(pBuf, "+0");
  588. }
  589. }
  590. break;
  591. default: {
  592. return false;
  593. }
  594. }
  595. return true;
  596. }
  597. void
  598. CIa64Disasm::AddSeparator(CSzBuffer* pBuf)
  599. {
  600. AddString(pBuf, ", ");
  601. }
  602. void
  603. CIa64Disasm::AddSymAddr(CSzBuffer* pBuf,
  604. ULONG64 uAddress)
  605. {
  606. char szSymbol[MAX_SYMBOL_LEN];
  607. ULONG64 uDisplacement = 0;
  608. GetSymbol(uAddress, szSymbol, sizeof(szSymbol), &uDisplacement);
  609. szSymbol[MAX_SYMBOL_LEN - 1] = char(0);
  610. if (*szSymbol)
  611. {
  612. AddString(pBuf, szSymbol);
  613. AddString(pBuf, "+");
  614. AddString(pBuf, FormatDisp64(uDisplacement));
  615. AddString(pBuf, " (");
  616. AddString(pBuf, FormatAddr64(uAddress));
  617. AddString(pBuf, ")");
  618. }
  619. else
  620. {
  621. AddString(pBuf, FormatAddr64(uAddress));
  622. }
  623. }
  624. CIa64Disasm::SRegFileInfo CIa64Disasm::c_aRegFileInfo[] = {
  625. {EM_DECODER_NO_REGFILE, "no", "no", "no" },
  626. {EM_DECODER_REGFILE_PMC, "pmc", "pmc", "pmc" },
  627. {EM_DECODER_REGFILE_PMD, "pmd", "pmd", "pmd" },
  628. {EM_DECODER_REGFILE_PKR, "pkr", "pkr", "pkr" },
  629. {EM_DECODER_REGFILE_RR, "rr", "rr", "rr" },
  630. {EM_DECODER_REGFILE_IBR, "ibr", "ibr", "ibr" },
  631. {EM_DECODER_REGFILE_DBR, "dbr", "dbr", "dbr" },
  632. {EM_DECODER_REGFILE_ITR, "itr", "itr", "itr" },
  633. {EM_DECODER_REGFILE_DTR, "dtr", "dtr", "dtr" },
  634. {EM_DECODER_REGFILE_MSR, "msr", "msr", "msr" },
  635. {EM_DECODER_REGFILE_CPUID, "cpuid", "cpuid", "cpuid"},
  636. {EM_DECODER_REGFILE_LAST, "last", "last", "last" }
  637. }; // CIa64Disasm::c_aRegFileInfo
  638. CIa64Disasm::SRegInfo CIa64Disasm::c_aRegInfo[] = {
  639. {EM_DECODER_NO_REG, "%mm", "%mm", "mm"},
  640. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  641. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  642. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  643. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  644. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  645. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  646. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  647. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  648. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  649. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  650. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  651. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  652. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  653. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  654. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  655. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  656. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  657. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  658. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  659. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  660. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  661. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  662. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  663. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  664. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  665. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  666. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  667. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  668. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  669. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  670. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  671. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  672. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  673. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  674. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  675. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  676. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  677. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  678. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  679. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  680. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  681. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  682. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  683. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  684. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  685. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  686. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  687. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  688. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  689. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  690. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  691. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  692. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  693. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  694. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  695. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  696. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  697. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  698. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  699. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  700. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  701. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  702. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  703. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  704. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  705. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  706. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  707. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  708. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  709. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  710. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  711. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  712. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  713. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  714. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  715. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  716. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  717. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  718. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  719. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  720. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  721. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  722. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  723. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  724. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  725. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  726. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  727. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  728. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  729. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  730. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  731. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  732. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  733. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  734. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  735. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  736. {EM_DECODER_NO_REG, "%error", "%error", "error"},
  737. {EM_DECODER_REG_R0, "r0", "r0", "r0" },
  738. {EM_DECODER_REG_R1, "r1", "gp", "gp" },
  739. {EM_DECODER_REG_R2, "r2", "r2", "r2" },
  740. {EM_DECODER_REG_R3, "r3", "r3", "r3" },
  741. {EM_DECODER_REG_R4, "r4", "r4", "r4" },
  742. {EM_DECODER_REG_R5, "r5", "r5", "r5" },
  743. {EM_DECODER_REG_R6, "r6", "r6", "r6" },
  744. {EM_DECODER_REG_R7, "r7", "r7", "r7" },
  745. {EM_DECODER_REG_R8, "r8", "ret0", "ret0"},
  746. {EM_DECODER_REG_R9, "r9", "ret1", "ret1"},
  747. {EM_DECODER_REG_R10, "r10", "ret2", "ret2"},
  748. {EM_DECODER_REG_R11, "r11", "ret3", "ret3"},
  749. {EM_DECODER_REG_R12, "r12", "sp", "sp" },
  750. {EM_DECODER_REG_R13, "r13", "r13", "r13" },
  751. {EM_DECODER_REG_R14, "r14", "r14", "r14" },
  752. {EM_DECODER_REG_R15, "r15", "r15", "r15" },
  753. {EM_DECODER_REG_R16, "r16", "r16", "r16" },
  754. {EM_DECODER_REG_R17, "r17", "r17", "r17" },
  755. {EM_DECODER_REG_R18, "r18", "r18", "r18" },
  756. {EM_DECODER_REG_R19, "r19", "r19", "r19" },
  757. {EM_DECODER_REG_R20, "r20", "r20", "r20" },
  758. {EM_DECODER_REG_R21, "r21", "r21", "r21" },
  759. {EM_DECODER_REG_R22, "r22", "r22", "r22" },
  760. {EM_DECODER_REG_R23, "r23", "r23", "r23" },
  761. {EM_DECODER_REG_R24, "r24", "r24", "r24" },
  762. {EM_DECODER_REG_R25, "r25", "r25", "r25" },
  763. {EM_DECODER_REG_R26, "r26", "r26", "r26" },
  764. {EM_DECODER_REG_R27, "r27", "r27", "r27" },
  765. {EM_DECODER_REG_R28, "r28", "r28", "r28" },
  766. {EM_DECODER_REG_R29, "r29", "r29", "r29" },
  767. {EM_DECODER_REG_R30, "r30", "r30", "r30" },
  768. {EM_DECODER_REG_R31, "r31", "r31", "r31" },
  769. {EM_DECODER_REG_R32, "r32", "r32", "r32" },
  770. {EM_DECODER_REG_R33, "r33", "r33", "r33" },
  771. {EM_DECODER_REG_R34, "r34", "r34", "r34" },
  772. {EM_DECODER_REG_R35, "r35", "r35", "r35" },
  773. {EM_DECODER_REG_R36, "r36", "r36", "r36" },
  774. {EM_DECODER_REG_R37, "r37", "r37", "r37" },
  775. {EM_DECODER_REG_R38, "r38", "r38", "r38" },
  776. {EM_DECODER_REG_R39, "r39", "r39", "r39" },
  777. {EM_DECODER_REG_R40, "r40", "r40", "r40" },
  778. {EM_DECODER_REG_R41, "r41", "r41", "r41" },
  779. {EM_DECODER_REG_R42, "r42", "r42", "r42" },
  780. {EM_DECODER_REG_R43, "r43", "r43", "r43" },
  781. {EM_DECODER_REG_R44, "r44", "r44", "r44" },
  782. {EM_DECODER_REG_R45, "r45", "r45", "r45" },
  783. {EM_DECODER_REG_R46, "r46", "r46", "r46" },
  784. {EM_DECODER_REG_R47, "r47", "r47", "r47" },
  785. {EM_DECODER_REG_R48, "r48", "r48", "r48" },
  786. {EM_DECODER_REG_R49, "r49", "r49", "r49" },
  787. {EM_DECODER_REG_R50, "r50", "r50", "r50" },
  788. {EM_DECODER_REG_R51, "r51", "r51", "r51" },
  789. {EM_DECODER_REG_R52, "r52", "r52", "r52" },
  790. {EM_DECODER_REG_R53, "r53", "r53", "r53" },
  791. {EM_DECODER_REG_R54, "r54", "r54", "r54" },
  792. {EM_DECODER_REG_R55, "r55", "r55", "r55" },
  793. {EM_DECODER_REG_R56, "r56", "r56", "r56" },
  794. {EM_DECODER_REG_R57, "r57", "r57", "r57" },
  795. {EM_DECODER_REG_R58, "r58", "r58", "r58" },
  796. {EM_DECODER_REG_R59, "r59", "r59", "r59" },
  797. {EM_DECODER_REG_R60, "r60", "r60", "r60" },
  798. {EM_DECODER_REG_R61, "r61", "r61", "r61" },
  799. {EM_DECODER_REG_R62, "r62", "r62", "r62" },
  800. {EM_DECODER_REG_R63, "r63", "r63", "r63" },
  801. {EM_DECODER_REG_R64, "r64", "r64", "r64" },
  802. {EM_DECODER_REG_R65, "r65", "r65", "r65" },
  803. {EM_DECODER_REG_R66, "r66", "r66", "r66" },
  804. {EM_DECODER_REG_R67, "r67", "r67", "r67" },
  805. {EM_DECODER_REG_R68, "r68", "r68", "r68" },
  806. {EM_DECODER_REG_R69, "r69", "r69", "r69" },
  807. {EM_DECODER_REG_R70, "r70", "r70", "r70" },
  808. {EM_DECODER_REG_R71, "r71", "r71", "r71" },
  809. {EM_DECODER_REG_R72, "r72", "r72", "r72" },
  810. {EM_DECODER_REG_R73, "r73", "r73", "r73" },
  811. {EM_DECODER_REG_R74, "r74", "r74", "r74" },
  812. {EM_DECODER_REG_R75, "r75", "r75", "r75" },
  813. {EM_DECODER_REG_R76, "r76", "r76", "r76" },
  814. {EM_DECODER_REG_R77, "r77", "r77", "r77" },
  815. {EM_DECODER_REG_R78, "r78", "r78", "r78" },
  816. {EM_DECODER_REG_R79, "r79", "r79", "r79" },
  817. {EM_DECODER_REG_R80, "r80", "r80", "r80" },
  818. {EM_DECODER_REG_R81, "r81", "r81", "r81" },
  819. {EM_DECODER_REG_R82, "r82", "r82", "r82" },
  820. {EM_DECODER_REG_R83, "r83", "r83", "r83" },
  821. {EM_DECODER_REG_R84, "r84", "r84", "r84" },
  822. {EM_DECODER_REG_R85, "r85", "r85", "r85" },
  823. {EM_DECODER_REG_R86, "r86", "r86", "r86" },
  824. {EM_DECODER_REG_R87, "r87", "r87", "r87" },
  825. {EM_DECODER_REG_R88, "r88", "r88", "r88" },
  826. {EM_DECODER_REG_R89, "r89", "r89", "r89" },
  827. {EM_DECODER_REG_R90, "r90", "r90", "r90" },
  828. {EM_DECODER_REG_R91, "r91", "r91", "r91" },
  829. {EM_DECODER_REG_R92, "r92", "r92", "r92" },
  830. {EM_DECODER_REG_R93, "r93", "r93", "r93" },
  831. {EM_DECODER_REG_R94, "r94", "r94", "r94" },
  832. {EM_DECODER_REG_R95, "r95", "r95", "r95" },
  833. {EM_DECODER_REG_R96, "r96", "r96", "r96" },
  834. {EM_DECODER_REG_R97, "r97", "r97", "r97" },
  835. {EM_DECODER_REG_R98, "r98", "r98", "r98" },
  836. {EM_DECODER_REG_R99, "r99", "r99", "r99" },
  837. {EM_DECODER_REG_R100, "r100", "r100", "r100"},
  838. {EM_DECODER_REG_R101, "r101", "r101", "r101"},
  839. {EM_DECODER_REG_R102, "r102", "r102", "r102"},
  840. {EM_DECODER_REG_R103, "r103", "r103", "r103"},
  841. {EM_DECODER_REG_R104, "r104", "r104", "r104"},
  842. {EM_DECODER_REG_R105, "r105", "r105", "r105"},
  843. {EM_DECODER_REG_R106, "r106", "r106", "r106"},
  844. {EM_DECODER_REG_R107, "r107", "r107", "r107"},
  845. {EM_DECODER_REG_R108, "r108", "r108", "r108"},
  846. {EM_DECODER_REG_R109, "r109", "r109", "r109"},
  847. {EM_DECODER_REG_R110, "r110", "r110", "r110"},
  848. {EM_DECODER_REG_R111, "r111", "r111", "r111"},
  849. {EM_DECODER_REG_R112, "r112", "r112", "r112"},
  850. {EM_DECODER_REG_R113, "r113", "r113", "r113"},
  851. {EM_DECODER_REG_R114, "r114", "r114", "r114"},
  852. {EM_DECODER_REG_R115, "r115", "r115", "r115"},
  853. {EM_DECODER_REG_R116, "r116", "r116", "r116"},
  854. {EM_DECODER_REG_R117, "r117", "r117", "r117"},
  855. {EM_DECODER_REG_R118, "r118", "r118", "r118"},
  856. {EM_DECODER_REG_R119, "r119", "r119", "r119"},
  857. {EM_DECODER_REG_R120, "r120", "r120", "r120"},
  858. {EM_DECODER_REG_R121, "r121", "r121", "r121"},
  859. {EM_DECODER_REG_R122, "r122", "r122", "r122"},
  860. {EM_DECODER_REG_R123, "r123", "r123", "r123"},
  861. {EM_DECODER_REG_R124, "r124", "r124", "r124"},
  862. {EM_DECODER_REG_R125, "r125", "r125", "r125"},
  863. {EM_DECODER_REG_R126, "r126", "r126", "r126"},
  864. {EM_DECODER_REG_R127, "r127", "r127", "r127"},
  865. {EM_DECODER_REG_F0, "f0", "f0", "f0" },
  866. {EM_DECODER_REG_F1, "f1", "f1", "f1" },
  867. {EM_DECODER_REG_F2, "f2", "f2", "f2" },
  868. {EM_DECODER_REG_F3, "f3", "f3", "f3" },
  869. {EM_DECODER_REG_F4, "f4", "f4", "f4" },
  870. {EM_DECODER_REG_F5, "f5", "f5", "f5" },
  871. {EM_DECODER_REG_F6, "f6", "f6", "f6" },
  872. {EM_DECODER_REG_F7, "f7", "f7", "f7" },
  873. {EM_DECODER_REG_F8, "f8", "farg0", "fret0"},
  874. {EM_DECODER_REG_F9, "f9", "farg1", "fret1"},
  875. {EM_DECODER_REG_F10, "f10", "farg2", "fret2"},
  876. {EM_DECODER_REG_F11, "f11", "farg3", "fret3"},
  877. {EM_DECODER_REG_F12, "f12", "farg4", "fret4"},
  878. {EM_DECODER_REG_F13, "f13", "farg5", "fret5"},
  879. {EM_DECODER_REG_F14, "f14", "farg6", "fret6"},
  880. {EM_DECODER_REG_F15, "f15", "farg7", "fret7"},
  881. {EM_DECODER_REG_F16, "f16", "f16", "f16" },
  882. {EM_DECODER_REG_F17, "f17", "f17", "f17" },
  883. {EM_DECODER_REG_F18, "f18", "f18", "f18" },
  884. {EM_DECODER_REG_F19, "f19", "f19", "f19" },
  885. {EM_DECODER_REG_F20, "f20", "f20", "f20" },
  886. {EM_DECODER_REG_F21, "f21", "f21", "f21" },
  887. {EM_DECODER_REG_F22, "f22", "f22", "f22" },
  888. {EM_DECODER_REG_F23, "f23", "f23", "f23" },
  889. {EM_DECODER_REG_F24, "f24", "f24", "f24" },
  890. {EM_DECODER_REG_F25, "f25", "f25", "f25" },
  891. {EM_DECODER_REG_F26, "f26", "f26", "f26" },
  892. {EM_DECODER_REG_F27, "f27", "f27", "f27" },
  893. {EM_DECODER_REG_F28, "f28", "f28", "f28" },
  894. {EM_DECODER_REG_F29, "f29", "f29", "f29" },
  895. {EM_DECODER_REG_F30, "f30", "f30", "f30" },
  896. {EM_DECODER_REG_F31, "f31", "f31", "f31" },
  897. {EM_DECODER_REG_F32, "f32", "f32", "f32" },
  898. {EM_DECODER_REG_F33, "f33", "f33", "f33" },
  899. {EM_DECODER_REG_F34, "f34", "f34", "f34" },
  900. {EM_DECODER_REG_F35, "f35", "f35", "f35" },
  901. {EM_DECODER_REG_F36, "f36", "f36", "f36" },
  902. {EM_DECODER_REG_F37, "f37", "f37", "f37" },
  903. {EM_DECODER_REG_F38, "f38", "f38", "f38" },
  904. {EM_DECODER_REG_F39, "f39", "f39", "f39" },
  905. {EM_DECODER_REG_F40, "f40", "f40", "f40" },
  906. {EM_DECODER_REG_F41, "f41", "f41", "f41" },
  907. {EM_DECODER_REG_F42, "f42", "f42", "f42" },
  908. {EM_DECODER_REG_F43, "f43", "f43", "f43" },
  909. {EM_DECODER_REG_F44, "f44", "f44", "f44" },
  910. {EM_DECODER_REG_F45, "f45", "f45", "f45" },
  911. {EM_DECODER_REG_F46, "f46", "f46", "f46" },
  912. {EM_DECODER_REG_F47, "f47", "f47", "f47" },
  913. {EM_DECODER_REG_F48, "f48", "f48", "f48" },
  914. {EM_DECODER_REG_F49, "f49", "f49", "f49" },
  915. {EM_DECODER_REG_F50, "f50", "f50", "f50" },
  916. {EM_DECODER_REG_F51, "f51", "f51", "f51" },
  917. {EM_DECODER_REG_F52, "f52", "f52", "f52" },
  918. {EM_DECODER_REG_F53, "f53", "f53", "f53" },
  919. {EM_DECODER_REG_F54, "f54", "f54", "f54" },
  920. {EM_DECODER_REG_F55, "f55", "f55", "f55" },
  921. {EM_DECODER_REG_F56, "f56", "f56", "f56" },
  922. {EM_DECODER_REG_F57, "f57", "f57", "f57" },
  923. {EM_DECODER_REG_F58, "f58", "f58", "f58" },
  924. {EM_DECODER_REG_F59, "f59", "f59", "f59" },
  925. {EM_DECODER_REG_F60, "f60", "f60", "f60" },
  926. {EM_DECODER_REG_F61, "f61", "f61", "f61" },
  927. {EM_DECODER_REG_F62, "f62", "f62", "f62" },
  928. {EM_DECODER_REG_F63, "f63", "f63", "f63" },
  929. {EM_DECODER_REG_F64, "f64", "f64", "f64" },
  930. {EM_DECODER_REG_F65, "f65", "f65", "f65" },
  931. {EM_DECODER_REG_F66, "f66", "f66", "f66" },
  932. {EM_DECODER_REG_F67, "f67", "f67", "f67" },
  933. {EM_DECODER_REG_F68, "f68", "f68", "f68" },
  934. {EM_DECODER_REG_F69, "f69", "f69", "f69" },
  935. {EM_DECODER_REG_F70, "f70", "f70", "f70" },
  936. {EM_DECODER_REG_F71, "f71", "f71", "f71" },
  937. {EM_DECODER_REG_F72, "f72", "f72", "f72" },
  938. {EM_DECODER_REG_F73, "f73", "f73", "f73" },
  939. {EM_DECODER_REG_F74, "f74", "f74", "f74" },
  940. {EM_DECODER_REG_F75, "f75", "f75", "f75" },
  941. {EM_DECODER_REG_F76, "f76", "f76", "f76" },
  942. {EM_DECODER_REG_F77, "f77", "f77", "f77" },
  943. {EM_DECODER_REG_F78, "f78", "f78", "f78" },
  944. {EM_DECODER_REG_F79, "f79", "f79", "f79" },
  945. {EM_DECODER_REG_F80, "f80", "f80", "f80" },
  946. {EM_DECODER_REG_F81, "f81", "f81", "f81" },
  947. {EM_DECODER_REG_F82, "f82", "f82", "f82" },
  948. {EM_DECODER_REG_F83, "f83", "f83", "f83" },
  949. {EM_DECODER_REG_F84, "f84", "f84", "f84" },
  950. {EM_DECODER_REG_F85, "f85", "f85", "f85" },
  951. {EM_DECODER_REG_F86, "f86", "f86", "f86" },
  952. {EM_DECODER_REG_F87, "f87", "f87", "f87" },
  953. {EM_DECODER_REG_F88, "f88", "f88", "f88" },
  954. {EM_DECODER_REG_F89, "f89", "f89", "f89" },
  955. {EM_DECODER_REG_F90, "f90", "f90", "f90" },
  956. {EM_DECODER_REG_F91, "f91", "f91", "f91" },
  957. {EM_DECODER_REG_F92, "f92", "f92", "f92" },
  958. {EM_DECODER_REG_F93, "f93", "f93", "f93" },
  959. {EM_DECODER_REG_F94, "f94", "f94", "f94" },
  960. {EM_DECODER_REG_F95, "f95", "f95", "f95" },
  961. {EM_DECODER_REG_F96, "f96", "f96", "f96" },
  962. {EM_DECODER_REG_F97, "f97", "f97", "f97" },
  963. {EM_DECODER_REG_F98, "f98", "f98", "f98" },
  964. {EM_DECODER_REG_F99, "f99", "f99", "f99" },
  965. {EM_DECODER_REG_F100, "f100", "f100", "f100" },
  966. {EM_DECODER_REG_F101, "f101", "f101", "f101" },
  967. {EM_DECODER_REG_F102, "f102", "f102", "f102" },
  968. {EM_DECODER_REG_F103, "f103", "f103", "f103" },
  969. {EM_DECODER_REG_F104, "f104", "f104", "f104" },
  970. {EM_DECODER_REG_F105, "f105", "f105", "f105" },
  971. {EM_DECODER_REG_F106, "f106", "f106", "f106" },
  972. {EM_DECODER_REG_F107, "f107", "f107", "f107" },
  973. {EM_DECODER_REG_F108, "f108", "f108", "f108" },
  974. {EM_DECODER_REG_F109, "f109", "f109", "f109" },
  975. {EM_DECODER_REG_F110, "f110", "f110", "f110" },
  976. {EM_DECODER_REG_F111, "f111", "f111", "f111" },
  977. {EM_DECODER_REG_F112, "f112", "f112", "f112" },
  978. {EM_DECODER_REG_F113, "f113", "f113", "f113" },
  979. {EM_DECODER_REG_F114, "f114", "f114", "f114" },
  980. {EM_DECODER_REG_F115, "f115", "f115", "f115" },
  981. {EM_DECODER_REG_F116, "f116", "f116", "f116" },
  982. {EM_DECODER_REG_F117, "f117", "f117", "f117" },
  983. {EM_DECODER_REG_F118, "f118", "f118", "f118" },
  984. {EM_DECODER_REG_F119, "f119", "f119", "f119" },
  985. {EM_DECODER_REG_F120, "f120", "f120", "f120" },
  986. {EM_DECODER_REG_F121, "f121", "f121", "f121" },
  987. {EM_DECODER_REG_F122, "f122", "f122", "f122" },
  988. {EM_DECODER_REG_F123, "f123", "f123", "f123" },
  989. {EM_DECODER_REG_F124, "f124", "f124", "f124" },
  990. {EM_DECODER_REG_F125, "f125", "f125", "f125" },
  991. {EM_DECODER_REG_F126, "f126", "f126", "f126" },
  992. {EM_DECODER_REG_F127, "f127", "f127", "f127" },
  993. {EM_DECODER_REG_AR0, "ar0", "ar.k0", "ar.kr0" },
  994. {EM_DECODER_REG_AR1, "ar1", "ar.k1", "ar.kr1" },
  995. {EM_DECODER_REG_AR2, "ar2", "ar.k2", "ar.kr2" },
  996. {EM_DECODER_REG_AR3, "ar3", "ar.k3", "ar.kr3" },
  997. {EM_DECODER_REG_AR4, "ar4", "ar.k4", "ar.kr4" },
  998. {EM_DECODER_REG_AR5, "ar5", "ar.k5", "ar.kr5" },
  999. {EM_DECODER_REG_AR6, "ar6", "ar.k6", "ar.kr6" },
  1000. {EM_DECODER_REG_AR7, "ar7", "ar.k7", "ar.kr7" },
  1001. {EM_DECODER_REG_AR8, "ar8", "ar8", "ar8-res" },
  1002. {EM_DECODER_REG_AR9, "ar9", "ar9", "ar9-res" },
  1003. {EM_DECODER_REG_AR10, "ar10", "ar10", "ar10-res" },
  1004. {EM_DECODER_REG_AR11, "ar11", "ar11", "ar11-res" },
  1005. {EM_DECODER_REG_AR12, "ar12", "ar12", "ar12-res" },
  1006. {EM_DECODER_REG_AR13, "ar13", "ar13", "ar13-res" },
  1007. {EM_DECODER_REG_AR14, "ar14", "ar14", "ar14-res" },
  1008. {EM_DECODER_REG_AR15, "ar15", "ar15", "ar15-res" },
  1009. {EM_DECODER_REG_AR16, "ar16", "ar.rsc", "ar.rsc" },
  1010. {EM_DECODER_REG_AR17, "ar17", "ar.bsp", "ar.bsp" },
  1011. {EM_DECODER_REG_AR18, "ar18", "ar.bspstore", "ar.bspstore"},
  1012. {EM_DECODER_REG_AR19, "ar19", "ar.rnat", "ar.rnat" },
  1013. {EM_DECODER_REG_AR20, "ar20", "ar20", "ar20-res" },
  1014. {EM_DECODER_REG_AR21, "ar21", "ar.fcr", "ar21-ia32" },
  1015. {EM_DECODER_REG_AR22, "ar22", "ar22", "ar22-res" },
  1016. {EM_DECODER_REG_AR23, "ar23", "ar23", "ar23-res" },
  1017. {EM_DECODER_REG_AR24, "ar24", "ar.eflag", "ar24-ia32" },
  1018. {EM_DECODER_REG_AR25, "ar25", "ar.csd", "ar25-ia32" },
  1019. {EM_DECODER_REG_AR26, "ar26", "ar.ssd", "ar26-ia32" },
  1020. {EM_DECODER_REG_AR27, "ar27", "ar.cflg", "ar27-ia32" },
  1021. {EM_DECODER_REG_AR28, "ar28", "ar.fsr", "ar28-ia32" },
  1022. {EM_DECODER_REG_AR29, "ar29", "ar.fir", "ar29-ia32" },
  1023. {EM_DECODER_REG_AR30, "ar30", "ar.fdr", "ar30-ia32" },
  1024. {EM_DECODER_REG_AR31, "ar31", "ar31", "ar31-res" },
  1025. {EM_DECODER_REG_AR32, "ar32", "ar.ccv", "ar.ccv" },
  1026. {EM_DECODER_REG_AR33, "ar33", "ar33", "ar33-res" },
  1027. {EM_DECODER_REG_AR34, "ar34", "ar34", "ar34-res" },
  1028. {EM_DECODER_REG_AR35, "ar35", "ar35", "ar35-res" },
  1029. {EM_DECODER_REG_AR36, "ar36", "ar.unat", "ar.unat" },
  1030. {EM_DECODER_REG_AR37, "ar37", "ar37", "ar37-res" },
  1031. {EM_DECODER_REG_AR38, "ar38", "ar38", "ar38-res" },
  1032. {EM_DECODER_REG_AR39, "ar39", "ar39", "ar39-res" },
  1033. {EM_DECODER_REG_AR40, "ar40", "ar.fpsr", "ar.fpsr" },
  1034. {EM_DECODER_REG_AR41, "ar41", "ar41", "ar41-res" },
  1035. {EM_DECODER_REG_AR42, "ar42", "ar42", "ar42-res" },
  1036. {EM_DECODER_REG_AR43, "ar43", "ar43", "ar43-res" },
  1037. {EM_DECODER_REG_AR44, "ar44", "ar.itc", "ar.itc" },
  1038. {EM_DECODER_REG_AR45, "ar45", "ar45", "ar45-res" },
  1039. {EM_DECODER_REG_AR46, "ar46", "ar46", "ar46-res" },
  1040. {EM_DECODER_REG_AR47, "ar47", "ar47", "ar47-res" },
  1041. {EM_DECODER_REG_AR48, "ar48", "ar48", "ar48-ign" },
  1042. {EM_DECODER_REG_AR49, "ar49", "ar49", "ar49-ign" },
  1043. {EM_DECODER_REG_AR50, "ar50", "ar50", "ar50-ign" },
  1044. {EM_DECODER_REG_AR51, "ar51", "ar51", "ar51-ign" },
  1045. {EM_DECODER_REG_AR52, "ar52", "ar52", "ar52-ign" },
  1046. {EM_DECODER_REG_AR53, "ar53", "ar53", "ar53-ign" },
  1047. {EM_DECODER_REG_AR54, "ar54", "ar54", "ar54-ign" },
  1048. {EM_DECODER_REG_AR55, "ar55", "ar55", "ar55-ign" },
  1049. {EM_DECODER_REG_AR56, "ar56", "ar56", "ar56-ign" },
  1050. {EM_DECODER_REG_AR57, "ar57", "ar57", "ar57-ign" },
  1051. {EM_DECODER_REG_AR58, "ar58", "ar58", "ar58-ign" },
  1052. {EM_DECODER_REG_AR59, "ar59", "ar59", "ar59-ign" },
  1053. {EM_DECODER_REG_AR60, "ar60", "ar60", "ar60-ign" },
  1054. {EM_DECODER_REG_AR61, "ar61", "ar61", "ar61-ign" },
  1055. {EM_DECODER_REG_AR62, "ar62", "ar62", "ar62-ign" },
  1056. {EM_DECODER_REG_AR63, "ar63", "ar63", "ar63-ign" },
  1057. {EM_DECODER_REG_AR64, "ar64", "ar.pfs", "ar.pfs" },
  1058. {EM_DECODER_REG_AR65, "ar65", "ar.lc", "ar.lc" },
  1059. {EM_DECODER_REG_AR66, "ar66", "ar.ec", "ar.ec" },
  1060. {EM_DECODER_REG_AR67, "ar67", "ar67", "ar67-res" },
  1061. {EM_DECODER_REG_AR68, "ar68", "ar68", "ar68-res" },
  1062. {EM_DECODER_REG_AR69, "ar69", "ar69", "ar69-res" },
  1063. {EM_DECODER_REG_AR70, "ar70", "ar70", "ar70-res" },
  1064. {EM_DECODER_REG_AR71, "ar71", "ar71", "ar71-res" },
  1065. {EM_DECODER_REG_AR72, "ar72", "ar72", "ar72-res" },
  1066. {EM_DECODER_REG_AR73, "ar73", "ar73", "ar73-res" },
  1067. {EM_DECODER_REG_AR74, "ar74", "ar74", "ar74-res" },
  1068. {EM_DECODER_REG_AR75, "ar75", "ar75", "ar75-res" },
  1069. {EM_DECODER_REG_AR76, "ar76", "ar76", "ar76-res" },
  1070. {EM_DECODER_REG_AR77, "ar77", "ar77", "ar77-res" },
  1071. {EM_DECODER_REG_AR78, "ar78", "ar78", "ar78-res" },
  1072. {EM_DECODER_REG_AR79, "ar79", "ar79", "ar79-res" },
  1073. {EM_DECODER_REG_AR80, "ar80", "ar80", "ar80-res" },
  1074. {EM_DECODER_REG_AR81, "ar81", "ar81", "ar81-res" },
  1075. {EM_DECODER_REG_AR82, "ar82", "ar82", "ar82-res" },
  1076. {EM_DECODER_REG_AR83, "ar83", "ar83", "ar83-res" },
  1077. {EM_DECODER_REG_AR84, "ar84", "ar84", "ar84-res" },
  1078. {EM_DECODER_REG_AR85, "ar85", "ar85", "ar85-res" },
  1079. {EM_DECODER_REG_AR86, "ar86", "ar86", "ar86-res" },
  1080. {EM_DECODER_REG_AR87, "ar87", "ar87", "ar87-res" },
  1081. {EM_DECODER_REG_AR88, "ar88", "ar88", "ar88-res" },
  1082. {EM_DECODER_REG_AR89, "ar89", "ar89", "ar89-res" },
  1083. {EM_DECODER_REG_AR90, "ar90", "ar90", "ar90-res" },
  1084. {EM_DECODER_REG_AR91, "ar91", "ar91", "ar91-res" },
  1085. {EM_DECODER_REG_AR92, "ar92", "ar92", "ar92-res" },
  1086. {EM_DECODER_REG_AR93, "ar93", "ar93", "ar93-res" },
  1087. {EM_DECODER_REG_AR94, "ar94", "ar94", "ar94-res" },
  1088. {EM_DECODER_REG_AR95, "ar95", "ar95", "ar95-res" },
  1089. {EM_DECODER_REG_AR96, "ar96", "ar96", "ar96-res" },
  1090. {EM_DECODER_REG_AR97, "ar97", "ar97", "ar97-res" },
  1091. {EM_DECODER_REG_AR98, "ar98", "ar98", "ar98-res" },
  1092. {EM_DECODER_REG_AR99, "ar99", "ar99", "ar99-res" },
  1093. {EM_DECODER_REG_AR100, "ar100", "ar100", "ar100-res" },
  1094. {EM_DECODER_REG_AR101, "ar101", "ar101", "ar101-res" },
  1095. {EM_DECODER_REG_AR102, "ar102", "ar102", "ar102-res" },
  1096. {EM_DECODER_REG_AR103, "ar103", "ar103", "ar103-res" },
  1097. {EM_DECODER_REG_AR104, "ar104", "ar104", "ar104-res" },
  1098. {EM_DECODER_REG_AR105, "ar105", "ar105", "ar105-res" },
  1099. {EM_DECODER_REG_AR106, "ar106", "ar106", "ar106-res" },
  1100. {EM_DECODER_REG_AR107, "ar107", "ar107", "ar107-res" },
  1101. {EM_DECODER_REG_AR108, "ar108", "ar108", "ar108-res" },
  1102. {EM_DECODER_REG_AR109, "ar109", "ar109", "ar109-res" },
  1103. {EM_DECODER_REG_AR110, "ar110", "ar110", "ar110-res" },
  1104. {EM_DECODER_REG_AR111, "ar111", "ar111", "ar111-res" },
  1105. {EM_DECODER_REG_AR112, "ar112", "ar112", "ar112-ign" },
  1106. {EM_DECODER_REG_AR113, "ar113", "ar113", "ar113-ign" },
  1107. {EM_DECODER_REG_AR114, "ar114", "ar114", "ar114-ign" },
  1108. {EM_DECODER_REG_AR115, "ar115", "ar115", "ar115-ign" },
  1109. {EM_DECODER_REG_AR116, "ar116", "ar116", "ar116-ign" },
  1110. {EM_DECODER_REG_AR117, "ar117", "ar117", "ar117-ign" },
  1111. {EM_DECODER_REG_AR118, "ar118", "ar118", "ar118-ign" },
  1112. {EM_DECODER_REG_AR119, "ar119", "ar119", "ar119-ign" },
  1113. {EM_DECODER_REG_AR120, "ar120", "ar120", "ar120-ign" },
  1114. {EM_DECODER_REG_AR121, "ar121", "ar121", "ar121-ign" },
  1115. {EM_DECODER_REG_AR122, "ar122", "ar122", "ar122-ign" },
  1116. {EM_DECODER_REG_AR123, "ar123", "ar123", "ar123-ign" },
  1117. {EM_DECODER_REG_AR124, "ar124", "ar124", "ar124-ign" },
  1118. {EM_DECODER_REG_AR125, "ar125", "ar125", "ar125-ign" },
  1119. {EM_DECODER_REG_AR126, "ar126", "ar126", "ar126-ign" },
  1120. {EM_DECODER_REG_AR127, "ar127", "ar127", "ar127-ign" },
  1121. {EM_DECODER_REG_P0, "p0", "p0", "p0" },
  1122. {EM_DECODER_REG_P1, "p1", "p1", "p1" },
  1123. {EM_DECODER_REG_P2, "p2", "p2", "p2" },
  1124. {EM_DECODER_REG_P3, "p3", "p3", "p3" },
  1125. {EM_DECODER_REG_P4, "p4", "p4", "p4" },
  1126. {EM_DECODER_REG_P5, "p5", "p5", "p5" },
  1127. {EM_DECODER_REG_P6, "p6", "p6", "p6" },
  1128. {EM_DECODER_REG_P7, "p7", "p7", "p7" },
  1129. {EM_DECODER_REG_P8, "p8", "p8", "p8" },
  1130. {EM_DECODER_REG_P9, "p9", "p9", "p9" },
  1131. {EM_DECODER_REG_P10, "p10", "p10", "p10"},
  1132. {EM_DECODER_REG_P11, "p11", "p11", "p11"},
  1133. {EM_DECODER_REG_P12, "p12", "p12", "p12"},
  1134. {EM_DECODER_REG_P13, "p13", "p13", "p13"},
  1135. {EM_DECODER_REG_P14, "p14", "p14", "p14"},
  1136. {EM_DECODER_REG_P15, "p15", "p15", "p15"},
  1137. {EM_DECODER_REG_P16, "p16", "p16", "p16"},
  1138. {EM_DECODER_REG_P17, "p17", "p17", "p17"},
  1139. {EM_DECODER_REG_P18, "p18", "p18", "p18"},
  1140. {EM_DECODER_REG_P19, "p19", "p19", "p19"},
  1141. {EM_DECODER_REG_P20, "p20", "p20", "p20"},
  1142. {EM_DECODER_REG_P21, "p21", "p21", "p21"},
  1143. {EM_DECODER_REG_P22, "p22", "p22", "p22"},
  1144. {EM_DECODER_REG_P23, "p23", "p23", "p23"},
  1145. {EM_DECODER_REG_P24, "p24", "p24", "p24"},
  1146. {EM_DECODER_REG_P25, "p25", "p25", "p25"},
  1147. {EM_DECODER_REG_P26, "p26", "p26", "p26"},
  1148. {EM_DECODER_REG_P27, "p27", "p27", "p27"},
  1149. {EM_DECODER_REG_P28, "p28", "p28", "p28"},
  1150. {EM_DECODER_REG_P29, "p29", "p29", "p29"},
  1151. {EM_DECODER_REG_P30, "p30", "p30", "p30"},
  1152. {EM_DECODER_REG_P31, "p31", "p31", "p31"},
  1153. {EM_DECODER_REG_P32, "p32", "p32", "p32"},
  1154. {EM_DECODER_REG_P33, "p33", "p33", "p33"},
  1155. {EM_DECODER_REG_P34, "p34", "p34", "p34"},
  1156. {EM_DECODER_REG_P35, "p35", "p35", "p35"},
  1157. {EM_DECODER_REG_P36, "p36", "p36", "p36"},
  1158. {EM_DECODER_REG_P37, "p37", "p37", "p37"},
  1159. {EM_DECODER_REG_P38, "p38", "p38", "p38"},
  1160. {EM_DECODER_REG_P39, "p39", "p39", "p39"},
  1161. {EM_DECODER_REG_P40, "p40", "p40", "p40"},
  1162. {EM_DECODER_REG_P41, "p41", "p41", "p41"},
  1163. {EM_DECODER_REG_P42, "p42", "p42", "p42"},
  1164. {EM_DECODER_REG_P43, "p43", "p43", "p43"},
  1165. {EM_DECODER_REG_P44, "p44", "p44", "p44"},
  1166. {EM_DECODER_REG_P45, "p45", "p45", "p45"},
  1167. {EM_DECODER_REG_P46, "p46", "p46", "p46"},
  1168. {EM_DECODER_REG_P47, "p47", "p47", "p47"},
  1169. {EM_DECODER_REG_P48, "p48", "p48", "p48"},
  1170. {EM_DECODER_REG_P49, "p49", "p49", "p49"},
  1171. {EM_DECODER_REG_P50, "p50", "p50", "p50"},
  1172. {EM_DECODER_REG_P51, "p51", "p51", "p51"},
  1173. {EM_DECODER_REG_P52, "p52", "p52", "p52"},
  1174. {EM_DECODER_REG_P53, "p53", "p53", "p53"},
  1175. {EM_DECODER_REG_P54, "p54", "p54", "p54"},
  1176. {EM_DECODER_REG_P55, "p55", "p55", "p55"},
  1177. {EM_DECODER_REG_P56, "p56", "p56", "p56"},
  1178. {EM_DECODER_REG_P57, "p57", "p57", "p57"},
  1179. {EM_DECODER_REG_P58, "p58", "p58", "p58"},
  1180. {EM_DECODER_REG_P59, "p59", "p59", "p59"},
  1181. {EM_DECODER_REG_P60, "p60", "p60", "p60"},
  1182. {EM_DECODER_REG_P61, "p61", "p61", "p61"},
  1183. {EM_DECODER_REG_P62, "p62", "p62", "p62"},
  1184. {EM_DECODER_REG_P63, "p63", "p63", "p63"},
  1185. {EM_DECODER_REG_BR0, "b0", "rp", "bret"},
  1186. {EM_DECODER_REG_BR1, "b1", "b1", "b1" },
  1187. {EM_DECODER_REG_BR2, "b2", "b2", "b2" },
  1188. {EM_DECODER_REG_BR3, "b3", "b3", "b3" },
  1189. {EM_DECODER_REG_BR4, "b4", "b4", "b4" },
  1190. {EM_DECODER_REG_BR5, "b5", "b5", "b5" },
  1191. {EM_DECODER_REG_BR6, "b6", "b6", "b6" },
  1192. {EM_DECODER_REG_BR7, "b7", "b7", "b7" },
  1193. {EM_DECODER_REG_PR, "pr", "pr", "pr" },
  1194. {EM_DECODER_REG_PR_ROT, "pr.rot", "pr.rot", "pr.rot" },
  1195. {EM_DECODER_REG_CR0, "cr0", "cr.dcr", "cr.dcr" },
  1196. {EM_DECODER_REG_CR1, "cr1", "cr.itm", "cr.itm" },
  1197. {EM_DECODER_REG_CR2, "cr2", "cr.iva", "cr.iva" },
  1198. {EM_DECODER_REG_CR3, "cr3", "cr3", "cr3-res" },
  1199. {EM_DECODER_REG_CR4, "cr4", "cr4", "cr4-res" },
  1200. {EM_DECODER_REG_CR5, "cr5", "cr5", "cr5-res" },
  1201. {EM_DECODER_REG_CR6, "cr6", "cr6", "cr6-res" },
  1202. {EM_DECODER_REG_CR7, "cr7", "cr7", "cr7-res" },
  1203. {EM_DECODER_REG_CR8, "cr8", "cr.pta", "cr.pta" },
  1204. {EM_DECODER_REG_CR9, "cr9", "cr.gpta", "cr.gpta" },
  1205. {EM_DECODER_REG_CR10, "cr10", "cr10", "cr10-res" },
  1206. {EM_DECODER_REG_CR11, "cr11", "cr11", "cr11-res" },
  1207. {EM_DECODER_REG_CR12, "cr12", "cr12", "cr12-res" },
  1208. {EM_DECODER_REG_CR13, "cr13", "cr13", "cr13-res" },
  1209. {EM_DECODER_REG_CR14, "cr14", "cr14", "cr14-res" },
  1210. {EM_DECODER_REG_CR15, "cr15", "cr15", "cr15-res" },
  1211. {EM_DECODER_REG_CR16, "cr16", "cr.ipsr", "cr.ipsr" },
  1212. {EM_DECODER_REG_CR17, "cr17", "cr.isr", "cr.isr" },
  1213. {EM_DECODER_REG_CR18, "cr18", "cr18", "cr18-res" },
  1214. {EM_DECODER_REG_CR19, "cr19", "cr.iip", "cr.iip" },
  1215. {EM_DECODER_REG_CR20, "cr20", "cr.ifa", "cr.ifa" },
  1216. {EM_DECODER_REG_CR21, "cr21", "cr.itir", "cr.itir" },
  1217. {EM_DECODER_REG_CR22, "cr22", "cr.iipa", "cr.iipa" },
  1218. {EM_DECODER_REG_CR23, "cr23", "cr.ifs", "cr.ifs" },
  1219. {EM_DECODER_REG_CR24, "cr24", "cr.iim", "cr.iim" },
  1220. {EM_DECODER_REG_CR25, "cr25", "cr.iha", "cr.iha" },
  1221. {EM_DECODER_REG_CR26, "cr26", "cr26", "cr26-res" },
  1222. {EM_DECODER_REG_CR27, "cr27", "cr27", "cr27-res" },
  1223. {EM_DECODER_REG_CR28, "cr28", "cr28", "cr28-res" },
  1224. {EM_DECODER_REG_CR29, "cr29", "cr29", "cr29-res" },
  1225. {EM_DECODER_REG_CR30, "cr30", "cr30", "cr30-res" },
  1226. {EM_DECODER_REG_CR31, "cr31", "cr31", "cr31-res" },
  1227. {EM_DECODER_REG_CR32, "cr32", "cr32", "cr32-res" },
  1228. {EM_DECODER_REG_CR33, "cr33", "cr33", "cr33-res" },
  1229. {EM_DECODER_REG_CR34, "cr34", "cr34", "cr34-res" },
  1230. {EM_DECODER_REG_CR35, "cr35", "cr35", "cr35-res" },
  1231. {EM_DECODER_REG_CR36, "cr36", "cr36", "cr36-res" },
  1232. {EM_DECODER_REG_CR37, "cr37", "cr37", "cr37-res" },
  1233. {EM_DECODER_REG_CR38, "cr38", "cr38", "cr38-res" },
  1234. {EM_DECODER_REG_CR39, "cr39", "cr39", "cr39-res" },
  1235. {EM_DECODER_REG_CR40, "cr40", "cr40", "cr40-res" },
  1236. {EM_DECODER_REG_CR41, "cr41", "cr41", "cr41-res" },
  1237. {EM_DECODER_REG_CR42, "cr42", "cr42", "cr42-res" },
  1238. {EM_DECODER_REG_CR43, "cr43", "cr43", "cr43-res" },
  1239. {EM_DECODER_REG_CR44, "cr44", "cr44", "cr44-res" },
  1240. {EM_DECODER_REG_CR45, "cr45", "cr45", "cr45-res" },
  1241. {EM_DECODER_REG_CR46, "cr46", "cr46", "cr46-res" },
  1242. {EM_DECODER_REG_CR47, "cr47", "cr47", "cr47-res" },
  1243. {EM_DECODER_REG_CR48, "cr48", "cr48", "cr48-res" },
  1244. {EM_DECODER_REG_CR49, "cr49", "cr49", "cr49-res" },
  1245. {EM_DECODER_REG_CR50, "cr50", "cr50", "cr50-res" },
  1246. {EM_DECODER_REG_CR51, "cr51", "cr51", "cr51-res" },
  1247. {EM_DECODER_REG_CR52, "cr52", "cr52", "cr52-res" },
  1248. {EM_DECODER_REG_CR53, "cr53", "cr53", "cr53-res" },
  1249. {EM_DECODER_REG_CR54, "cr54", "cr54", "cr54-res" },
  1250. {EM_DECODER_REG_CR55, "cr55", "cr55", "cr55-res" },
  1251. {EM_DECODER_REG_CR56, "cr56", "cr56", "cr56-res" },
  1252. {EM_DECODER_REG_CR57, "cr57", "cr57", "cr57-res" },
  1253. {EM_DECODER_REG_CR58, "cr58", "cr58", "cr58-res" },
  1254. {EM_DECODER_REG_CR59, "cr59", "cr59", "cr59-res" },
  1255. {EM_DECODER_REG_CR60, "cr60", "cr60", "cr60-res" },
  1256. {EM_DECODER_REG_CR61, "cr61", "cr61", "cr61-res" },
  1257. {EM_DECODER_REG_CR62, "cr62", "cr62", "cr62-res" },
  1258. {EM_DECODER_REG_CR63, "cr63", "cr63", "cr63-res" },
  1259. {EM_DECODER_REG_CR64, "cr64", "cr.lid", "cr.lid" },
  1260. {EM_DECODER_REG_CR65, "cr65", "cr.ivr", "cr.ivr" },
  1261. {EM_DECODER_REG_CR66, "cr66", "cr.tpr", "cr.tpr" },
  1262. {EM_DECODER_REG_CR67, "cr67", "cr.eoi", "cr.eoi" },
  1263. {EM_DECODER_REG_CR68, "cr68", "cr.irr0", "cr.irr0" },
  1264. {EM_DECODER_REG_CR69, "cr69", "cr.irr1", "cr.irr1" },
  1265. {EM_DECODER_REG_CR70, "cr70", "cr.irr2", "cr.irr2" },
  1266. {EM_DECODER_REG_CR71, "cr71", "cr.irr3", "cr.irr3" },
  1267. {EM_DECODER_REG_CR72, "cr72", "cr.itv", "cr.itv" },
  1268. {EM_DECODER_REG_CR73, "cr73", "cr.pmv", "cr.pmv" },
  1269. {EM_DECODER_REG_CR74, "cr74", "cr.cmcv", "cr.cmcv" },
  1270. {EM_DECODER_REG_CR75, "cr75", "cr75", "cr75-res" },
  1271. {EM_DECODER_REG_CR76, "cr76", "cr76", "cr76-res" },
  1272. {EM_DECODER_REG_CR77, "cr77", "cr77", "cr77-res" },
  1273. {EM_DECODER_REG_CR78, "cr78", "cr78", "cr78-res" },
  1274. {EM_DECODER_REG_CR79, "cr79", "cr79", "cr79-res" },
  1275. {EM_DECODER_REG_CR80, "cr80", "cr.lrr0", "cr.lrr0" },
  1276. {EM_DECODER_REG_CR81, "cr81", "cr.lrr1", "cr.lrr1" },
  1277. {EM_DECODER_REG_CR82, "cr82", "cr82", "cr82-res" },
  1278. {EM_DECODER_REG_CR83, "cr83", "cr83", "cr83-res" },
  1279. {EM_DECODER_REG_CR84, "cr84", "cr84", "cr84-res" },
  1280. {EM_DECODER_REG_CR85, "cr85", "cr85", "cr85-res" },
  1281. {EM_DECODER_REG_CR86, "cr86", "cr86", "cr86-res" },
  1282. {EM_DECODER_REG_CR87, "cr87", "cr87", "cr87-res" },
  1283. {EM_DECODER_REG_CR88, "cr88", "cr88", "cr88-res" },
  1284. {EM_DECODER_REG_CR89, "cr89", "cr89", "cr89-res" },
  1285. {EM_DECODER_REG_CR90, "cr90", "cr90", "cr90-res" },
  1286. {EM_DECODER_REG_CR91, "cr91", "cr91", "cr91-res" },
  1287. {EM_DECODER_REG_CR92, "cr92", "cr92", "cr92-res" },
  1288. {EM_DECODER_REG_CR93, "cr93", "cr93", "cr93-res" },
  1289. {EM_DECODER_REG_CR94, "cr94", "cr94", "cr94-res" },
  1290. {EM_DECODER_REG_CR95, "cr95", "cr95", "cr95-res" },
  1291. {EM_DECODER_REG_CR96, "cr96", "cr96", "cr96-res" },
  1292. {EM_DECODER_REG_CR97, "cr97", "cr97", "cr97-res" },
  1293. {EM_DECODER_REG_CR98, "cr98", "cr98", "cr98-res" },
  1294. {EM_DECODER_REG_CR99, "cr99", "cr99", "cr99-res" },
  1295. {EM_DECODER_REG_CR100, "cr100", "cr100", "cr100-res"},
  1296. {EM_DECODER_REG_CR101, "cr101", "cr101", "cr101-res"},
  1297. {EM_DECODER_REG_CR102, "cr102", "cr102", "cr102-res"},
  1298. {EM_DECODER_REG_CR103, "cr103", "cr103", "cr103-res"},
  1299. {EM_DECODER_REG_CR104, "cr104", "cr104", "cr104-res"},
  1300. {EM_DECODER_REG_CR105, "cr105", "cr105", "cr105-res"},
  1301. {EM_DECODER_REG_CR106, "cr106", "cr106", "cr106-res"},
  1302. {EM_DECODER_REG_CR107, "cr107", "cr107", "cr107-res"},
  1303. {EM_DECODER_REG_CR108, "cr108", "cr108", "cr108-res"},
  1304. {EM_DECODER_REG_CR109, "cr109", "cr109", "cr109-res"},
  1305. {EM_DECODER_REG_CR110, "cr110", "cr110", "cr110-res"},
  1306. {EM_DECODER_REG_CR111, "cr111", "cr111", "cr111-res"},
  1307. {EM_DECODER_REG_CR112, "cr112", "cr112", "cr112-res"},
  1308. {EM_DECODER_REG_CR113, "cr113", "cr113", "cr113-res"},
  1309. {EM_DECODER_REG_CR114, "cr114", "cr114", "cr114-res"},
  1310. {EM_DECODER_REG_CR115, "cr115", "cr115", "cr115-res"},
  1311. {EM_DECODER_REG_CR116, "cr116", "cr116", "cr116-res"},
  1312. {EM_DECODER_REG_CR117, "cr117", "cr117", "cr117-res"},
  1313. {EM_DECODER_REG_CR118, "cr118", "cr118", "cr118-res"},
  1314. {EM_DECODER_REG_CR119, "cr119", "cr119", "cr119-res"},
  1315. {EM_DECODER_REG_CR120, "cr120", "cr120", "cr120-res"},
  1316. {EM_DECODER_REG_CR121, "cr121", "cr121", "cr121-res"},
  1317. {EM_DECODER_REG_CR122, "cr122", "cr122", "cr122-res"},
  1318. {EM_DECODER_REG_CR123, "cr123", "cr123", "cr123-res"},
  1319. {EM_DECODER_REG_CR124, "cr124", "cr124", "cr124-res"},
  1320. {EM_DECODER_REG_CR125, "cr125", "cr125", "cr125-res"},
  1321. {EM_DECODER_REG_CR126, "cr126", "cr126", "cr126-res"},
  1322. {EM_DECODER_REG_CR127, "cr127", "cr127", "cr127-res"},
  1323. {EM_DECODER_REG_PSR, "psr", "psr", "psr" },
  1324. {EM_DECODER_REG_PSR_L, "psr.l", "psr.l", "psr.l" },
  1325. {EM_DECODER_REG_PSR_UM, "psr.um", "psr.um", "psr.um" },
  1326. {EM_DECODER_REG_IP, "IP", "IP", "ip" },
  1327. {EM_DECODER_EM_REG_LAST, "", "", ""},
  1328. {EM_DECODER_REG_LAST, "", "", ""}
  1329. };
  1330. UCHAR g_Ia64Disinstr[EM_BUNDLE_SIZE];
  1331. /******************************************************************
  1332. ** Simple IA64 template info... Thierry 12/99.
  1333. **
  1334. */
  1335. #define GET_TEMPLATE(Bits) \
  1336. ((EM_template_t)(((Bits) >> EM_TEMPLATE_POS) & (EM_NUM_OF_TEMPLATES - 1)))
  1337. typedef enum _EM_UNIT {
  1338. I_Unit,
  1339. M_Unit,
  1340. F_Unit,
  1341. B_Unit,
  1342. X_Unit,
  1343. L_Unit,
  1344. A_Unit,
  1345. No_Unit
  1346. } EM_UNIT;
  1347. typedef enum _EM_SB {
  1348. SB_Cont,
  1349. SB_Stop
  1350. } EM_SB;
  1351. typedef struct _EM_TEMPLATE_INFO {
  1352. struct {
  1353. EM_UNIT unit;
  1354. EM_SB stop;
  1355. } slot[EM_SLOT_LAST];
  1356. const char *name;
  1357. } EM_TEMPLATE_INFO, *PEM_TEMPLATE_INFO;
  1358. EM_TEMPLATE_INFO EmTemplates[] = {
  1359. /* Slot 0 Slot 1 Slot 2
  1360. ----------------------------------------------------------*/
  1361. { {{M_Unit, SB_Cont}, {I_Unit, SB_Cont}, {I_Unit, SB_Cont}}, ".mii " },
  1362. { {{M_Unit, SB_Cont}, {I_Unit, SB_Stop}, {I_Unit, SB_Cont}}, ".mi_i" },
  1363. { {{M_Unit, SB_Cont}, {L_Unit, SB_Cont}, {X_Unit, SB_Cont}}, ".mlx " },
  1364. { {{No_Unit, SB_Cont}, {No_Unit, SB_Cont}, {No_Unit, SB_Cont}}, "?res " },
  1365. { {{M_Unit, SB_Cont}, {M_Unit, SB_Cont}, {I_Unit, SB_Cont}}, ".mmi " },
  1366. { {{M_Unit, SB_Stop}, {M_Unit, SB_Cont}, {I_Unit, SB_Cont}}, ".m_mi" },
  1367. { {{M_Unit, SB_Cont}, {F_Unit, SB_Cont}, {I_Unit, SB_Cont}}, ".mfi " },
  1368. { {{M_Unit, SB_Cont}, {M_Unit, SB_Cont}, {F_Unit, SB_Cont}}, ".mmf " },
  1369. { {{M_Unit, SB_Cont}, {I_Unit, SB_Cont}, {B_Unit, SB_Cont}}, ".mib " },
  1370. { {{M_Unit, SB_Cont}, {B_Unit, SB_Cont}, {B_Unit, SB_Cont}}, ".mbb " },
  1371. { {{No_Unit, SB_Cont}, {No_Unit, SB_Cont}, {No_Unit, SB_Cont}}, "?res " },
  1372. { {{B_Unit, SB_Cont}, {B_Unit, SB_Cont}, {B_Unit, SB_Cont}}, ".bbb " },
  1373. { {{M_Unit, SB_Cont}, {M_Unit, SB_Cont}, {B_Unit, SB_Cont}}, ".mmb " },
  1374. { {{No_Unit, SB_Cont}, {No_Unit, SB_Cont}, {No_Unit, SB_Cont}}, "?res " },
  1375. { {{M_Unit, SB_Cont}, {F_Unit, SB_Cont}, {B_Unit, SB_Cont}}, ".mfb " },
  1376. { {{No_Unit, SB_Cont}, {No_Unit, SB_Cont}, {No_Unit, SB_Cont}}, "?res " },
  1377. };
  1378. PEM_TEMPLATE_INFO __inline
  1379. EmTemplateInfo(EM_template_t Template)
  1380. {
  1381. if (Template >= sizeof(EmTemplates)/sizeof(EmTemplates[0]))
  1382. {
  1383. return NULL;
  1384. }
  1385. return &EmTemplates[Template];
  1386. }
  1387. /*
  1388. ** End of Simple IA64 template info.
  1389. *******************************************************************
  1390. */
  1391. /**** disasm - disassemble an IA64 instruction
  1392. * Purpose:
  1393. * Disassemble version based on Falcon DISASM.DLL
  1394. *
  1395. * Input:
  1396. * pOffset = pointer to offset to start disassembly
  1397. * fEAout = if set, include EA (effective address)
  1398. *
  1399. * Output:
  1400. * pOffset = pointer to offset of next instruction
  1401. * pchDst = pointer to result string
  1402. *
  1403. ***************************************************************************/
  1404. BOOL
  1405. Ia64MachineInfo::Disassemble(ProcessInfo* Process,
  1406. PADDR poffset, PSTR bufptr, BOOL fEAout)
  1407. {
  1408. U64 location;
  1409. ULONG64 gb_offset;
  1410. UINT ascii_inst_buf_length;
  1411. PUINT pascii_inst_buf_length = &ascii_inst_buf_length;
  1412. ULONG bin_inst_buf_length;
  1413. unsigned int actual_length;
  1414. ADDR tempaddr;
  1415. UCHAR * pbin_inst_buf = &g_Ia64Disinstr[0];
  1416. CIa64Disasm Disasm(m_Target, this);
  1417. if (IS_CONTEXT_POSSIBLE(m_Target) && IsIA32InstructionSet())
  1418. {
  1419. WarnOut("The current context is in IA32 mode. "
  1420. "IA64 disassembly may be inaccurate.\n");
  1421. }
  1422. IEL_ZERO(location);
  1423. // convert EM address to Gambit internal address.
  1424. // i.e., move slot number from bit(2,3) to bit(0,1)
  1425. gb_offset = ((Flat(*poffset) & (~0xf)) | ((Flat(*poffset) & 0xf) >> 2));
  1426. IEL_ASSIGNU(location, *(U64*)(&gb_offset));
  1427. // convert to bundle address. must be 16 byte aligned
  1428. ADDRFLAT(&tempaddr, (Flat(*poffset) & ~0xf));
  1429. // copy data (if KD, from remote system) to local temp buffer -
  1430. // g_Ia64Disinstr[]
  1431. if (m_Target->ReadVirtual(Process, Flat(tempaddr),
  1432. pbin_inst_buf, sizeof(U128),
  1433. &bin_inst_buf_length) != S_OK)
  1434. {
  1435. bin_inst_buf_length = 0;
  1436. }
  1437. m_BufStart = (PCHAR)bufptr;
  1438. m_Buf = m_BufStart;
  1439. // display 64-bit address
  1440. sprintf(m_Buf, "%s ", FormatAddr64(Flat(*poffset)));
  1441. m_Buf += strlen(m_Buf);
  1442. // TBD display opcode
  1443. // If we're in verbose mode leave space for the bundle type.
  1444. if (g_AsmOptions & DEBUG_ASMOPT_VERBOSE)
  1445. {
  1446. // Show the bundle type at the beginning of the bundle.
  1447. if (AddrEqu(tempaddr, *poffset))
  1448. {
  1449. if (bin_inst_buf_length == sizeof(U128))
  1450. {
  1451. PEM_TEMPLATE_INFO Templ =
  1452. EmTemplateInfo(GET_TEMPLATE(pbin_inst_buf[0]));
  1453. if (Templ)
  1454. {
  1455. sprintf(m_Buf, "{ %s", Templ->name);
  1456. }
  1457. else
  1458. {
  1459. sprintf(m_Buf, "{ invalid_template");
  1460. }
  1461. }
  1462. else
  1463. {
  1464. strcpy(m_Buf, "{ ??? ");
  1465. }
  1466. }
  1467. else
  1468. {
  1469. strcpy(m_Buf, " ");
  1470. }
  1471. m_Buf += strlen(m_Buf);
  1472. }
  1473. if (bin_inst_buf_length != sizeof(U128))
  1474. {
  1475. BufferString(" ???????? ????\n");
  1476. *m_Buf = '\0';
  1477. return FALSE;
  1478. }
  1479. *pascii_inst_buf_length = ASCII_BUF_LENGTH;
  1480. if (!Disasm.Disassemble(
  1481. Flat(*poffset), *(CIa64Disasm::SBundle*)pbin_inst_buf,
  1482. &actual_length,
  1483. m_Buf, *pascii_inst_buf_length, (fEAout != FALSE)))
  1484. {
  1485. ErrOut("Dissassembler failure!!!!\n");
  1486. }
  1487. switch (EM_IL_GET_SLOT_NO(location))
  1488. {
  1489. case 0:
  1490. IEL_INCU(location);
  1491. break;
  1492. case 1:
  1493. IEL_INCU(location);
  1494. if ((actual_length) != 2)
  1495. {
  1496. break;
  1497. }
  1498. /*** else fall-through ***/
  1499. case 2:
  1500. U32 syl_size;
  1501. IEL_CONVERT1(syl_size, EM_BUNDLE_SIZE-2);
  1502. IEL_ADDU((location), syl_size, (location));
  1503. break;
  1504. }
  1505. gb_offset = ((ULONG64)IEL_GETQW0(location));
  1506. // convert Gambit internal address to EM address
  1507. Off(*poffset) = (gb_offset & (~0xf)) | ((gb_offset & 0xf) << 2);
  1508. NotFlat(*poffset);
  1509. ComputeFlatAddress(poffset, NULL);
  1510. m_Buf += strlen(m_Buf);
  1511. // If this the last instruction of a bundle mark it.
  1512. if ((Flat(*poffset) & 0xf) == 0)
  1513. {
  1514. if (g_AsmOptions & DEBUG_ASMOPT_VERBOSE)
  1515. {
  1516. strcpy(m_Buf, "}\n");
  1517. m_Buf += strlen(m_Buf);
  1518. }
  1519. else
  1520. {
  1521. *m_Buf++ = '\n';
  1522. }
  1523. }
  1524. /* add new line at the end */
  1525. *m_Buf++ = '\n';
  1526. *m_Buf = '\0';
  1527. return TRUE;
  1528. }
  1529. HRESULT
  1530. Ia64MachineInfo::NewBreakpoint(DebugClient* Client,
  1531. ULONG Type,
  1532. ULONG Id,
  1533. Breakpoint** RetBp)
  1534. {
  1535. HRESULT Status;
  1536. switch(Type & (DEBUG_BREAKPOINT_CODE | DEBUG_BREAKPOINT_DATA))
  1537. {
  1538. case DEBUG_BREAKPOINT_CODE:
  1539. *RetBp = new CodeBreakpoint(Client, Id, IMAGE_FILE_MACHINE_IA64);
  1540. Status = (*RetBp) ? S_OK : E_OUTOFMEMORY;
  1541. break;
  1542. case DEBUG_BREAKPOINT_DATA:
  1543. *RetBp = new Ia64DataBreakpoint(Client, Id);
  1544. Status = (*RetBp) ? S_OK : E_OUTOFMEMORY;
  1545. break;
  1546. default:
  1547. // Unknown breakpoint type.
  1548. Status = E_NOINTERFACE;
  1549. }
  1550. return Status;
  1551. }
  1552. BOOL
  1553. Ia64MachineInfo::IsBreakpointInstruction(ProcessInfo* Process, PADDR Addr)
  1554. {
  1555. ULONG64 Instr;
  1556. if (IsIA32InstructionSet())
  1557. {
  1558. return m_Target->m_Machines[MACHIDX_I386]->
  1559. IsBreakpointInstruction(Process, Addr);
  1560. }
  1561. else
  1562. {
  1563. // No need to align for this check.
  1564. if (m_Target->ReadAllVirtual(Process, Flat(*Addr),
  1565. &Instr, sizeof(Instr)) != S_OK)
  1566. {
  1567. return FALSE;
  1568. }
  1569. // Ignore predicates so any break instruction
  1570. // is detected regardless of predication.
  1571. switch (Flat(*Addr) & 0xf)
  1572. {
  1573. case 0:
  1574. if ((Instr & (INST_SLOT0_MASK & ~PRED0_MASK)) ==
  1575. (g_Ia64TrapInstr << 5))
  1576. {
  1577. return TRUE;
  1578. }
  1579. break;
  1580. case 4:
  1581. if ((Instr & (INST_SLOT1_MASK & ~PRED1_MASK)) ==
  1582. (g_Ia64TrapInstr << 14))
  1583. {
  1584. return TRUE;
  1585. }
  1586. break;
  1587. case 8:
  1588. if ((Instr & (INST_SLOT2_MASK & ~PRED2_MASK)) ==
  1589. (g_Ia64TrapInstr << 23))
  1590. {
  1591. return TRUE;
  1592. }
  1593. break;
  1594. }
  1595. }
  1596. return FALSE;
  1597. }
  1598. HRESULT
  1599. Ia64MachineInfo::InsertBreakpointInstruction(PUSER_DEBUG_SERVICES Services,
  1600. ULONG64 Process,
  1601. ULONG64 Offset,
  1602. ULONG Flags,
  1603. PUCHAR SaveInstr,
  1604. PULONG64 ChangeStart,
  1605. PULONG ChangeLen)
  1606. {
  1607. ULONG64 Aligned;
  1608. ULONG Off;
  1609. ULONG Done;
  1610. HRESULT Status;
  1611. if (Flags & ~IBI_IA64_PRED_MASK)
  1612. {
  1613. return E_INVALIDARG;
  1614. }
  1615. // Make sure the storage area has space for both the saved
  1616. // instruction bundle and some flags.
  1617. DBG_ASSERT(MAX_BREAKPOINT_LENGTH >= IA64_BP_LEN + sizeof(BOOL));
  1618. Aligned = Offset;
  1619. Off = (ULONG)(Aligned & IA64_BP_ALIGN);
  1620. Aligned -= Off;
  1621. *ChangeStart = Aligned;
  1622. *ChangeLen = IA64_BP_LEN;
  1623. Status = Services->ReadVirtual(Process, Aligned, SaveInstr,
  1624. IA64_BP_LEN, &Done);
  1625. if (Status != S_OK)
  1626. {
  1627. return Status;
  1628. }
  1629. if (Done != IA64_BP_LEN)
  1630. {
  1631. return HRESULT_FROM_WIN32(ERROR_READ_FAULT);
  1632. }
  1633. UCHAR TempInstr[IA64_BP_LEN];
  1634. ULONG64 UNALIGNED *New = (ULONG64 UNALIGNED *)(TempInstr + Off);
  1635. PBOOL Mli = (PBOOL)(SaveInstr + IA64_BP_LEN);
  1636. ULONG64 TrapInstr = g_Ia64TrapInstr | (Flags & IBI_IA64_PRED_MASK);
  1637. memcpy(TempInstr, SaveInstr, IA64_BP_LEN);
  1638. *Mli = FALSE;
  1639. switch(Off)
  1640. {
  1641. case 0:
  1642. *New = (*New & ~(INST_SLOT0_MASK)) | (TrapInstr << 5);
  1643. break;
  1644. case 4:
  1645. *New = (*New & ~(INST_SLOT1_MASK)) | (TrapInstr << 14);
  1646. break;
  1647. case 8:
  1648. *New = (*New & ~(INST_SLOT2_MASK)) | (TrapInstr << 23);
  1649. break;
  1650. default:
  1651. return E_INVALIDARG;
  1652. }
  1653. // If current instruction is
  1654. // NOT slot 0 check for two-slot MOVL instruction. Reject
  1655. // request if attempt to set break in slot 2 of MLI template.
  1656. if (Off != 0)
  1657. {
  1658. New = (PULONG64)TempInstr;
  1659. if (((*New & INST_TEMPL_MASK) >> 1) == 0x2)
  1660. {
  1661. if (Off == 4)
  1662. {
  1663. // if template= type 2 MLI, change to type 0
  1664. *New &= ~((INST_TEMPL_MASK >> 1) << 1);
  1665. *Mli = TRUE;
  1666. }
  1667. else
  1668. {
  1669. // set breakpoint at slot 2 of MOVL is illegal
  1670. return E_UNEXPECTED;
  1671. }
  1672. }
  1673. }
  1674. Status = Services->WriteVirtual(Process, Aligned, TempInstr,
  1675. IA64_BP_LEN, &Done);
  1676. if (Status == S_OK && Done != IA64_BP_LEN)
  1677. {
  1678. Status = HRESULT_FROM_WIN32(ERROR_WRITE_FAULT);
  1679. }
  1680. return Status;
  1681. }
  1682. HRESULT
  1683. Ia64MachineInfo::RemoveBreakpointInstruction(PUSER_DEBUG_SERVICES Services,
  1684. ULONG64 Process,
  1685. ULONG64 Offset,
  1686. PUCHAR SaveInstr,
  1687. PULONG64 ChangeStart,
  1688. PULONG ChangeLen)
  1689. {
  1690. ULONG64 Aligned;
  1691. ULONG Off;
  1692. ULONG Done;
  1693. HRESULT Status;
  1694. Aligned = Offset;
  1695. Off = (ULONG)(Aligned & IA64_BP_ALIGN);
  1696. Aligned -= Off;
  1697. *ChangeStart = Aligned;
  1698. *ChangeLen = IA64_BP_LEN;
  1699. UCHAR TempInstr[IA64_BP_LEN];
  1700. ULONG64 UNALIGNED *New;
  1701. ULONG64 UNALIGNED *Old;
  1702. PBOOL Mli;
  1703. // Read in memory since adjacent instructions in the same bundle
  1704. // may have been modified after we save them. We only restore the
  1705. // content of the slot which has the break instruction inserted.
  1706. Status = Services->ReadVirtual(Process, Aligned, TempInstr,
  1707. IA64_BP_LEN, &Done);
  1708. if (Status != S_OK)
  1709. {
  1710. return Status;
  1711. }
  1712. if (Done != IA64_BP_LEN)
  1713. {
  1714. return HRESULT_FROM_WIN32(ERROR_READ_FAULT);
  1715. }
  1716. New = (ULONG64 UNALIGNED *)(TempInstr + Off);
  1717. Old = (ULONG64 UNALIGNED *)(SaveInstr + Off);
  1718. Mli = (PBOOL)(SaveInstr + IA64_BP_LEN);
  1719. switch(Off)
  1720. {
  1721. case 0:
  1722. *New = (*New & ~(INST_SLOT0_MASK)) | (*Old & INST_SLOT0_MASK);
  1723. break;
  1724. case 4:
  1725. *New = (*New & ~(INST_SLOT1_MASK)) | (*Old & INST_SLOT1_MASK);
  1726. break;
  1727. case 8:
  1728. *New = (*New & ~(INST_SLOT2_MASK)) | (*Old & INST_SLOT2_MASK);
  1729. break;
  1730. default:
  1731. return E_INVALIDARG;
  1732. }
  1733. // restore template to MLI if displaced instruction was MOVL
  1734. if (*Mli)
  1735. {
  1736. New = (PULONG64)TempInstr;
  1737. *New &= ~((INST_TEMPL_MASK >> 1) << 1); // set template to MLI
  1738. *New |= 0x4;
  1739. }
  1740. Status = Services->WriteVirtual(Process, Aligned, TempInstr,
  1741. IA64_BP_LEN, &Done);
  1742. if (Status == S_OK && Done != IA64_BP_LEN)
  1743. {
  1744. Status = HRESULT_FROM_WIN32(ERROR_WRITE_FAULT);
  1745. }
  1746. return Status;
  1747. }
  1748. void
  1749. Ia64MachineInfo::AdjustPCPastBreakpointInstruction(PADDR Addr,
  1750. ULONG BreakType)
  1751. {
  1752. DBG_ASSERT(BreakType == DEBUG_BREAKPOINT_CODE);
  1753. if (IsIA32InstructionSet())
  1754. {
  1755. //
  1756. // IA32 instruction set
  1757. //
  1758. SetPC(AddrAdd(Addr, 1));
  1759. }
  1760. else
  1761. {
  1762. //
  1763. // IA64 instruction set
  1764. //
  1765. if ((Flat(*Addr) & 0xf) != 8)
  1766. {
  1767. SetPC(AddrAdd(Addr, 4));
  1768. }
  1769. else
  1770. {
  1771. SetPC(AddrAdd(Addr, 8));
  1772. }
  1773. }
  1774. }
  1775. void
  1776. Ia64MachineInfo::InsertThreadDataBreakpoints(void)
  1777. {
  1778. DBG_ASSERT(g_Thread->m_NumDataBreaks <= m_MaxDataBreakpoints);
  1779. BpOut("Thread %d data %d\n",
  1780. g_Thread->m_UserId, g_Thread->m_NumDataBreaks);
  1781. // The kernel automatically sets PSR.db for the
  1782. // kernel so this code only needs to manipulate PSR.db
  1783. // for user-mode debugging.
  1784. ULONG64 RegIPSR;
  1785. ULONG RegDBD;
  1786. ULONG RegDBDEnd;
  1787. ULONG RegDBI;
  1788. ULONG RegDBIEnd;
  1789. // Start with all breaks turned off.
  1790. if (IS_USER_TARGET(m_Target))
  1791. {
  1792. RegIPSR = GetReg64(STIPSR);
  1793. RegIPSR &= ~((ULONG64)1 << PSR_DB);
  1794. RegDBD = REGDBD0;
  1795. RegDBDEnd = min(REGDBD7 + 1,
  1796. REGDBD0 + 2 * m_MaxDataBreakpoints);
  1797. RegDBI = REGDBI0;
  1798. RegDBIEnd = min(REGDBI7 + 1,
  1799. REGDBI0 + 2 * m_MaxDataBreakpoints);
  1800. }
  1801. else
  1802. {
  1803. RegDBD = KRDBD0;
  1804. RegDBDEnd = min(KRDBD7 + 1,
  1805. KRDBD0 + 2 * m_MaxDataBreakpoints);
  1806. RegDBI = KRDBI0;
  1807. RegDBIEnd = min(KRDBI7 + 1,
  1808. KRDBI0 + 2 * m_MaxDataBreakpoints);
  1809. }
  1810. if (g_Thread->m_NumDataBreaks > 0)
  1811. {
  1812. ULONG i;
  1813. for (i = 0; i < g_Thread->m_NumDataBreaks; i++)
  1814. {
  1815. Breakpoint* Bp = g_Thread->m_DataBreakBps[i];
  1816. ULONG ProcType = Bp->GetProcType();
  1817. DBG_ASSERT((ProcType == IMAGE_FILE_MACHINE_IA64) ||
  1818. (ProcType == IMAGE_FILE_MACHINE_I386));
  1819. ULONG64 Addr, Control;
  1820. if (ProcType == IMAGE_FILE_MACHINE_I386)
  1821. {
  1822. Addr = (ULONG)Flat(*Bp->GetAddr());
  1823. Control = ((X86OnIa64DataBreakpoint*)Bp)->m_Control;
  1824. }
  1825. else
  1826. {
  1827. Addr = Flat(*Bp->GetAddr());
  1828. Control = ((Ia64DataBreakpoint*)Bp)->m_Control;
  1829. }
  1830. if (Bp->m_DataAccessType == DEBUG_BREAK_EXECUTE)
  1831. {
  1832. BpOut(" ibp %d at %p\n", i, Addr);
  1833. SetReg64(RegDBI++, Addr);
  1834. SetReg64(RegDBI++, Control);
  1835. }
  1836. else
  1837. {
  1838. BpOut(" dbp %d at %p\n", i, Addr);
  1839. SetReg64(RegDBD++, Addr);
  1840. SetReg64(RegDBD++, Control);
  1841. }
  1842. }
  1843. RegIPSR |= ((ULONG64)1 << PSR_DB);
  1844. }
  1845. // Make sure unused debug registers are clear.
  1846. while (RegDBD < RegDBDEnd)
  1847. {
  1848. SetReg64(RegDBD++, 0);
  1849. }
  1850. while (RegDBI < RegDBIEnd)
  1851. {
  1852. SetReg64(RegDBI++, 0);
  1853. }
  1854. if (IS_USER_TARGET(m_Target))
  1855. {
  1856. SetReg64(STIPSR, RegIPSR);
  1857. }
  1858. }
  1859. void
  1860. Ia64MachineInfo::RemoveThreadDataBreakpoints(void)
  1861. {
  1862. if (IS_USER_TARGET(m_Target))
  1863. {
  1864. ULONG64 RegIPSR;
  1865. RegIPSR = GetReg64(STIPSR);
  1866. RegIPSR &= ~((ULONG64)1 << PSR_DB);
  1867. SetReg64(STIPSR, RegIPSR);
  1868. }
  1869. else
  1870. {
  1871. for (UINT i = 1; i < 2 * m_MaxDataBreakpoints; i += 2)
  1872. {
  1873. SetReg64(KRDBD0 + i, 0);
  1874. SetReg64(KRDBI0 + i, 0);
  1875. }
  1876. }
  1877. }
  1878. ULONG
  1879. Ia64MachineInfo::IsBreakpointOrStepException(PEXCEPTION_RECORD64 Record,
  1880. ULONG FirstChance,
  1881. PADDR BpAddr,
  1882. PADDR RelAddr)
  1883. {
  1884. if (Record->ExceptionCode == STATUS_BREAKPOINT)
  1885. {
  1886. // Data breakpoints come in as SINGLE_STEP so
  1887. // this must be a code breakpoint.
  1888. return EXBS_BREAKPOINT_CODE;
  1889. }
  1890. else if (Record->ExceptionCode == STATUS_SINGLE_STEP)
  1891. {
  1892. DBG_ASSERT(Record->NumberParameters >= 5);
  1893. // Data breakpoints put the faulting address in
  1894. // the exception information, whereas a true single
  1895. // step exception sets the address to zero.
  1896. if (Record->ExceptionInformation[1])
  1897. {
  1898. // This should be read, write or execute interrupt.
  1899. DBG_ASSERT(Record->ExceptionInformation[4] &
  1900. (((ULONG64)1 << ISR_X) |
  1901. ((ULONG64)1 << ISR_W) |
  1902. ((ULONG64)1 << ISR_R)));
  1903. ADDRFLAT(BpAddr, Record->ExceptionInformation[1]);
  1904. return EXBS_BREAKPOINT_DATA;
  1905. }
  1906. else if (Record->ExceptionInformation[4] & 0x4)
  1907. {
  1908. // Must be taken branch exception
  1909. if (RelAddr)
  1910. {
  1911. // TrapFrame->StIIPA contains actual branch address
  1912. ADDRFLAT(RelAddr, Record->ExceptionInformation[3]);
  1913. }
  1914. return EXBS_STEP_BRANCH;
  1915. }
  1916. else
  1917. {
  1918. // Must be a real single-step.
  1919. return EXBS_STEP_INSTRUCTION;
  1920. }
  1921. }
  1922. return EXBS_NONE;
  1923. }
  1924. BOOL
  1925. Ia64MachineInfo::IsCallDisasm (PCSTR Disasm)
  1926. {
  1927. return (strstr(Disasm, " br.call") || strstr(Disasm, ")br.call")) &&
  1928. !strstr(Disasm, "=0)");
  1929. }
  1930. BOOL
  1931. Ia64MachineInfo::IsReturnDisasm (PCSTR Disasm)
  1932. {
  1933. return (strstr(Disasm, " br.ret") || strstr(Disasm, ")br.ret")) &&
  1934. !strstr(Disasm, "=0)");
  1935. }
  1936. BOOL
  1937. Ia64MachineInfo::IsSystemCallDisasm(PCSTR Disasm)
  1938. {
  1939. return (strstr(Disasm, " break ") || strstr(Disasm, ")break ")) &&
  1940. strstr(Disasm, " 18000") && !strstr(Disasm, "=0)");
  1941. }
  1942. BOOL
  1943. Ia64MachineInfo::IsDelayInstruction (PADDR Addr)
  1944. {
  1945. return FALSE; // EM does not implement delay slot
  1946. }
  1947. void
  1948. Ia64MachineInfo::GetEffectiveAddr (PADDR Addr, PULONG Size)
  1949. {
  1950. ErrOut("! IA64 does not set EA during disasm !\n");
  1951. ADDRFLAT(Addr, 0);
  1952. *Size = 1;
  1953. }
  1954. void
  1955. Ia64MachineInfo::GetNextOffset(ProcessInfo* Process, BOOL StepOver,
  1956. PADDR NextAddr, PULONG NextMachine)
  1957. {
  1958. ULONG64 returnvalue;
  1959. ULONG64 firaddr, syladdr;
  1960. ADDR fir;
  1961. ULONG slot;
  1962. EM_IL location;
  1963. // Default NextMachine to the same machine.
  1964. *NextMachine = m_ExecTypes[0];
  1965. // Check support for hardware stepping. Older
  1966. // kernels did not handle it properly.
  1967. BOOL UseTraceFlag =
  1968. !IS_KERNEL_TARGET(m_Target) ||
  1969. (m_Target->m_KdVersion.Flags & DBGKD_VERS_FLAG_HSS);
  1970. ULONG instr_length;
  1971. EM_Decoder_Info info;
  1972. IEL_ZERO(location);
  1973. firaddr = GetReg64(STIIP); // get bundle address from IIP
  1974. ADDRFLAT( &fir, firaddr );
  1975. if (m_Target->ReadVirtual(Process, Flat(fir),
  1976. &g_Ia64Disinstr, sizeof(U128),
  1977. &instr_length) != S_OK)
  1978. {
  1979. instr_length = 0;
  1980. }
  1981. slot = (ULONG)((GetReg64(STIPSR) >> PSR_RI) & 0x3); // get slot number from ISR.ei
  1982. syladdr = firaddr | slot ;
  1983. IEL_ASSIGNU(location, *(U64*)(&syladdr));
  1984. // assume next slot is the target address
  1985. // convert bundle address - firaddr to EM address
  1986. // the slot# of Gambit internal address is at bit(0,1)
  1987. // EM address slot# is at bit(2,3)
  1988. switch (slot)
  1989. {
  1990. case 0:
  1991. returnvalue = firaddr + 4;
  1992. break;
  1993. case 1:
  1994. returnvalue = firaddr + 8;
  1995. break;
  1996. case 2:
  1997. returnvalue = firaddr + 16;
  1998. break;
  1999. default:
  2000. WarnOut("GetNextOffset: illegal EM address: %s",
  2001. FormatAddr64(firaddr));
  2002. }
  2003. if (!InitDecoder())
  2004. {
  2005. ErrOut("EM decoder library(DECEM.DLL) not active\n");
  2006. // We can't analyze the current instruction to
  2007. // determine how and where to step so just rely
  2008. // on hardware tracing if possible.
  2009. if (UseTraceFlag)
  2010. {
  2011. returnvalue = OFFSET_TRACE;
  2012. }
  2013. }
  2014. else
  2015. {
  2016. EM_Decoder_Err err = (*pfnEM_Decoder_decode)(DecoderId,
  2017. g_Ia64Disinstr,
  2018. instr_length,
  2019. location,
  2020. &info);
  2021. if (err == EM_DECODER_NO_ERROR)
  2022. {
  2023. #if 0
  2024. dprintf("GNO inst at %I64x:%d is %d\n",
  2025. firaddr, slot, info.inst);
  2026. #endif
  2027. if (info.EM_info.em_bundle_info.b_template == EM_template_mlx &&
  2028. slot == 1)
  2029. {
  2030. // Increment return offset since L+X instructions take
  2031. // two instruction slots.
  2032. switch (returnvalue & 0xf)
  2033. {
  2034. case 8:
  2035. returnvalue = returnvalue + 8;
  2036. break;
  2037. default:
  2038. WarnOut("GetNextOffset: illegal L+X address: %s",
  2039. FormatAddr64(firaddr));
  2040. break;
  2041. }
  2042. }
  2043. switch (info.inst)
  2044. {
  2045. // break imm21
  2046. //
  2047. case EM_BREAK_I_IMM21:
  2048. case EM_BREAK_M_IMM21:
  2049. case EM_BREAK_B_IMM21:
  2050. case EM_BREAK_F_IMM21:
  2051. // Stepping over a syscall instruction must set the breakpoint
  2052. // at the caller's return address, not the inst after the
  2053. // syscall. Stepping into a syscall is not allowed
  2054. // from user-mode.
  2055. if (!StepOver && IS_KERNEL_TARGET(m_Target) && UseTraceFlag)
  2056. {
  2057. returnvalue = OFFSET_TRACE;
  2058. break;
  2059. }
  2060. if (info.src1.type == EM_DECODER_IMMEDIATE)
  2061. {
  2062. if (info.src1.imm_info.imm_type ==
  2063. EM_DECODER_IMM_UNSIGNED)
  2064. {
  2065. if (((IEL_GETDW0(info.src1.imm_info.val64) & 0x1c0000) ==
  2066. IA64_BREAK_SYSCALL_BASE) ||
  2067. ((IEL_GETDW0(info.src1.imm_info.val64) & 0x1c0000) ==
  2068. IA64_BREAK_FASTSYS_BASE))
  2069. {
  2070. returnvalue = GetReg64(BRRP);
  2071. }
  2072. }
  2073. }
  2074. break;
  2075. //
  2076. // IP-Relative call B3 - br.call b1=target25
  2077. //
  2078. case EM_BR_CALL_SPNT_FEW_B1_TARGET25:
  2079. case EM_BR_CALL_SPNT_MANY_B1_TARGET25:
  2080. case EM_BR_CALL_SPTK_FEW_B1_TARGET25:
  2081. case EM_BR_CALL_SPTK_MANY_B1_TARGET25:
  2082. case EM_BR_CALL_DPNT_FEW_B1_TARGET25:
  2083. case EM_BR_CALL_DPNT_MANY_B1_TARGET25:
  2084. case EM_BR_CALL_DPTK_FEW_B1_TARGET25:
  2085. case EM_BR_CALL_DPTK_MANY_B1_TARGET25:
  2086. case EM_BR_CALL_SPNT_FEW_CLR_B1_TARGET25:
  2087. case EM_BR_CALL_SPNT_MANY_CLR_B1_TARGET25:
  2088. case EM_BR_CALL_SPTK_FEW_CLR_B1_TARGET25:
  2089. case EM_BR_CALL_SPTK_MANY_CLR_B1_TARGET25:
  2090. case EM_BR_CALL_DPNT_FEW_CLR_B1_TARGET25:
  2091. case EM_BR_CALL_DPNT_MANY_CLR_B1_TARGET25:
  2092. case EM_BR_CALL_DPTK_FEW_CLR_B1_TARGET25:
  2093. case EM_BR_CALL_DPTK_MANY_CLR_B1_TARGET25:
  2094. // 64-bit target L+X forms.
  2095. case EM_BRL_CALL_SPTK_FEW_B1_TARGET64:
  2096. case EM_BRL_CALL_SPTK_MANY_B1_TARGET64:
  2097. case EM_BRL_CALL_SPNT_FEW_B1_TARGET64:
  2098. case EM_BRL_CALL_SPNT_MANY_B1_TARGET64:
  2099. case EM_BRL_CALL_DPTK_FEW_B1_TARGET64:
  2100. case EM_BRL_CALL_DPTK_MANY_B1_TARGET64:
  2101. case EM_BRL_CALL_DPNT_FEW_B1_TARGET64:
  2102. case EM_BRL_CALL_DPNT_MANY_B1_TARGET64:
  2103. case EM_BRL_CALL_SPTK_FEW_CLR_B1_TARGET64:
  2104. case EM_BRL_CALL_SPTK_MANY_CLR_B1_TARGET64:
  2105. case EM_BRL_CALL_SPNT_FEW_CLR_B1_TARGET64:
  2106. case EM_BRL_CALL_SPNT_MANY_CLR_B1_TARGET64:
  2107. case EM_BRL_CALL_DPTK_FEW_CLR_B1_TARGET64:
  2108. case EM_BRL_CALL_DPTK_MANY_CLR_B1_TARGET64:
  2109. case EM_BRL_CALL_DPNT_FEW_CLR_B1_TARGET64:
  2110. case EM_BRL_CALL_DPNT_MANY_CLR_B1_TARGET64:
  2111. if (StepOver)
  2112. {
  2113. //
  2114. // Step over the subroutine call;
  2115. //
  2116. break;
  2117. }
  2118. // fall through
  2119. //
  2120. //
  2121. // IP-Relative branch B1 - br.cond target25
  2122. //
  2123. case EM_BR_COND_SPNT_FEW_TARGET25:
  2124. case EM_BR_COND_SPNT_MANY_TARGET25:
  2125. case EM_BR_COND_SPTK_FEW_TARGET25:
  2126. case EM_BR_COND_SPTK_MANY_TARGET25:
  2127. case EM_BR_COND_DPNT_FEW_TARGET25:
  2128. case EM_BR_COND_DPNT_MANY_TARGET25:
  2129. case EM_BR_COND_DPTK_FEW_TARGET25:
  2130. case EM_BR_COND_DPTK_MANY_TARGET25:
  2131. case EM_BR_COND_SPNT_FEW_CLR_TARGET25:
  2132. case EM_BR_COND_SPNT_MANY_CLR_TARGET25:
  2133. case EM_BR_COND_SPTK_FEW_CLR_TARGET25:
  2134. case EM_BR_COND_SPTK_MANY_CLR_TARGET25:
  2135. case EM_BR_COND_DPNT_FEW_CLR_TARGET25:
  2136. case EM_BR_COND_DPNT_MANY_CLR_TARGET25:
  2137. case EM_BR_COND_DPTK_FEW_CLR_TARGET25:
  2138. case EM_BR_COND_DPTK_MANY_CLR_TARGET25:
  2139. // 64-bit target L+X forms.
  2140. case EM_BRL_COND_SPTK_FEW_TARGET64:
  2141. case EM_BRL_COND_SPTK_MANY_TARGET64:
  2142. case EM_BRL_COND_SPNT_FEW_TARGET64:
  2143. case EM_BRL_COND_SPNT_MANY_TARGET64:
  2144. case EM_BRL_COND_DPTK_FEW_TARGET64:
  2145. case EM_BRL_COND_DPTK_MANY_TARGET64:
  2146. case EM_BRL_COND_DPNT_FEW_TARGET64:
  2147. case EM_BRL_COND_DPNT_MANY_TARGET64:
  2148. case EM_BRL_COND_SPTK_FEW_CLR_TARGET64:
  2149. case EM_BRL_COND_SPTK_MANY_CLR_TARGET64:
  2150. case EM_BRL_COND_SPNT_FEW_CLR_TARGET64:
  2151. case EM_BRL_COND_SPNT_MANY_CLR_TARGET64:
  2152. case EM_BRL_COND_DPTK_FEW_CLR_TARGET64:
  2153. case EM_BRL_COND_DPTK_MANY_CLR_TARGET64:
  2154. case EM_BRL_COND_DPNT_FEW_CLR_TARGET64:
  2155. case EM_BRL_COND_DPNT_MANY_CLR_TARGET64:
  2156. if (UseTraceFlag)
  2157. {
  2158. returnvalue = OFFSET_TRACE;
  2159. break;
  2160. }
  2161. if ((info.pred.valid == TRUE) &&
  2162. (info.pred.type == EM_DECODER_PRED_REG))
  2163. {
  2164. if ((GetReg64(PREDS) >> info.pred.value) & 0x1) // if PR[qp] = 1
  2165. {
  2166. if (info.src1.type == EM_DECODER_IP_RELATIVE) {
  2167. // imm_info.val64 is sign-extended (imm21 << 4)
  2168. returnvalue = (IEL_GETQW0(info.src1.imm_info.val64)) +
  2169. firaddr;
  2170. }
  2171. }
  2172. }
  2173. break;
  2174. // - br.wexit target25
  2175. case EM_BR_WEXIT_SPNT_FEW_TARGET25:
  2176. case EM_BR_WEXIT_SPNT_MANY_TARGET25:
  2177. case EM_BR_WEXIT_SPTK_FEW_TARGET25:
  2178. case EM_BR_WEXIT_SPTK_MANY_TARGET25:
  2179. case EM_BR_WEXIT_DPNT_FEW_TARGET25:
  2180. case EM_BR_WEXIT_DPNT_MANY_TARGET25:
  2181. case EM_BR_WEXIT_DPTK_FEW_TARGET25:
  2182. case EM_BR_WEXIT_DPTK_MANY_TARGET25:
  2183. case EM_BR_WEXIT_SPNT_FEW_CLR_TARGET25:
  2184. case EM_BR_WEXIT_SPNT_MANY_CLR_TARGET25:
  2185. case EM_BR_WEXIT_SPTK_FEW_CLR_TARGET25:
  2186. case EM_BR_WEXIT_SPTK_MANY_CLR_TARGET25:
  2187. case EM_BR_WEXIT_DPNT_FEW_CLR_TARGET25:
  2188. case EM_BR_WEXIT_DPNT_MANY_CLR_TARGET25:
  2189. case EM_BR_WEXIT_DPTK_FEW_CLR_TARGET25:
  2190. case EM_BR_WEXIT_DPTK_MANY_CLR_TARGET25:
  2191. if (UseTraceFlag)
  2192. {
  2193. returnvalue = OFFSET_TRACE;
  2194. break;
  2195. }
  2196. if ((info.pred.valid == TRUE) &&
  2197. (info.pred.type == EM_DECODER_PRED_REG))
  2198. {
  2199. if ((GetReg64(PREDS) >> info.pred.value) & 0x1) // if PR[qp] = 1, epilog
  2200. {
  2201. if (GetReg64(APEC) <= 1) // WEXIT; branch if EC = 0 or 1
  2202. {
  2203. if (info.src1.type == EM_DECODER_IP_RELATIVE) {
  2204. returnvalue =
  2205. (IEL_GETQW0(info.src1.imm_info.val64)) + firaddr;
  2206. }
  2207. }
  2208. }
  2209. } // if PR[qp] = 0, kernel; fall-thru
  2210. break;
  2211. // - br.wtop target25
  2212. case EM_BR_WTOP_SPNT_FEW_TARGET25:
  2213. case EM_BR_WTOP_SPNT_MANY_TARGET25:
  2214. case EM_BR_WTOP_SPTK_FEW_TARGET25:
  2215. case EM_BR_WTOP_SPTK_MANY_TARGET25:
  2216. case EM_BR_WTOP_DPNT_FEW_TARGET25:
  2217. case EM_BR_WTOP_DPNT_MANY_TARGET25:
  2218. case EM_BR_WTOP_DPTK_FEW_TARGET25:
  2219. case EM_BR_WTOP_DPTK_MANY_TARGET25:
  2220. case EM_BR_WTOP_SPNT_FEW_CLR_TARGET25:
  2221. case EM_BR_WTOP_SPNT_MANY_CLR_TARGET25:
  2222. case EM_BR_WTOP_SPTK_FEW_CLR_TARGET25:
  2223. case EM_BR_WTOP_SPTK_MANY_CLR_TARGET25:
  2224. case EM_BR_WTOP_DPNT_FEW_CLR_TARGET25:
  2225. case EM_BR_WTOP_DPNT_MANY_CLR_TARGET25:
  2226. case EM_BR_WTOP_DPTK_FEW_CLR_TARGET25:
  2227. case EM_BR_WTOP_DPTK_MANY_CLR_TARGET25:
  2228. if (UseTraceFlag)
  2229. {
  2230. returnvalue = OFFSET_TRACE;
  2231. break;
  2232. }
  2233. if ((info.pred.valid == TRUE) &&
  2234. (info.pred.type == EM_DECODER_PRED_REG))
  2235. {
  2236. if ((GetReg64(PREDS) >> info.pred.value) & 0x1) // if PR[qp] = 1, epilog
  2237. {
  2238. if (GetReg64(APEC) > 1) // WTOP; branch if EC > 1
  2239. {
  2240. if (info.src1.type == EM_DECODER_IP_RELATIVE)
  2241. {
  2242. returnvalue =
  2243. (IEL_GETQW0(info.src1.imm_info.val64)) + firaddr;
  2244. }
  2245. }
  2246. }
  2247. }
  2248. else // if PR[qp] = 0, kernel; branch
  2249. {
  2250. if (info.src1.type == EM_DECODER_IP_RELATIVE) {
  2251. returnvalue =
  2252. (IEL_GETQW0(info.src1.imm_info.val64)) + firaddr;
  2253. }
  2254. }
  2255. break;
  2256. //
  2257. // IP-Relative counted branch B2 - br.cloop target25
  2258. //
  2259. case EM_BR_CLOOP_SPNT_FEW_TARGET25:
  2260. case EM_BR_CLOOP_SPNT_MANY_TARGET25:
  2261. case EM_BR_CLOOP_SPTK_FEW_TARGET25:
  2262. case EM_BR_CLOOP_SPTK_MANY_TARGET25:
  2263. case EM_BR_CLOOP_DPNT_FEW_TARGET25:
  2264. case EM_BR_CLOOP_DPNT_MANY_TARGET25:
  2265. case EM_BR_CLOOP_DPTK_FEW_TARGET25:
  2266. case EM_BR_CLOOP_DPTK_MANY_TARGET25:
  2267. case EM_BR_CLOOP_SPNT_FEW_CLR_TARGET25:
  2268. case EM_BR_CLOOP_SPNT_MANY_CLR_TARGET25:
  2269. case EM_BR_CLOOP_SPTK_FEW_CLR_TARGET25:
  2270. case EM_BR_CLOOP_SPTK_MANY_CLR_TARGET25:
  2271. case EM_BR_CLOOP_DPNT_FEW_CLR_TARGET25:
  2272. case EM_BR_CLOOP_DPNT_MANY_CLR_TARGET25:
  2273. case EM_BR_CLOOP_DPTK_FEW_CLR_TARGET25:
  2274. case EM_BR_CLOOP_DPTK_MANY_CLR_TARGET25:
  2275. if (UseTraceFlag)
  2276. {
  2277. returnvalue = OFFSET_TRACE;
  2278. break;
  2279. }
  2280. if (GetReg64(APLC)) // branch if LC != 0
  2281. {
  2282. if (info.src1.type == EM_DECODER_IP_RELATIVE)
  2283. {
  2284. returnvalue =
  2285. (IEL_GETQW0(info.src1.imm_info.val64)) + firaddr;
  2286. }
  2287. }
  2288. break;
  2289. // - br.cexit target25
  2290. case EM_BR_CEXIT_SPNT_FEW_TARGET25:
  2291. case EM_BR_CEXIT_SPNT_MANY_TARGET25:
  2292. case EM_BR_CEXIT_SPTK_FEW_TARGET25:
  2293. case EM_BR_CEXIT_SPTK_MANY_TARGET25:
  2294. case EM_BR_CEXIT_DPNT_FEW_TARGET25:
  2295. case EM_BR_CEXIT_DPNT_MANY_TARGET25:
  2296. case EM_BR_CEXIT_DPTK_FEW_TARGET25:
  2297. case EM_BR_CEXIT_DPTK_MANY_TARGET25:
  2298. case EM_BR_CEXIT_SPNT_FEW_CLR_TARGET25:
  2299. case EM_BR_CEXIT_SPNT_MANY_CLR_TARGET25:
  2300. case EM_BR_CEXIT_SPTK_FEW_CLR_TARGET25:
  2301. case EM_BR_CEXIT_SPTK_MANY_CLR_TARGET25:
  2302. case EM_BR_CEXIT_DPNT_FEW_CLR_TARGET25:
  2303. case EM_BR_CEXIT_DPNT_MANY_CLR_TARGET25:
  2304. case EM_BR_CEXIT_DPTK_FEW_CLR_TARGET25:
  2305. case EM_BR_CEXIT_DPTK_MANY_CLR_TARGET25:
  2306. if (UseTraceFlag)
  2307. {
  2308. returnvalue = OFFSET_TRACE;
  2309. break;
  2310. }
  2311. if (!GetReg64(APLC)) // if LC = 0, epilog
  2312. {
  2313. if (GetReg64(APEC) <= 1) // CEXIT; branch if EC = 0 or 1
  2314. {
  2315. if (info.src1.type == EM_DECODER_IP_RELATIVE)
  2316. {
  2317. returnvalue =
  2318. (IEL_GETQW0(info.src1.imm_info.val64)) + firaddr;
  2319. }
  2320. }
  2321. } // if LC > 0, kernel; fall-thru
  2322. break;
  2323. // - br.ctop target25
  2324. case EM_BR_CTOP_SPNT_FEW_TARGET25:
  2325. case EM_BR_CTOP_SPNT_MANY_TARGET25:
  2326. case EM_BR_CTOP_SPTK_FEW_TARGET25:
  2327. case EM_BR_CTOP_SPTK_MANY_TARGET25:
  2328. case EM_BR_CTOP_DPNT_FEW_TARGET25:
  2329. case EM_BR_CTOP_DPNT_MANY_TARGET25:
  2330. case EM_BR_CTOP_DPTK_FEW_TARGET25:
  2331. case EM_BR_CTOP_DPTK_MANY_TARGET25:
  2332. case EM_BR_CTOP_SPNT_FEW_CLR_TARGET25:
  2333. case EM_BR_CTOP_SPNT_MANY_CLR_TARGET25:
  2334. case EM_BR_CTOP_SPTK_FEW_CLR_TARGET25:
  2335. case EM_BR_CTOP_SPTK_MANY_CLR_TARGET25:
  2336. case EM_BR_CTOP_DPNT_FEW_CLR_TARGET25:
  2337. case EM_BR_CTOP_DPNT_MANY_CLR_TARGET25:
  2338. case EM_BR_CTOP_DPTK_FEW_CLR_TARGET25:
  2339. case EM_BR_CTOP_DPTK_MANY_CLR_TARGET25:
  2340. if (!GetReg64(APLC)) // if LC = 0, epilog
  2341. {
  2342. if (GetReg64(APEC) > 1) // CTOP; branch if EC > 1
  2343. {
  2344. if (info.src1.type == EM_DECODER_IP_RELATIVE)
  2345. {
  2346. returnvalue =
  2347. (IEL_GETQW0(info.src1.imm_info.val64)) + firaddr;
  2348. }
  2349. }
  2350. }
  2351. else // if LC > 0, kernel; branch
  2352. {
  2353. if (info.src1.type == EM_DECODER_IP_RELATIVE)
  2354. {
  2355. returnvalue =
  2356. (IEL_GETQW0(info.src1.imm_info.val64)) + firaddr;
  2357. }
  2358. }
  2359. break;
  2360. //
  2361. // Indirect call B5 - br.call b1=b2
  2362. //
  2363. case EM_BR_CALL_SPNT_FEW_B1_B2:
  2364. case EM_BR_CALL_SPNT_MANY_B1_B2:
  2365. case EM_BR_CALL_SPTK_FEW_B1_B2:
  2366. case EM_BR_CALL_SPTK_MANY_B1_B2:
  2367. case EM_BR_CALL_DPNT_FEW_B1_B2:
  2368. case EM_BR_CALL_DPNT_MANY_B1_B2:
  2369. case EM_BR_CALL_DPTK_FEW_B1_B2:
  2370. case EM_BR_CALL_DPTK_MANY_B1_B2:
  2371. case EM_BR_CALL_SPNT_FEW_CLR_B1_B2:
  2372. case EM_BR_CALL_SPNT_MANY_CLR_B1_B2:
  2373. case EM_BR_CALL_SPTK_FEW_CLR_B1_B2:
  2374. case EM_BR_CALL_SPTK_MANY_CLR_B1_B2:
  2375. case EM_BR_CALL_DPNT_FEW_CLR_B1_B2:
  2376. case EM_BR_CALL_DPNT_MANY_CLR_B1_B2:
  2377. case EM_BR_CALL_DPTK_FEW_CLR_B1_B2:
  2378. case EM_BR_CALL_DPTK_MANY_CLR_B1_B2:
  2379. if (StepOver)
  2380. {
  2381. //
  2382. // Step over the subroutine call;
  2383. //
  2384. break;
  2385. }
  2386. // fall through
  2387. //
  2388. //
  2389. // Indirect branch B4 - br.ia b2
  2390. //
  2391. case EM_BR_IA_SPNT_FEW_B2:
  2392. case EM_BR_IA_SPNT_MANY_B2:
  2393. case EM_BR_IA_SPTK_FEW_B2:
  2394. case EM_BR_IA_SPTK_MANY_B2:
  2395. case EM_BR_IA_DPNT_FEW_B2:
  2396. case EM_BR_IA_DPNT_MANY_B2:
  2397. case EM_BR_IA_DPTK_FEW_B2:
  2398. case EM_BR_IA_DPTK_MANY_B2:
  2399. case EM_BR_IA_SPNT_FEW_CLR_B2:
  2400. case EM_BR_IA_SPNT_MANY_CLR_B2:
  2401. case EM_BR_IA_SPTK_FEW_CLR_B2:
  2402. case EM_BR_IA_SPTK_MANY_CLR_B2:
  2403. case EM_BR_IA_DPNT_FEW_CLR_B2:
  2404. case EM_BR_IA_DPNT_MANY_CLR_B2:
  2405. case EM_BR_IA_DPTK_FEW_CLR_B2:
  2406. case EM_BR_IA_DPTK_MANY_CLR_B2:
  2407. if (UseTraceFlag)
  2408. {
  2409. returnvalue = OFFSET_TRACE;
  2410. break;
  2411. }
  2412. // Unconditional branch to IA32 so the machine
  2413. // changes.
  2414. *NextMachine = IMAGE_FILE_MACHINE_I386;
  2415. // fall through
  2416. //
  2417. // - br.cond b2
  2418. case EM_BR_COND_SPNT_FEW_B2:
  2419. case EM_BR_COND_SPNT_MANY_B2:
  2420. case EM_BR_COND_SPTK_FEW_B2:
  2421. case EM_BR_COND_SPTK_MANY_B2:
  2422. case EM_BR_COND_DPNT_FEW_B2:
  2423. case EM_BR_COND_DPNT_MANY_B2:
  2424. case EM_BR_COND_DPTK_FEW_B2:
  2425. case EM_BR_COND_DPTK_MANY_B2:
  2426. case EM_BR_COND_SPNT_FEW_CLR_B2:
  2427. case EM_BR_COND_SPNT_MANY_CLR_B2:
  2428. case EM_BR_COND_SPTK_FEW_CLR_B2:
  2429. case EM_BR_COND_SPTK_MANY_CLR_B2:
  2430. case EM_BR_COND_DPNT_FEW_CLR_B2:
  2431. case EM_BR_COND_DPNT_MANY_CLR_B2:
  2432. case EM_BR_COND_DPTK_FEW_CLR_B2:
  2433. case EM_BR_COND_DPTK_MANY_CLR_B2:
  2434. // If we're in user-mode we can't necessarily
  2435. // use hardware stepping here because this
  2436. // may be a branch into the EPC region for
  2437. // a system call that we do not want to trace.
  2438. if (!StepOver && IS_KERNEL_TARGET(m_Target) && UseTraceFlag)
  2439. {
  2440. returnvalue = OFFSET_TRACE;
  2441. break;
  2442. }
  2443. if ((info.pred.valid == TRUE) &&
  2444. (info.pred.type == EM_DECODER_PRED_REG))
  2445. {
  2446. if ((GetReg64(PREDS) >> info.pred.value) & 0x1) // if PR[qp] = 1
  2447. {
  2448. if (info.src1.type == EM_DECODER_REGISTER)
  2449. {
  2450. if (info.src1.reg_info.type == EM_DECODER_BR_REG)
  2451. {
  2452. returnvalue = GetReg64(info.src1.reg_info.value + BRRP);
  2453. // Check for syscall (IA64_MM_EPC_VA) then
  2454. // return address is in B0
  2455. if (!IS_KERNEL_TARGET(m_Target) &&
  2456. (returnvalue == IA64_MM_EPC_VA + 0x20))
  2457. {
  2458. returnvalue = GetReg64(BRRP);
  2459. }
  2460. }
  2461. }
  2462. }
  2463. }
  2464. break;
  2465. // - br.ret b2
  2466. case EM_BR_RET_SPNT_FEW_B2:
  2467. case EM_BR_RET_SPNT_MANY_B2:
  2468. case EM_BR_RET_SPTK_FEW_B2:
  2469. case EM_BR_RET_SPTK_MANY_B2:
  2470. case EM_BR_RET_DPNT_FEW_B2:
  2471. case EM_BR_RET_DPNT_MANY_B2:
  2472. case EM_BR_RET_DPTK_FEW_B2:
  2473. case EM_BR_RET_DPTK_MANY_B2:
  2474. case EM_BR_RET_SPNT_FEW_CLR_B2:
  2475. case EM_BR_RET_SPNT_MANY_CLR_B2:
  2476. case EM_BR_RET_SPTK_FEW_CLR_B2:
  2477. case EM_BR_RET_SPTK_MANY_CLR_B2:
  2478. case EM_BR_RET_DPNT_FEW_CLR_B2:
  2479. case EM_BR_RET_DPNT_MANY_CLR_B2:
  2480. case EM_BR_RET_DPTK_FEW_CLR_B2:
  2481. case EM_BR_RET_DPTK_MANY_CLR_B2:
  2482. if (UseTraceFlag)
  2483. {
  2484. returnvalue = OFFSET_TRACE;
  2485. break;
  2486. }
  2487. if ((info.pred.valid == TRUE) &&
  2488. (info.pred.type == EM_DECODER_PRED_REG))
  2489. {
  2490. if ((GetReg64(PREDS) >> info.pred.value) & 0x1) // if PR[qp] = 1
  2491. {
  2492. if (info.src1.type == EM_DECODER_REGISTER)
  2493. {
  2494. if (info.src1.reg_info.type == EM_DECODER_BR_REG)
  2495. {
  2496. returnvalue = GetReg64(info.src1.reg_info.value + BRRP);
  2497. }
  2498. }
  2499. }
  2500. }
  2501. break;
  2502. // chk always branches under debugger
  2503. case EM_CHK_S_I_R2_TARGET25:
  2504. case EM_CHK_S_M_R2_TARGET25:
  2505. case EM_CHK_S_F2_TARGET25:
  2506. case EM_CHK_A_CLR_R1_TARGET25:
  2507. case EM_CHK_A_CLR_F1_TARGET25:
  2508. case EM_CHK_A_NC_R1_TARGET25:
  2509. case EM_CHK_A_NC_F1_TARGET25:
  2510. if (UseTraceFlag)
  2511. {
  2512. returnvalue = OFFSET_TRACE;
  2513. break;
  2514. }
  2515. if ((info.pred.valid == TRUE) && (info.pred.type == EM_DECODER_PRED_REG))
  2516. {
  2517. if ((GetReg64(PREDS) >> info.pred.value) & 0x1) // if PR[qp] = 1
  2518. {
  2519. returnvalue =
  2520. IEL_GETQW0(info.src2.imm_info.val64) + firaddr;
  2521. }
  2522. }
  2523. break;
  2524. default:
  2525. if (UseTraceFlag)
  2526. {
  2527. returnvalue = OFFSET_TRACE;
  2528. break;
  2529. }
  2530. break;
  2531. }
  2532. }
  2533. else if (UseTraceFlag)
  2534. {
  2535. // We can't analyze the current instruction to
  2536. // determine how and where to step so just rely
  2537. // on hardware tracing if possible.
  2538. returnvalue = OFFSET_TRACE;
  2539. }
  2540. else
  2541. {
  2542. ErrOut("em_decoder_decode: %s\n",
  2543. (*pfnEM_Decoder_err_msg)((EM_Decoder_Err) err));
  2544. }
  2545. }
  2546. ADDRFLAT( NextAddr, returnvalue );
  2547. }
  2548. BOOL
  2549. Ia64MachineInfo::GetPrefixedSymbolOffset(ProcessInfo* Process,
  2550. ULONG64 SymOffset,
  2551. ULONG Flags,
  2552. PULONG64 PrefixedSymOffset)
  2553. {
  2554. ULONG64 EntryPoint;
  2555. ULONG64 HalfBundle;
  2556. if (m_Target->ReadPointer(Process, this, SymOffset, &EntryPoint) != S_OK)
  2557. {
  2558. if (Flags & GETPREF_VERBOSE)
  2559. {
  2560. ErrOut("Ia64MachineInfo::GetPrefixedSymbolOffset: "
  2561. "Unable to read IA64 PLABEL entry point @ 0x%I64x\n",
  2562. SymOffset);
  2563. }
  2564. return FALSE;
  2565. }
  2566. *PrefixedSymOffset = EntryPoint;
  2567. if (m_Target->
  2568. ReadAllVirtual(Process, EntryPoint,
  2569. &HalfBundle, sizeof(HalfBundle)) != S_OK)
  2570. {
  2571. if (Flags & GETPREF_VERBOSE)
  2572. {
  2573. WarnOut("Ia64MachineInfo::GetPrefixedSymbolOffset: "
  2574. "Reading half bundle @ 0x%I64x failed\n", EntryPoint);
  2575. }
  2576. }
  2577. else
  2578. {
  2579. PEM_TEMPLATE_INFO TemplInfo;
  2580. TemplInfo = EmTemplateInfo(GET_TEMPLATE(HalfBundle));
  2581. if (TemplInfo && (TemplInfo->slot[0].unit != No_Unit))
  2582. {
  2583. #if 0
  2584. dprintf("Ia64MachineInfo::GetPrefixedSymbolOffset: "
  2585. "Seems to be a valid bundle: %s.\n",
  2586. TemplInfo->name);
  2587. #endif
  2588. }
  2589. else if (Flags & GETPREF_VERBOSE)
  2590. {
  2591. WarnOut("Ia64MachineInfo::GetPrefixedSymbolOffset: "
  2592. "Read IA64 PLABEL entry point @ 0xI64x is NOT "
  2593. "a valid bundle...\n",
  2594. EntryPoint);
  2595. }
  2596. }
  2597. return TRUE;
  2598. }
  2599. void
  2600. Ia64MachineInfo::IncrementBySmallestInstruction (PADDR Addr)
  2601. {
  2602. if ((Flat(*Addr) & 0xf) == 8)
  2603. {
  2604. AddrAdd(Addr, 8);
  2605. }
  2606. else
  2607. {
  2608. AddrAdd(Addr, 4);
  2609. }
  2610. }
  2611. void
  2612. Ia64MachineInfo::DecrementBySmallestInstruction (PADDR Addr)
  2613. {
  2614. if ((Flat(*Addr) & 0xf) == 0)
  2615. {
  2616. AddrSub(Addr, 8);
  2617. }
  2618. else
  2619. {
  2620. AddrSub(Addr, 4);
  2621. }
  2622. }
  2623. void
  2624. Ia64MachineInfo::PrintStackFrameAddressesTitle(ULONG Flags)
  2625. {
  2626. if (Flags & DEBUG_STACK_FRAME_ADDRESSES_RA_ONLY)
  2627. {
  2628. MachineInfo::PrintStackFrameAddressesTitle(Flags);
  2629. }
  2630. else
  2631. {
  2632. PrintMultiPtrTitle("Child-SP", 1);
  2633. PrintMultiPtrTitle("Child-BSP", 1);
  2634. PrintMultiPtrTitle("RetAddr", 1);
  2635. }
  2636. }
  2637. void
  2638. Ia64MachineInfo::PrintStackFrameAddresses(ULONG Flags,
  2639. PDEBUG_STACK_FRAME StackFrame)
  2640. {
  2641. if (Flags & DEBUG_STACK_FRAME_ADDRESSES_RA_ONLY)
  2642. {
  2643. MachineInfo::PrintStackFrameAddresses(Flags, StackFrame);
  2644. }
  2645. else
  2646. {
  2647. dprintf("%s %s %s ",
  2648. FormatAddr64(StackFrame->StackOffset),
  2649. FormatAddr64(StackFrame->FrameOffset),
  2650. FormatAddr64(StackFrame->ReturnOffset));
  2651. }
  2652. }
  2653. void
  2654. Ia64MachineInfo::PrintStackArgumentsTitle(ULONG Flags)
  2655. {
  2656. if (Flags & DEBUG_STACK_NONVOLATILE_REGISTERS)
  2657. {
  2658. return;
  2659. }
  2660. MachineInfo::PrintStackArgumentsTitle(Flags);
  2661. }
  2662. void
  2663. Ia64MachineInfo::PrintStackArguments(ULONG Flags,
  2664. PDEBUG_STACK_FRAME StackFrame)
  2665. {
  2666. if (Flags & DEBUG_STACK_NONVOLATILE_REGISTERS)
  2667. {
  2668. return;
  2669. }
  2670. MachineInfo::PrintStackArguments(Flags, StackFrame);
  2671. }
  2672. void
  2673. Ia64MachineInfo::PrintStackNonvolatileRegisters(ULONG Flags,
  2674. PDEBUG_STACK_FRAME StackFrame,
  2675. PCROSS_PLATFORM_CONTEXT Context,
  2676. ULONG FrameNum)
  2677. {
  2678. ULONGLONG Registers[96+2];
  2679. ULONGLONG RegisterHome = Context->IA64Context.RsBSP;
  2680. ULONG RegisterCount;
  2681. ULONG RegisterNumber;
  2682. ULONG ReadLength;
  2683. ULONG i;
  2684. i = (ULONG)Context->IA64Context.StIFS & 0x3fff;
  2685. if (FrameNum == 0)
  2686. {
  2687. RegisterCount = i & 0x7f;
  2688. }
  2689. else
  2690. {
  2691. RegisterCount = (i >> 7) & 0x7f;
  2692. }
  2693. // Sanity.
  2694. if (RegisterCount > 96)
  2695. {
  2696. return;
  2697. }
  2698. if (RegisterHome & 3)
  2699. {
  2700. return;
  2701. }
  2702. #if 0
  2703. //
  2704. // This is only for debugging this function.
  2705. //
  2706. dprintf(" IFS %016I64x PFS %016I64x\n",
  2707. Context->IA64Context.StIFS,
  2708. Context->IA64Context.RsPFS);
  2709. #endif
  2710. if (RegisterCount == 0)
  2711. {
  2712. #if 0
  2713. // //
  2714. // // Not much point doing anything in this case.
  2715. // //
  2716. //
  2717. // dprintf("\n");
  2718. // return;
  2719. #endif
  2720. // Display at least 4 registers
  2721. RegisterCount = 4;
  2722. }
  2723. //
  2724. // Calculate the number of registers to read from the
  2725. // RSE stack. For every 63 registers there will be at
  2726. // at least one NaT collection register, depending on
  2727. // where we start, there may be another one.
  2728. //
  2729. // First, starting at the current BSP, if we cross a 64 (0x40)
  2730. // boundry, then we have an extra.
  2731. //
  2732. ReadLength = (((((ULONG)Context->IA64Context.RsBSP) >> 3) & 0x1f) +
  2733. RegisterCount) >> 6;
  2734. //
  2735. // Add 1 for every 63 registers.
  2736. //
  2737. ReadLength = (RegisterCount / 63) + RegisterCount;
  2738. ReadLength *= sizeof(ULONGLONG);
  2739. //
  2740. // Read the registers for this frame.
  2741. //
  2742. if (m_Target->ReadAllVirtual(g_Process, RegisterHome,
  2743. Registers, ReadLength) != S_OK)
  2744. {
  2745. //
  2746. // This shouldn't have happened.
  2747. //
  2748. ErrOut("-- Couldn't read registers BSP=%I64x, length %d.\n",
  2749. RegisterHome,
  2750. ReadLength);
  2751. return;
  2752. }
  2753. //
  2754. // Note: the following code should be altered to understand
  2755. // NaTs as they come from the register stack (currently
  2756. // it ignores them).
  2757. //
  2758. RegisterNumber = 32;
  2759. for (i = 0; RegisterCount; RegisterHome += sizeof(ULONGLONG), i++)
  2760. {
  2761. //
  2762. // For now, just skip NaT collection registers. Every
  2763. // 64th entry is a NaT collection register and the RSE
  2764. // stack is nicely aligned so any entry at an address
  2765. // ending in 63*8 is a NaT entry.
  2766. //
  2767. // 63 * 8 == 0x3f << 3 == 0x1f8
  2768. //
  2769. if ((RegisterHome & 0x1f8) == 0x1f8)
  2770. {
  2771. continue;
  2772. }
  2773. if ((RegisterNumber & 3) == 0)
  2774. {
  2775. if (RegisterNumber <= 99)
  2776. {
  2777. dprintf(" ");
  2778. }
  2779. dprintf("r%d", RegisterNumber);
  2780. }
  2781. dprintf(" %s", FormatAddr64(Registers[i]));
  2782. if ((RegisterNumber & 3) == 3)
  2783. {
  2784. dprintf("\n");
  2785. }
  2786. RegisterNumber++;
  2787. RegisterCount--;
  2788. }
  2789. if ((RegisterNumber & 3) != 0)
  2790. {
  2791. dprintf("\n");
  2792. }
  2793. dprintf("\n");
  2794. }
  2795. void
  2796. Ia64MachineInfo::PrintStackFrameMemoryUsage(PDEBUG_STACK_FRAME CurFrame,
  2797. PDEBUG_STACK_FRAME PrevFrame)
  2798. {
  2799. if (CurFrame->FrameOffset >= PrevFrame->FrameOffset &&
  2800. CurFrame->StackOffset >= PrevFrame->StackOffset)
  2801. {
  2802. dprintf(" %6x ",
  2803. (ULONG)(CurFrame->FrameOffset - PrevFrame->FrameOffset) +
  2804. (ULONG)(CurFrame->StackOffset - PrevFrame->StackOffset));
  2805. }
  2806. else
  2807. {
  2808. dprintf(" ");
  2809. }
  2810. }