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84 lines
2.6 KiB
84 lines
2.6 KiB
// ACPI register definitions
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// PM1_BLK definitions
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// PM1_STS register
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#define PM1_STS_OFFSET 0x00 // 16 bits
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#define PM1_TMR_STS_BIT 0
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#define PM1_TMR_STS (1 << PM1_TMR_STS_BIT)
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#define PM1_BM_STS_BIT 4
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#define PM1_BM_STS (1 << PM1_BM_STS_BIT)
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#define PM1_GBL_STS_BIT 5
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#define PM1_GBL_STS (1 << PM1_GBL_STS_BIT)
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#define PM1_PWRBTN_STS_BIT 8
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#define PM1_PWRBTN_STS (1 << PM1_PWRBTN_STS_BIT)
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#define PM1_SLEEPBTN_STS_BIT 9
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#define PM1_SLEEPBTN_STS (1 << PM1_SLEEPBTN_STS_BIT)
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#define PM1_RTC_STS_BIT 10
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#define PM1_RTC_STS (1 << PM1_RTC_STS_BIT)
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#define PM1_WAK_STS_BIT 15
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#define PM1_WAK_STS (1 << PM1_WAK_STS_BIT)
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// PM1_EN register
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#define PM1_EN_OFFSET 0x02 // 16 bits
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#define PM1_TMR_EN_BIT 0
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#define PM1_TMR_EN (1 << PM1_TMR_EN_BIT)
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#define PM1_GBL_EN_BIT 5
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#define PM1_GBL_EN (1 << PM1_GBL_EN_BIT)
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#define PM1_PWRBTN_EN_BIT 8
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#define PM1_PWRBTN_EN (1 << PM1_PWRBTN_EN_BIT)
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#define PM1_SLEEPBTN_EN_BIT 9
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#define PM1_SLEEPBTN_EN (1 << PM1_SLEEPBTN_EN_BIT)
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#define PM1_RTC_EN_BIT 10
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#define PM1_RTC_EN (1 << PM1_RTC_EN_BIT)
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// PM1_CNTRL register
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#if SPEC_VER < 71
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#define PM1_CNTRL_OFFSET 0x04 // 16 bits
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#endif
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#define PM1_SCI_EN_BIT 0
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#define PM1_SCI_EN (1 << PM1_SCI_EN_BIT)
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#define PM1_BM_RLD_BIT 1
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#define PM1_BM_RLD (1 << PM1_BM_RLD_BIT)
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#define PM1_GBL_RLS_BIT 2
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#define PM1_GBL_RLS (1 << PM1_GBL_RLS_BIT)
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#define PM1_SLP_EN_BIT 13
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#define PM1_SLP_EN (1 << PM1_SLP_EN_BIT)
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// P_CNTRL regsiter
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#define P_CNTRL_OFFSET 0x00 // 32 bits
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// P_LVL2 register
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#define P_LVL2_OFFSET 0x04 // 8 bits (read only)
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// P_LVL2 register
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#define P_LVL3_OFFSET 0x05 // 8 bits (read only)
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#define P_THT_EN_BIT 0x04
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#define P_THT_EN (1 << P_THT_EN_BIT)
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#define SLP_CMD (1 << 13) // Write this value to pm control to put the machine to sleep
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#define SLP_TYP_POS 10 // Bit position of 3 bit slp typ field in pm control register
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// GP register
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#define MAX_GPE 256
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#define MAX_GPE_BUFFER_SIZE (MAX_GPE/8)
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