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1200 lines
30 KiB
1200 lines
30 KiB
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/*++
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Copyright (c) 1998 Microsoft Corporation
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Module Name:
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pmtimerc.c
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Abstract:
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Implements workarounds for PIIX4 bugs. The
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nature of the ACPI timer in PIIX4 is that it
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occasionally returns completely bogus data.
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Intel claims that this happens about 0.02% of
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the time when it is polled continuously. As NT
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almost never polls it continuously, we don't
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really know what the real behavior is.
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The workaround is something like this: On
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every clock tick, we read the timer. Using this
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value, we compute an upper bound for what the
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timer may read by the next clock tick. We also
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record the minimum value ever returned. If, at
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any time, we read the timer and it does not fall
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within the minimum and upper bound, then we read
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it again. If it either falls within the bounds
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or it is very close to the last read, we use it.
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If not, we read it again.
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This behavior allows us to read the timer only
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once almost all the time that we need a time
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stamp. Exiting the debugger is almost guaranteed
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to cause the read-twice behavior.
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Author:
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Jake Oshins (jakeo) 30-Oct-1998
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Environment:
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Kernel mode only.
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Revision History:
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--*/
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#include "halp.h"
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#ifdef APIC_HAL
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#include "apic.inc"
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#include "ntapic.inc"
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#endif
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BOOLEAN
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HalpPmTimerSpecialStall(
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IN ULONG Ticks
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);
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BOOLEAN
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HalpPmTimerScaleTimers(
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VOID
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);
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LARGE_INTEGER
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HalpPmTimerQueryPerfCount(
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OUT PLARGE_INTEGER PerformanceFrequency OPTIONAL
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);
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VOID
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HalpAdjustUpperBoundTable2X(
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VOID
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);
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(INIT, HalpPmTimerScaleTimers)
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#pragma alloc_text(INIT, HalpPmTimerSpecialStall)
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#pragma alloc_text(INIT, HalpAdjustUpperBoundTable2X)
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#endif
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typedef struct {
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ULONG CurrentTimePort;
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volatile ULONG TimeLow;
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volatile ULONG TimeHigh2;
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volatile ULONG TimeHigh1;
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ULONG MsbMask;
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ULONG BiasLow;
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ULONG BiasHigh;
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volatile ULONG UpperBoundLow;
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volatile ULONG UpperBoundHigh2;
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volatile ULONG UpperBoundHigh1;
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} TIMER_INFO, *PTIMER_INFO;
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typedef struct {
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ULONG RawRead[2];
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ULONG AdjustedLow[2];
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ULONG AdjustedHigh[2];
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ULONG TITL;
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ULONG TITH;
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ULONG UBL;
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ULONG UBH;
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ULONG ReturnedLow;
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ULONG ReturnedHigh;
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ULONG ReadCount;
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ULONG TickMin;
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ULONG TickCount;
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ULONG TickNewUB;
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//UCHAR padding[4];
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} TIMER_PERF_INDEX ,*PTIMER_PERF_INDEX;
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extern TIMER_INFO TimerInfo;
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#if DBG
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ULONG LastKQPCValue[3] = {0};
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static ULARGE_INTEGER LastClockSkew = { 0, 0 };
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#endif
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extern PVOID QueryTimer;
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typedef LARGE_INTEGER (*PQUERY_TIMER)(VOID);
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#ifndef NO_PM_KEQPC
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extern ULONG HalpCurrentMSRateTableIndex;
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extern UCHAR HalpBrokenAcpiTimer;
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extern UCHAR HalpPiix4;
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#if DBG && !defined(_AMD64_)
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#define DBG_TIMER_PERF 1
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#else
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#define DBG_TIMER_PERF 0
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#endif
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#if DBG_TIMER_PERF
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extern TIMER_PERF_INDEX TimerPerf[];
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extern ULONG TimerPerfIndex;
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#endif
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#if 0
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static KSPIN_LOCK HalpBrokenTimerLock;
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#endif
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//
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// The UpperBoundTable contains the values which should be added
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// to the current counter value to ensure that the upper bound is
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// reasonable. Values listed here are for all the 15 possible
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// timer tick lengths. The unit is "PM Timer Ticks" and the
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// value corresponds to the number of ticks that will pass in
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// roughly two timer ticks at this rate.
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//
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#define UPPER_BOUND_TABLE_SIZE 15
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static ULONG HalpPiix4UpperBoundTable[] = {
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#if 0
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20000 , // 1 ms
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35000 , // 2 ms
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50000 , // 3 ms
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65000 , // 4 ms
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85000 , // 5 ms
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100000, // 6 ms
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115000, // 7 ms
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130000, // 8 ms
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150000, // 9 ms
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165000, // 10 ms
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180000, // 11 ms
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195000, // 12 ms
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211000, // 13 ms
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230000, // 14 ms
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250000 // 15 ms
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#endif
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14318,
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28636,
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42954,
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57272,
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71590,
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85908,
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100226,
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114544,
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128862,
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143180,
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157498,
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171818,
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186136,
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200454,
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214772
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};
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VOID
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HalpAdjustUpperBoundTable2X(
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VOID
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)
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/*++
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Routine Description:
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This adjusts the upper bound table for PM timer running at 2X
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Arguments:
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None
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Return Value:
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None
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--*/
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{
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ULONG Looper;
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for (Looper = 0; Looper < UPPER_BOUND_TABLE_SIZE; Looper++) {
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HalpPiix4UpperBoundTable[Looper] *= 2;
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}
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}
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ULONG
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HalpQuery8254Counter(
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VOID
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);
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static ULARGE_INTEGER ClockSkew = { 0, 0 };
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static BOOLEAN PositiveSkew = TRUE;
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#ifdef TIMER_DBG
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static BOOLEAN DoItOnce = TRUE;
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static BOOLEAN PacketLog = TRUE;
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static BOOLEAN TimerTick = FALSE;
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static ULONG NegativeGlitches = 0;
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static ULONG PositiveGlitches = 0;
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static ULONG PacketLogCount = 5;
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typedef struct _TIMER_PACKET {
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ULONG Hardware;
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ULARGE_INTEGER CurrentRead0;
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ULARGE_INTEGER TimeStamp;
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ULARGE_INTEGER Minimum;
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ULARGE_INTEGER Maximum;
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BOOLEAN PositiveSkew;
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BOOLEAN TimerTick;
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UCHAR Reserved[2];
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ULARGE_INTEGER Skew;
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ULARGE_INTEGER CurrentRead1;
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} TIMER_PACKET, *PTIMER_PACKET;
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#define MAX_TIMER_PACKETS 10
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static ULONG PacketIndex = 0;
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static TIMER_PACKET TimerLog[MAX_TIMER_PACKETS];
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#endif // TIMER_DBG
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#define A_FEW_TICKS 3
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ULARGE_INTEGER
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FASTCALL
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HalpQueryBrokenPiix4(
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VOID
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)
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{
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ULARGE_INTEGER lastRead;
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ULARGE_INTEGER currentRead;
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ULARGE_INTEGER currentRead0;
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ULARGE_INTEGER minTime;
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ULARGE_INTEGER upperBound;
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ULONG hardwareVal;
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ULONG bitsInHardware;
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ULONG flags;
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ULONG ClockBits;
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ULARGE_INTEGER RollOver;
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ULARGE_INTEGER SkewedTime;
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#ifndef NT_UP
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KIRQL Irql;
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#endif
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#ifdef TIMER_DBG
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ULONG Index;
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#endif
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#if DBG_TIMER_PERF
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ULONG readCount = 0;
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PTIMER_PERF_INDEX timerPerfRecord =
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&(TimerPerf[TimerPerfIndex]);
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RtlZeroMemory(timerPerfRecord, sizeof(TIMER_PERF_INDEX));
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#endif
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//
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// N.B. This is, of course, not MP safe. But none
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// of the PIIX4 workaround code is. MP machines don't
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// use PIIX4 code.
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//
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#if 0
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KeAcquireSpinLock(&HalpBrokenTimerLock, &Irql);
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#endif
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flags = HalpDisableInterrupts();
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lastRead.QuadPart = 0;
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bitsInHardware = (TimerInfo.MsbMask << 1) - 1;
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//
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// Get current minimum reported time.
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//
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minTime.HighPart = TimerInfo.TimeHigh2;
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minTime.LowPart = TimerInfo.TimeLow;
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#if DBG_TIMER_PERF
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timerPerfRecord->TITL = TimerInfo.TimeLow;
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timerPerfRecord->TITH = TimerInfo.TimeHigh1;
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#endif
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//
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// Loop until we get a time that we can believe.
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//
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RollOver.QuadPart = 0;
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while (TRUE) {
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//
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// Read the hardware.
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//
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hardwareVal = READ_PORT_ULONG(UlongToPtr(TimerInfo.CurrentTimePort));
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#ifdef TIMER_DBG
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if (DoItOnce) {
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RtlZeroMemory(&TimerLog[0], sizeof(TIMER_PACKET) *
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MAX_TIMER_PACKETS);
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DoItOnce = FALSE;
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}
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if (FALSE) { //((hardwareVal & 0xFFFF8000) == 0xFFFF8000) {
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PacketLog = TRUE;
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PacketLogCount = 5;
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}
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if (PacketLog) {
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if (PacketLogCount == 0) {
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PacketLog = FALSE;
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}
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if (PacketLogCount > 0) {
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Index = PacketIndex++ % MAX_TIMER_PACKETS;
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RtlZeroMemory(&TimerLog[Index], sizeof(TIMER_PACKET));
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TimerLog[Index].Hardware = hardwareVal;
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TimerLog[Index].TimerTick = TimerTick;
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{
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ULONG TSCounterHigh;
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ULONG TSCounterLow;
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_asm { rdtsc
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mov TSCounterLow, eax
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mov TSCounterHigh, edx };
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TimerLog[Index].TimeStamp.HighPart = TSCounterHigh;
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TimerLog[Index].TimeStamp.LowPart = TSCounterLow;
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}
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TimerLog[Index].Minimum = minTime;
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TimerLog[Index].PositiveSkew = PositiveSkew;
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TimerLog[Index].Skew = ClockSkew;
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if ((PacketLogCount < 4) && (PacketLogCount > 0)) {
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PacketLogCount--;
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}
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}
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}
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#endif // TIMER_DBG
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currentRead.HighPart = minTime.HighPart;
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currentRead.LowPart = (minTime.LowPart & (~bitsInHardware)) |
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hardwareVal;
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currentRead0 = currentRead;
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//
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// Check for rollover, since this function is called during each
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// system clock interrupt, if the HW has really rolled over, then it
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// should be within upper bound ticks since that is approximately
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// twice the number of ticks we expect during each system clock
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// interrupt, however, some broken timers occasionally tick backward
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// a few ticks, and if this happens, we may accidentally detect
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// more than one rollover during this period depending upon how
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// frequently applications are calling this API, and how often the
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// HW glitches, and this can cause applications to jerk like mad,
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// but we cannot apply heuristics to try to throw out any of these
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// detected rolls during this interval because we could accidentally
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// throw out the one and only legitimate rollover
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//
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if (RollOver.QuadPart > 0) {
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currentRead.QuadPart += RollOver.QuadPart;
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} else {
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SkewedTime = minTime;
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//
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// If time is skewed, we need to remove the skew to accurately
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// assess whether the timer has wrapped
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//
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if (ClockSkew.QuadPart > 0) {
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if (PositiveSkew) {
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SkewedTime.QuadPart -= ClockSkew.QuadPart;
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} else {
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SkewedTime.QuadPart += ClockSkew.QuadPart;
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}
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}
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if (((ULONG)(SkewedTime.LowPart & bitsInHardware) > hardwareVal) &&
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(hardwareVal < (HalpPiix4UpperBoundTable[HalpCurrentMSRateTableIndex] / 2))) {
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RollOver.QuadPart = (UINT64)(TimerInfo.MsbMask) << 1;
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currentRead.QuadPart += RollOver.QuadPart;
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}
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}
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#ifdef TIMER_DBG
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if (PacketLog) {
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TimerLog[Index].CurrentRead0 = currentRead;
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}
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#endif
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#if DBG_TIMER_PERF
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readCount = timerPerfRecord->ReadCount;
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readCount &= 1;
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timerPerfRecord->RawRead[readCount] = hardwareVal;
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timerPerfRecord->AdjustedLow[readCount] = currentRead.LowPart;
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timerPerfRecord->AdjustedHigh[readCount] = currentRead.HighPart;
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timerPerfRecord->ReadCount++;
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#endif
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//
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// Get the current upper bound.
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//
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upperBound.HighPart = TimerInfo.UpperBoundHigh2;
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upperBound.LowPart = TimerInfo.UpperBoundLow;
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#ifdef TIMER_DBG
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if (PacketLog) {
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TimerLog[Index].Maximum = upperBound;
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}
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#endif
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if ((minTime.QuadPart <= currentRead.QuadPart) &&
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(currentRead.QuadPart <= upperBound.QuadPart)) {
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//
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// This value from the counter is within the boundaries
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// that we expect.
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//
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//
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// If there was previously a skew, unskew
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//
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ClockSkew.QuadPart = 0;
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break;
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}
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if (ClockSkew.QuadPart > 0) {
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SkewedTime = currentRead;
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if (PositiveSkew) {
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SkewedTime.QuadPart += ClockSkew.QuadPart;
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} else {
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SkewedTime.QuadPart -= ClockSkew.QuadPart;
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}
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if ((minTime.QuadPart <= SkewedTime.QuadPart) &&
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(SkewedTime.QuadPart <= upperBound.QuadPart)) {
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//
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// This value from the counter is within the boundaries
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// that we accept
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//
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currentRead = SkewedTime;
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break;
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}
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}
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//
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// We are guaranteed to break out of this as soon as we read
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// two consectutive non-decreasing values from the timer whose
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// difference is less than or equal to 0xfff-- is this
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// too much to ask?
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//
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if ((currentRead.QuadPart - lastRead.QuadPart) > 0xfff) {
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lastRead = currentRead;
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continue;
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}
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#ifdef TIMER_DBG
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if (PacketLog) {
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if (PacketLogCount > 0) {
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PacketLogCount--;
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}
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}
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#endif
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//
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// Now we are really screwed-- we are consistently reading values
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// from the timer, that are not within the boundaries we expect
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//
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// We are going to record/apply a skew that will get us back on
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// track
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//
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if (currentRead.QuadPart < minTime.QuadPart) {
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//
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// Time jumped backward a small fraction, just add a few ticks
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//
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if ((minTime.QuadPart - currentRead.QuadPart) < 0x40) {
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SkewedTime.QuadPart = minTime.QuadPart + A_FEW_TICKS;
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//
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// Time jumped backward quite a bit, add half a system clock
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// interrupt worth of ticks since we know this routine
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// gets called every clock interrupt
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//
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} else {
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SkewedTime.QuadPart = minTime.QuadPart +
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(HalpPiix4UpperBoundTable[HalpCurrentMSRateTableIndex] /
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8);
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}
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#ifdef TIMER_DBG
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PositiveGlitches++;
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if (PacketLog) {
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TimerLog[Index].PositiveSkew = TRUE;
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TimerLog[Index].Skew.QuadPart =
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SkewedTime.QuadPart - currentRead.QuadPart;
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}
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#endif // TIMER_DBG
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PositiveSkew = TRUE;
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ClockSkew.QuadPart = SkewedTime.QuadPart - currentRead.QuadPart;
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//
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// currentRead > upperBound
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//
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} else {
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//
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// Time jumped forward more than a system clock, interrupts
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// may have been disabled by some unruly driver, or maybe
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// we were hung up in the debugger, at any rate, let's add
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// a full system clock interrupt worth of ticks
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//
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SkewedTime.QuadPart = minTime.QuadPart +
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(HalpPiix4UpperBoundTable[HalpCurrentMSRateTableIndex] /
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4);
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#ifdef TIMER_DBG
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NegativeGlitches++;
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if (PacketLog) {
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TimerLog[Index].PositiveSkew = FALSE;
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TimerLog[Index].Skew.QuadPart =
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currentRead.QuadPart - SkewedTime.QuadPart;
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}
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#endif // TIMER_DBG
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PositiveSkew = FALSE;
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ClockSkew.QuadPart = currentRead.QuadPart - SkewedTime.QuadPart;
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}
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currentRead = SkewedTime;
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break;
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}
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#ifdef TIMER_DBG
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if (PacketLog) {
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TimerLog[Index].CurrentRead1 = currentRead;
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}
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#endif
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//
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// If we detected a rollover, and there is negative skew, then we
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// should recalculate the skew as positive skew to avoid making
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// an erroneous correction on the next read
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//
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if ((ClockSkew.QuadPart > 0) && (RollOver.QuadPart > 0) &&
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(PositiveSkew == FALSE) && (ClockSkew.QuadPart > hardwareVal)) {
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if (currentRead.QuadPart >= currentRead0.QuadPart) {
|
|
ClockSkew.QuadPart = currentRead.QuadPart - currentRead0.QuadPart;
|
|
PositiveSkew = TRUE;
|
|
|
|
//
|
|
// I've studied this case a few times, and it appears we
|
|
// have detected a rollover and a glitch together, and
|
|
// the skew is incorrectly the difference between the bogus
|
|
// rollover time, the one we don't respect, rather than
|
|
// currentRead0, so we need to patch it to keep skew from
|
|
// growing larger than clock bits
|
|
//
|
|
} else /* currentRead.QuadPart < currentRead0.QuadPart */ {
|
|
|
|
ASSERT((ClockSkew.QuadPart > bitsInHardware) &&
|
|
(currentRead0.QuadPart =
|
|
(currentRead.QuadPart +
|
|
(ClockSkew.QuadPart & bitsInHardware))));
|
|
|
|
if ((ClockSkew.QuadPart > bitsInHardware) &&
|
|
(currentRead0.QuadPart =
|
|
(currentRead.QuadPart +
|
|
(ClockSkew.QuadPart & bitsInHardware)))) {
|
|
|
|
ClockSkew.QuadPart &= bitsInHardware;
|
|
}
|
|
#if TIMER_DBG
|
|
else {
|
|
if ((PacketLog) && (PacketLogCount > 3)) {
|
|
PacketLogCount = 3;
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
}
|
|
|
|
//
|
|
// Similarly, if there is no rollover, but positive skew is causing
|
|
// the timer to rollover, then we need to readjust the skew also to
|
|
// avoid the possibility of making an erroneous correction on the next
|
|
// read
|
|
//
|
|
if ((ClockSkew.QuadPart > 0) && (RollOver.QuadPart == 0) &&
|
|
(PositiveSkew == TRUE) && ((currentRead.QuadPart & ~(ULONG_PTR)bitsInHardware) >
|
|
(minTime.QuadPart & ~(ULONG_PTR)bitsInHardware))) {
|
|
|
|
//
|
|
// I'm not sure what this means, or how it can happen, but I will
|
|
// endeavor to decipher the condition if and when it occurs
|
|
//
|
|
ASSERT((currentRead0.QuadPart + bitsInHardware + 1) >
|
|
currentRead.QuadPart);
|
|
|
|
if (currentRead0.QuadPart + bitsInHardware + 1 >
|
|
currentRead.QuadPart) {
|
|
ClockSkew.QuadPart = currentRead0.QuadPart + bitsInHardware + 1 -
|
|
currentRead.QuadPart;
|
|
PositiveSkew = FALSE;
|
|
}
|
|
#if TIMER_DBG
|
|
else {
|
|
if ((PacketLog) && (PacketLogCount > 3)) {
|
|
PacketLogCount = 3;
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
//
|
|
// Compute new upper bound.
|
|
//
|
|
upperBound.QuadPart = currentRead.QuadPart +
|
|
HalpPiix4UpperBoundTable[HalpCurrentMSRateTableIndex];
|
|
|
|
//
|
|
// Update upper and lower bounds.
|
|
//
|
|
|
|
TimerInfo.TimeHigh1 = currentRead.HighPart;
|
|
TimerInfo.TimeLow = currentRead.LowPart;
|
|
TimerInfo.TimeHigh2 = currentRead.HighPart;
|
|
|
|
TimerInfo.UpperBoundHigh1 = upperBound.HighPart;
|
|
TimerInfo.UpperBoundLow = upperBound.LowPart;
|
|
TimerInfo.UpperBoundHigh2 = upperBound.HighPart;
|
|
|
|
#if DBG
|
|
LastClockSkew = ClockSkew;
|
|
#endif
|
|
|
|
#if 0
|
|
KeReleaseSpinLock(&HalpBrokenTimerLock, Irql);
|
|
#endif
|
|
|
|
HalpRestoreInterrupts(flags);
|
|
|
|
#if DBG_TIMER_PERF
|
|
timerPerfRecord->ReturnedLow = currentRead.LowPart;
|
|
timerPerfRecord->ReturnedHigh = currentRead.HighPart;
|
|
timerPerfRecord->UBL = upperBound.LowPart;
|
|
timerPerfRecord->UBH = upperBound.HighPart;
|
|
TimerPerfIndex = (TimerPerfIndex + 1) % (4096 / sizeof(TIMER_PERF_INDEX));
|
|
#endif
|
|
|
|
return currentRead;
|
|
}
|
|
|
|
VOID
|
|
HalpBrokenPiix4TimerTick(
|
|
VOID
|
|
)
|
|
{
|
|
ULARGE_INTEGER currentCount;
|
|
ULARGE_INTEGER upperBound;
|
|
|
|
#if DBG
|
|
PTIMER_PERF_INDEX timerPerfRecord;
|
|
#endif
|
|
|
|
#ifdef TIMER_DBG
|
|
TimerTick = TRUE;
|
|
#endif
|
|
|
|
currentCount =
|
|
HalpQueryBrokenPiix4();
|
|
|
|
#ifdef TIMER_DBG
|
|
TimerTick = FALSE;
|
|
#endif
|
|
|
|
#if DBG_TIMER_PERF
|
|
timerPerfRecord = &(TimerPerf[TimerPerfIndex]);
|
|
timerPerfRecord->TickMin = currentCount.LowPart;
|
|
timerPerfRecord->TickNewUB = TimerInfo.UpperBoundLow;
|
|
timerPerfRecord->TickCount++;
|
|
#endif
|
|
}
|
|
|
|
#endif // NO_PM_KEQPC
|
|
|
|
VOID
|
|
HalaAcpiTimerInit(
|
|
IN ULONG TimerPort,
|
|
IN BOOLEAN TimerValExt
|
|
)
|
|
{
|
|
#if 0
|
|
KeInitializeSpinLock(&HalpBrokenTimerLock);
|
|
#endif
|
|
|
|
TimerInfo.CurrentTimePort = TimerPort;
|
|
|
|
if (TimerValExt) {
|
|
TimerInfo.MsbMask = 0x80000000;
|
|
}
|
|
|
|
#ifndef NO_PM_KEQPC
|
|
if (HalpBrokenAcpiTimer) {
|
|
QueryTimer = HalpQueryBrokenPiix4;
|
|
|
|
#if DBG
|
|
{
|
|
KIRQL oldIrql;
|
|
|
|
KeRaiseIrql(HIGH_LEVEL, &oldIrql);
|
|
LastKQPCValue[0] = 0;
|
|
LastKQPCValue[1] = 0;
|
|
LastKQPCValue[2] = 0;
|
|
KeLowerIrql(oldIrql);
|
|
}
|
|
#endif
|
|
}
|
|
#endif // NO_PM_KEQPC
|
|
}
|
|
|
|
|
|
#define PIT_FREQUENCY 1193182
|
|
#define PM_TMR_FREQ 3579545
|
|
|
|
#define EIGHTH_SECOND_PM_TICKS 447443
|
|
|
|
ULONG PMTimerFreq = PM_TMR_FREQ;
|
|
|
|
#ifdef SPEEDY_BOOT
|
|
|
|
static ULONG HalpFoundPrime = 0;
|
|
|
|
VOID
|
|
HalpPrimeSearch(
|
|
IN ULONG Primer,
|
|
IN ULONG BitMask
|
|
)
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
The objective of this routine is to waste as many CPU cycles as possible
|
|
by searching for prime numbers. To be fairly consistent in the amount
|
|
of time it wastes, it is severly less than optimal-- we force Primer
|
|
to be odd by or-ing in 15, then we and it with the BitMask, and or
|
|
in BitMask+1, and finally we continue testing after we discover the
|
|
Primer's not prime, until out test factor squared is greater than, or
|
|
equal to the Primer.
|
|
|
|
Arguments:
|
|
|
|
Primer - The number to search (seed)
|
|
|
|
BitMask - How many bits of primer to use in search, controls amount
|
|
of time wasted
|
|
|
|
Return Value:
|
|
|
|
None
|
|
|
|
--*/
|
|
{
|
|
ULONG Index;
|
|
BOOLEAN FoundPrime;
|
|
|
|
Primer |= 0xF;
|
|
BitMask |= 0xF;
|
|
Primer &= BitMask;
|
|
Primer |= (BitMask + 1);
|
|
|
|
FoundPrime = TRUE;
|
|
for (Index = 3; (Index * Index) < Primer; Index += 2) {
|
|
if ((Primer % Index) == 0) {
|
|
FoundPrime = FALSE;
|
|
// Do not break-- we're trying to waste time, remember?
|
|
}
|
|
}
|
|
|
|
//
|
|
// Stuff prime(s) in global so sneaky optimizing compiler
|
|
// doesn't optimize out this B.S.
|
|
//
|
|
if (FoundPrime) {
|
|
HalpFoundPrime = Primer;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
BOOLEAN
|
|
HalpPmTimerSpecialStall(
|
|
IN ULONG Ticks
|
|
)
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
Arguments:
|
|
|
|
Ticks - Number of PM timer ticks to stall
|
|
|
|
Return Value:
|
|
|
|
TRUE if we were able to stall for the correct interval,
|
|
otherwise FALSE
|
|
|
|
--*/
|
|
{
|
|
BOOLEAN TimerWrap;
|
|
LARGE_INTEGER TimerWrapBias;
|
|
LARGE_INTEGER LastRead;
|
|
LARGE_INTEGER InitialTicks;
|
|
LARGE_INTEGER TargetTicks;
|
|
LARGE_INTEGER CurrentTicks;
|
|
ULONG ZeroElapsedTickReads;
|
|
|
|
InitialTicks = HalpPmTimerQueryPerfCount(NULL);
|
|
|
|
//
|
|
// Let's test the rollover action...
|
|
//
|
|
#if 0
|
|
while (InitialTicks.QuadPart < 0xFFF000) {
|
|
|
|
_asm { xor eax, eax
|
|
cpuid }
|
|
|
|
InitialTicks = HalpPmTimerQueryPerfCount(NULL);
|
|
}
|
|
#endif
|
|
|
|
CurrentTicks = InitialTicks;
|
|
LastRead.QuadPart = InitialTicks.QuadPart;
|
|
ZeroElapsedTickReads = 0;
|
|
TimerWrapBias.QuadPart = 0;
|
|
TimerWrap = FALSE;
|
|
|
|
TargetTicks.QuadPart = InitialTicks.QuadPart + Ticks;
|
|
|
|
while (CurrentTicks.QuadPart < TargetTicks.QuadPart) {
|
|
|
|
//
|
|
// Now let's really chew up some cycles and see if we can find
|
|
// some prime numbers while we're at it
|
|
//
|
|
HalpPrimeSearch(CurrentTicks.LowPart, 0x7FFF);
|
|
|
|
CurrentTicks = HalpPmTimerQueryPerfCount(NULL);
|
|
CurrentTicks.QuadPart += TimerWrapBias.QuadPart;
|
|
|
|
//
|
|
// Did the timer wrap, or is it broken?
|
|
//
|
|
if (CurrentTicks.QuadPart < LastRead.QuadPart) {
|
|
|
|
//
|
|
// The timer can wrap once, otherwise something's amiss
|
|
//
|
|
if (!TimerWrap) {
|
|
|
|
TimerWrapBias.QuadPart = (UINT64)(TimerInfo.MsbMask) << 1;
|
|
CurrentTicks.QuadPart += TimerWrapBias.QuadPart;
|
|
TimerWrap = TRUE;
|
|
|
|
//
|
|
// Something is whack, considering our elaborate stall
|
|
// algorithm, this difference is still too significant,
|
|
// maybe it's time to upgrade that 200MHz CPU if you
|
|
// want fast boot!
|
|
//
|
|
if ((CurrentTicks.QuadPart - LastRead.QuadPart) > 0x1000) {
|
|
return FALSE;
|
|
}
|
|
|
|
//
|
|
// We already had one decreasing read, looser!
|
|
//
|
|
} else {
|
|
return FALSE;
|
|
}
|
|
}
|
|
|
|
//
|
|
// Is the timer really ticking? In practice it is virtually
|
|
// impossible to read the timer so quickly that you get the same
|
|
// answer twice, but in theory it should be possible, so to avoid
|
|
// the possibility of getting stuck in this loop for all eternity
|
|
// we will permit this condition to occur one thousand times
|
|
// before we give up
|
|
//
|
|
if (CurrentTicks.QuadPart == LastRead.QuadPart) ZeroElapsedTickReads++;
|
|
if (ZeroElapsedTickReads > 1000) {
|
|
return FALSE;
|
|
}
|
|
|
|
LastRead = CurrentTicks;
|
|
}
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
static BOOLEAN SpecialStallSuccess = TRUE;
|
|
|
|
#define TSC 0x10
|
|
|
|
#if defined (_WIN64)
|
|
|
|
LONGLONG
|
|
ReadCycleCounter (
|
|
VOID
|
|
)
|
|
{
|
|
return ReadTimeStampCounter();
|
|
}
|
|
|
|
#else
|
|
|
|
LONGLONG ReadCycleCounter(VOID) { _asm { rdtsc } }
|
|
|
|
#endif
|
|
|
|
#define TIMER_ROUNDING 10000
|
|
#define __1MHz 1000000
|
|
|
|
|
|
BOOLEAN
|
|
HalpPmTimerScaleTimers(
|
|
VOID
|
|
)
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
Determines the frequency of the APIC timer, this routine is run
|
|
during initialization
|
|
|
|
Arguments:
|
|
|
|
None
|
|
|
|
Return Value:
|
|
|
|
None
|
|
|
|
--*/
|
|
{
|
|
ULONG Flags;
|
|
ULONG ReadBack;
|
|
PHALPCR HalPCR;
|
|
PKPCR pPCR;
|
|
ULONG ApicHz;
|
|
ULONGLONG TscHz;
|
|
ULONG RoundApicHz;
|
|
ULONGLONG RoundTscHz;
|
|
ULONGLONG RoundTscMhz;
|
|
|
|
//
|
|
// If we ever failed before, don't bother wasting any more time
|
|
//
|
|
if (!SpecialStallSuccess) {
|
|
return FALSE;
|
|
}
|
|
|
|
//
|
|
// Don't interrupt us!
|
|
//
|
|
|
|
Flags = HalpDisableInterrupts();
|
|
|
|
pPCR = KeGetPcr();
|
|
HalPCR = (PHALPCR)(KeGetPcr()->HalReserved);
|
|
|
|
//
|
|
// Configure APIC timer
|
|
//
|
|
pLocalApic[LU_TIMER_VECTOR / 4] = INTERRUPT_MASKED |
|
|
PERIODIC_TIMER | APIC_PROFILE_VECTOR;
|
|
pLocalApic[LU_DIVIDER_CONFIG / 4] = LU_DIVIDE_BY_1;
|
|
|
|
//
|
|
// Make sure the write has happened ???
|
|
//
|
|
ReadBack = pLocalApic[LU_DIVIDER_CONFIG / 4];
|
|
|
|
//
|
|
// Zero the perf counter
|
|
//
|
|
HalPCR->PerfCounterLow = 0;
|
|
HalPCR->PerfCounterHigh = 0;
|
|
|
|
//
|
|
// Fence ???
|
|
//
|
|
|
|
PROCESSOR_FENCE;
|
|
|
|
//
|
|
// Reset APIC counter and TSC
|
|
//
|
|
pLocalApic[LU_INITIAL_COUNT / 4] = (ULONG)-1;
|
|
WRMSR(TSC, 0);
|
|
|
|
//
|
|
// Stall for an eigth second
|
|
//
|
|
SpecialStallSuccess = HalpPmTimerSpecialStall(EIGHTH_SECOND_PM_TICKS);
|
|
|
|
if (SpecialStallSuccess) {
|
|
|
|
//
|
|
// Read/compute APIC clock and TSC Frequencies (ticks * 8)
|
|
//
|
|
TscHz = ReadCycleCounter() * 8;
|
|
ApicHz = ((ULONG)-1 - pLocalApic[LU_CURRENT_COUNT / 4]) * 8;
|
|
|
|
//
|
|
// Round APIC frequency
|
|
//
|
|
RoundApicHz = ((ApicHz + (TIMER_ROUNDING / 2)) / TIMER_ROUNDING) *
|
|
TIMER_ROUNDING;
|
|
|
|
HalPCR->ApicClockFreqHz = RoundApicHz;
|
|
|
|
//
|
|
// Round TSC frequency
|
|
//
|
|
RoundTscHz = ((TscHz + (TIMER_ROUNDING / 2)) / TIMER_ROUNDING) *
|
|
TIMER_ROUNDING;
|
|
HalPCR->TSCHz = RoundTscHz;
|
|
|
|
//
|
|
// Convert TSC frequency to MHz
|
|
//
|
|
RoundTscMhz = (RoundTscHz + (__1MHz / 2)) / __1MHz;
|
|
pPCR->StallScaleFactor = (ULONG)RoundTscMhz;
|
|
|
|
HalPCR->ProfileCountDown = RoundApicHz;
|
|
pLocalApic[LU_INITIAL_COUNT / 4] = RoundApicHz;
|
|
}
|
|
|
|
//
|
|
// Restore interrupt state
|
|
//
|
|
|
|
HalpRestoreInterrupts(Flags);
|
|
|
|
return SpecialStallSuccess;
|
|
}
|
|
#endif
|
|
|
|
#if defined(_WIN64)
|
|
|
|
LARGE_INTEGER
|
|
HalpPmTimerQueryPerfCount (
|
|
OUT PLARGE_INTEGER PerformanceFrequency OPTIONAL
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This routine returns current 64-bit performance counter and,
|
|
optionally, the Performance Frequency.
|
|
|
|
N.B. The performace counter returned by this routine is
|
|
not necessary the value when this routine is just entered.
|
|
The value returned is actually the counter value at any point
|
|
between the routine is entered and is exited.
|
|
|
|
Arguments:
|
|
|
|
PerformanceFrequency - optionally, supplies the address
|
|
of a variable to receive the performance counter frequency.
|
|
|
|
Return Value:
|
|
|
|
Current value of the performance counter will be returned.
|
|
|
|
--*/
|
|
|
|
{
|
|
LARGE_INTEGER time;
|
|
LARGE_INTEGER bias;
|
|
|
|
time = ((PQUERY_TIMER)QueryTimer)();
|
|
|
|
bias.HighPart = TimerInfo.BiasHigh;
|
|
bias.LowPart = TimerInfo.BiasLow;
|
|
time.QuadPart += bias.QuadPart;
|
|
|
|
if (ARGUMENT_PRESENT(PerformanceFrequency)) {
|
|
|
|
PerformanceFrequency->LowPart = PMTimerFreq;
|
|
PerformanceFrequency->HighPart = 0;
|
|
}
|
|
|
|
return time;
|
|
}
|
|
|
|
#endif // SPEEDY_BOOT
|
|
|
|
#if !defined(_WIN64)
|
|
|
|
#ifndef NO_PM_KEQPC
|
|
|
|
static ULONG PIT_Ticks = 0xBADCEEDE;
|
|
|
|
VOID
|
|
HalpAcpiTimerPerfCountHack(
|
|
VOID
|
|
)
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
Some cheezy PIC-based laptops seemed to have wired their ACPI timer to
|
|
the wrong frequecy crystal, and their perf counter freq is twice what
|
|
it should be. These systems seem to run fine in every other way
|
|
except for midi file playback, or anything else that goes by KeQuery-
|
|
PerformanceCounter's return frequency value, so we perform a simple
|
|
check late during init to see if this clock is twice what we expect,
|
|
and if it is we return twice the ACPI frequency in KeQuery...
|
|
|
|
Arguments:
|
|
|
|
None
|
|
|
|
Return Value:
|
|
|
|
None
|
|
|
|
--*/
|
|
{
|
|
ULONG T0_Count = 0;
|
|
ULONG T1_Count = 1;
|
|
ULONG Retry = 10;
|
|
|
|
//
|
|
// If we happen to hit the rollover just do it again
|
|
//
|
|
while ((T0_Count < T1_Count) && (Retry--)) {
|
|
T0_Count = HalpQuery8254Counter();
|
|
KeStallExecutionProcessor(1000);
|
|
T1_Count = HalpQuery8254Counter();
|
|
}
|
|
|
|
if (T0_Count < T1_Count) {
|
|
return;
|
|
}
|
|
|
|
//
|
|
// We should have read ~1200 ticks during this interval, so if we
|
|
// recorded between 575 and 725 we can reasonably assume the ACPI
|
|
// Timer is running at 2 * spec
|
|
//
|
|
PIT_Ticks = T0_Count - T1_Count;
|
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if ((PIT_Ticks < 725) && (PIT_Ticks > 575)) {
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PMTimerFreq = 2 * PM_TMR_FREQ;
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|
HalpAdjustUpperBoundTable2X();
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}
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|
}
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#endif // NO_PM_KEQPC
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#endif // _WIN64
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