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803 lines
23 KiB
803 lines
23 KiB
subttl emstore.asm - FST, FSTP, FIST, FISTP instructions
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page
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;*******************************************************************************
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;emstore.asm - FST, FSTP, FIST, FISTP instructions
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;
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; Microsoft Confidential
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;
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; Copyright (c) Microsoft Corporation 1991
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; All Rights Reserved
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;
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;Purpose:
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; FST, FSTP, FIST, FISTP instructions
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;Inputs:
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; edi = [CURstk]
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; dseg:esi = pointer to memory destination
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;
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;Revision History:
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;
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; [] 09/05/91 TP Initial 32-bit version.
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;
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;*******************************************************************************
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;******
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EM_ENTRY eFSTP
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eFSTP:
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;******
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; edi = [CURstk]
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; esi = pointer to st(i) from instruction field
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cmp EMSEG:[edi].bTag,bTAG_EMPTY
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jz short efstp_StackError
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;UNDONE: temporary hack to preserve condition codes
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mov ax,[esp+4].OldStatus
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mov EMSEG:[StatusWord],ax
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;UNDONE: end of hack
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;A common use of this instruction is FSTP st(0) just to pop the stack.
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;We check for this case and optimize it.
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cmp esi,edi
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jz short JustPop
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;Copy the register
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mov eax,EMSEG:[edi].ExpSgn
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mov EMSEG:[esi].ExpSgn,eax
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mov eax,EMSEG:[edi].lManHi
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mov EMSEG:[esi].lManHi,eax
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mov eax,EMSEG:[edi].lManLo
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mov EMSEG:[esi].lManLo,eax
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JustPop:
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POPSTret edi
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efstp_StackError:
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mov EMSEG:[CURerr],Invalid+StackFlag
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ret
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;******
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EM_ENTRY eFST
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eFST:
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;******
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; edi = [CURstk]
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; esi = pointer to st(i) from instruction field
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cmp EMSEG:[edi].bTag,bTAG_EMPTY
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jz StackError ;In emarith.asm
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;Copy the register
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mov eax,EMSEG:[edi].ExpSgn
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mov EMSEG:[esi].ExpSgn,eax
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mov eax,EMSEG:[edi].lManHi
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mov EMSEG:[esi].lManHi,eax
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mov eax,EMSEG:[edi].lManLo
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mov EMSEG:[esi].lManLo,eax
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DontPop:
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ret
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;Come here if the instruction wants to pop the stack
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PopStackChk:
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jc DontPop ;Get unmasked error?
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PopStack:
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mov edi,EMSEG:[CURstk]
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POPSTret edi
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StoreSpcl64:
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cmp cl,bTAG_DEN
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jz Denorm64
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.erre bTAG_NAN lt bTAG_EMPTY
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.erre bTAG_NAN gt bTAG_INF
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cmp cl,bTAG_NAN
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mov ecx,DexpMax shl 16 ;Insert special exponent for NAN/Inf.
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jb StoreIEEE64 ;Go handle infinity
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ja Empty64
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;Have a NAN.
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test ebx,1 shl 30 ;Check for SNAN
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jnz StoreIEEE64 ;Go store QNAN
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or ebx,1 shl 30 ;Make SNAN into a QNAN
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mov EMSEG:[CURerr],Invalid ;Flag the exception
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test EMSEG:[CWmask],Invalid ;Is it masked?
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jnz StoreIEEE64 ;If so, update with masked response
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stc ;Don't pop stack
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ret
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Empty64:
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;It's empty--signal invalid operation
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mov EMSEG:[CURerr],StackFlag+Invalid
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test EMSEG:[CWmask],Invalid ;Is it masked?
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jz DoNothing64 ;No--leave memory unchanged
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;Store Indefinite
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;For FSTP, we go ahead and do the pop even though it's empty
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mov dword ptr dseg:[esi],0
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mov dword ptr dseg:[esi+4],0FFF80000H ;64-bit IEEE indefinite
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ret ;CY clear
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Denorm64:
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mov EMSEG:[CURerr],Denormal
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test EMSEG:[CWmask],Denormal ;Is it masked?
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jnz NormStore64 ;If so, ignore denormalization
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DoNothing64:
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stc ;Don't pop stack
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ret
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;*****************
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;Store Double Real
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;*****************
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EM_ENTRY eFSTP64
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eFSTP64:
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push offset PopStackChk ;Return here after store
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EM_ENTRY eFST64
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eFST64:
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mov EMSEG:[PrevDataOff],esi ;Save operand pointer
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mov ebx,EMSEG:[edi].lManHi
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mov ecx,EMSEG:[edi].ExpSgn
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mov edi,EMSEG:[edi].lManLo
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;mantissa in ebx:edi, exponent in high ecx, sign in ch bit 7, tag in cl
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;memory destination is dseg:esi
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mov al,ch ;Save sign bit
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cmp cl,bTAG_ZERO
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.erre bTAG_VALID lt bTAG_ZERO
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.erre bTAG_SNGL lt bTAG_ZERO
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jz short SignAndStore64 ;Just set sign and exit
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ja StoreSpcl64
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NormStore64:
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;Note that we could have a denormal exception at this point.
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;Thus any additional exceptions must OR into [CURerr], not MOV.
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xor cx,cx
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add ecx,(DexpBias-TexpBias) shl 16 ;Correct bias
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jl short Under64
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cmp ecx,DexpMax shl 16 ;Exponent too big?
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jge Over64
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test edi,(1 shl 11) - 1 ;Any bits to round?
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jz short StoreIEEE64
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Round64:
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or EMSEG:[CURerr],Precision ;Set flag on inexact result
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test EMSEG:[CWcntl],RoundControl ;Check rounding control bits
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.erre RCnear eq 0
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jnz NotNearest64 ;Not just round-to-nearest
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test edi,1 shl 10 ;Check rounding bit
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jz short StoreIEEE64 ;If zero, don't round up
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test edi,(3 shl 10)-1 ;Test LSB and sticky bits
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jnz RoundUp64b
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StoreIEEE64:
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or ecx, ecx ;now that value is rounded,
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je short Under64 ;check exponent for underflow
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StoreIEEE64Continue:
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and ebx,not (1 shl 31) ;Clear MSB--it's implied in IEEE64
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shrd edi,ebx,11
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shr ebx,11 ;Move mantissa down
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shl ecx,4 ;Exponent up to position
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or ebx,ecx ;Combine exponent
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SignAndStore64:
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and al,bSign ;Just sign bit
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shl eax,24 ;Sign to MSB
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or ebx,eax ;Combine sign
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mov dseg:[esi],edi
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mov dseg:[esi+4],ebx
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;CY clear indicate no error
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ret
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SetUnderflow:
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or EMSEG:[CURerr],Underflow ;Unmasked underflow--do nothing
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DoNothing:
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stc ;Indicate nothing was done
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ret
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Under64:
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dec cl ; Is cx == 1?
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jz short StoreIEEE64Continue ; Yes, we've alread been here
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test EMSEG:[CWmask],Underflow ;Is underflow masked?
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jz SetUnderflow ;No, do nothing more
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;Produce masked underflow response
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;Note that the underflow exception does not occur if the number can be
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;represented exactly as a denormal.
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sar ecx,16 ;Bring exponent down
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cmp ecx,DexpMin-52 ;Allow for shift down to rounding bit
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jl BigUnder64 ;Too small, just make it zero
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.erre DexpMin eq 0
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neg ecx ;Use as shift count
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inc ecx ;Shift by at least one
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xor edx,edx ;Place for sticky bits
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cmp cl,32 ;Long shift?
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jb ShortDenorm
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neg edi ;CY set if non-zero
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sbb edx,edx ;-1 if bits shifted off, else zero
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mov edi,ebx
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xor ebx,ebx ;32-bit right shift
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ShortDenorm:
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;Shift count is modulo-32
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shrd edx,edi,cl
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shrd edi,ebx,cl
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shr ebx,cl
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cmp edx,1 ;CY set if zero, else clear
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sbb edx,edx ;Zero if bits shifted off, else -1
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inc edx ;1 if bits shifted off, else zero
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or edi,edx ;Collapse sticky bits into edi
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mov ecx, 1 ;Biased exponent is zero, put 1 into CL (noticed by Under64)
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test edi,(1 shl 11) - 1 ;Any bits to round?
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jz StoreIEEE64 ;If not, no exception
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or EMSEG:[CURerr],Underflow
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jmp Round64
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Over64:
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test EMSEG:[CWmask],Overflow ;Is overflow masked?
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jz SetOverflow ;No, do nothing more
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;Produce masked overflow response
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or EMSEG:[CURerr],Overflow+Precision
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mov ebx,DexpMax shl 20
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xor edi,edi ;ebx:edi = positive infinity
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mov ah,EMSEG:[CWcntl] ;Get rounding control
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;Return max value if RCup bit = 1 and -, or RCdown bit = 1 and +
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;i.e., RCup & sign OR RCdown & not sign
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.erre RCchop eq RCup + RCdown ;Always return max value
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.erre RCnear eq 0 ;Never return max value
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sar al,7 ;Expand sign through whole byte
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.erre (RCdown and bSign) eq 0 ;Don't want to change real sign
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xor al,RCdown ;Flip sign for RCdown bit
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and ah,al ;RCup & sign OR RCdown & not sign
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test ah,RoundControl ;Look only at RC bits
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jz SignAndStore64 ;Return infinity
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dec ebx
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dec edi ;Max value == infinity-1
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jmp SignAndStore64
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SetOverflow:
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or EMSEG:[CURerr],Overflow
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stc ;Indicate nothing was done
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ret
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BigUnder64:
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or EMSEG:[CURerr],Underflow+Precision
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xor ebx,ebx
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mov edi,ebx ;Set it to zero
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mov ecx,ebx ;Including exponent
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NotNearest64:
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;We want to increase the magnitude if RCup and +, or RCdown and -
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mov ah,EMSEG:[CWcntl] ;Get rounding control
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sar al,7 ;Expand sign through whole byte
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.erre (not RCup and RoundControl) eq RCdown
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xor ah,al ;Flip rounding bits if negative
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and ah,RoundControl
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cmp ah,RCup
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jnz StoreIEEE64 ;No, chop it
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RoundUp64b:
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mov EMSEG:[SWcc],RoundUp
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add edi,1 shl 11 ;Round up
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adc ebx,0
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jnc StoreIEEE64
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add ecx,1 shl 16 ;Mantissa overflowed, bump exponent
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cmp ecx,DexpMax shl 16 ;Exponent too big?
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jge Over64
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jmp StoreIEEE64
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;*******************************************************************************
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StoreSpcl32:
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cmp cl,bTAG_DEN
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jz Denorm32
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.erre bTAG_NAN lt bTAG_EMPTY
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.erre bTAG_NAN gt bTAG_INF
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cmp cl,bTAG_NAN
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mov ecx,SexpMax shl 16 ;Insert special exponent
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jb StoreIEEE32
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ja Empty64
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;Have a NAN.
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test ebx,1 shl 30 ;Check for SNAN
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jnz StoreIEEE32 ;Go store QNAN
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or ebx,1 shl 30 ;Make SNAN into a QNAN
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mov EMSEG:[CURerr],Invalid ;Flag the exception
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test EMSEG:[CWmask],Invalid ;Is it masked?
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jnz StoreIEEE32 ;If so, update with masked response
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stc ;Don't pop stack
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ret
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Empty32:
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;It's empty--signal invalid operation
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mov EMSEG:[CURerr],StackFlag+Invalid
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test EMSEG:[CWmask],Invalid ;Is it masked?
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jz DoNothing32 ;No--leave memory unchanged
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;Store Indefinite
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;For FSTP, we go ahead and do the pop even though it's empty
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mov dword ptr dseg:[esi],0FFC00000H ;32-bit IEEE indefinite
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ret ;CY clear
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Denorm32:
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mov EMSEG:[CURerr],Denormal
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test EMSEG:[CWmask],Denormal ;Is it masked?
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jnz NormStore32 ;If so, ignore denormalization
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DoNothing32:
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stc ;Don't pop stack
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ret
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;*****************
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;Store Single Real
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;*****************
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EM_ENTRY eFSTP32
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eFSTP32:
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push offset PopStackChk ;Return here after store
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EM_ENTRY eFST32
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eFST32:
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mov EMSEG:[PrevDataOff],esi ;Save operand pointer
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mov ebx,EMSEG:[edi].lManHi
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mov ecx,EMSEG:[edi].ExpSgn
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mov edi,EMSEG:[edi].lManLo
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;mantissa in ebx:edi, exponent in high ecx, sign in ch bit 7, tag in cl
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;memory destination is dseg:esi
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mov al,ch ;Save sign bit
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cmp cl,bTAG_ZERO
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.erre bTAG_VALID lt bTAG_ZERO
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.erre bTAG_SNGL lt bTAG_ZERO
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jz SignAndStore32 ;Just set sign and exit
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ja StoreSpcl32
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NormStore32:
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;Note that we could have a denormal exception at this point.
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;Thus any additional exceptions must OR into [CURerr], not MOV.
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xor cx,cx
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add ecx,(SexpBias-TexpBias) shl 16 ;Correct bias
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jle Under32
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cmp ecx,SexpMax shl 16 ;Exponent too big?
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jge Over32
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;See if we need to round
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mov edx,ebx ;Get low bits
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and edx,(1 shl 8) - 1 ;Mask to last 8 bits
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or edx,edi ;Throwing away any bits?
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jz StoreIEEE32
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;Result will not be exact--check rounding mode
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Round32:
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or EMSEG:[CURerr],Precision ;Set flag on inexact result
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test EMSEG:[CWcntl],RoundControl ;Check rounding control bits
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.erre RCnear eq 0
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jnz NotNearest32 ;Not just round-to-nearest
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test bl,1 shl 7 ;Round bit set?
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jz StoreIEEE32
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mov edx,ebx
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and edx,(3 shl 7)-1 ;Mask to LSB and sticky bits
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or edx,edi ;Combine with remaining sticky bits
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jz StoreIEEE32
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mov EMSEG:[SWcc],RoundUp
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add ebx,1 shl 8 ;Round up
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jc AddOneExp32
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StoreIEEE32:
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and ebx,not (1 shl 31) ;Clear MSB--it's implied in IEEE32
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shr ebx,8 ;Move mantissa down
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shl ecx,7 ;Exponent up to position
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or ebx,ecx ;Combine exponent
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SignAndStore32:
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and al,bSign ;Just sign bit
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shl eax,24 ;Sign to MSB
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or ebx,eax ;Combine sign
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mov dseg:[esi],ebx
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;CY clear indicate no error
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ret
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Under32:
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test EMSEG:[CWmask],Underflow ;Is underflow masked?
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jz SetUnderflow ;No, do nothing more
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;Produce masked underflow response
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;Note that the underflow exception does not occur if the number can be
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;represented exactly as a denormal.
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sar ecx,16 ;Bring exponent down
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cmp ecx,SexpMin-23 ;Allow for shift down to rounding bit
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jl BigUnder32 ;Too small, just make it zero
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.erre SexpMin eq 0
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neg ecx ;Use as shift count
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inc ecx ;Shift by at least one
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xor edx,edx ;Place for sticky bits
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shrd edx,ebx,cl
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shr ebx,cl
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xor ecx,ecx ;Biased exponent is zero
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or edi,edx ;Combine sticky bits
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mov edx,ebx ;Get low bits
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and edx,(1 shl 8) - 1 ;Mask to last 8 bits
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or edx,edi ;Throwing away any bits?
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jz StoreIEEE32
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or EMSEG:[CURerr],Underflow
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jmp Round32
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AddOneExp32:
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add ecx,1 shl 16 ;Mantissa overflowed, bump exponent
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cmp ecx,SexpMax shl 16 ;Exponent too big?
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jl StoreIEEE32
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Over32:
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test EMSEG:[CWmask],Overflow ;Is overflow masked?
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jz SetOverflow ;No, do nothing more
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;Produce masked overflow response
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or EMSEG:[CURerr],Overflow+Precision
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mov ebx,SexpMax shl 23
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mov ah,EMSEG:[CWcntl] ;Get rounding control
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;Return max value if RCup bit = 1 and -, or RCdown bit = 1 and +
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;i.e., RCup & sign OR RCdown & not sign
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.erre RCchop eq RCup + RCdown ;Always return max value
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.erre RCnear eq 0 ;Never return max value
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sar al,7 ;Expand sign through whole byte
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.erre (RCdown and bSign) eq 0 ;Don't want to change real sign
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xor al,RCdown ;Flip sign for RCdown bit
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and ah,al ;RCup & sign OR RCdown & not sign
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test ah,RoundControl ;Look only at RC bits
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jz SignAndStore32 ;Return infinity
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dec ebx ;Max value == infinity-1
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jmp SignAndStore32
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BigUnder32:
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or EMSEG:[CURerr],Underflow+Precision
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xor ebx,ebx ;Set it to zero
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xor ecx,ecx ;Exponent too
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NotNearest32:
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;We want to increase the magnitude if RCup and +, or RCdown and -
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mov ah,EMSEG:[CWcntl] ;Get rounding control
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sar al,7 ;Expand sign through whole byte
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.erre (not RCup and RoundControl) eq RCdown
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xor ah,al ;Flip rounding bits if negative
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and ah,RoundControl
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cmp ah,RCup
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jnz StoreIEEE32 ;No, chop it
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mov EMSEG:[SWcc],RoundUp
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add ebx,1 shl 8 ;Round up
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jnc StoreIEEE32
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jmp AddOneExp32
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;*******************************************************************************
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StoreSpcl32Int:
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cmp cl,bTAG_DEN
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jz NormStore32Int ;Ignore denormal
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cmp cl,bTAG_EMPTY
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jnz Over32Int ;All other specials are invalid
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mov EMSEG:[CURerr],StackFlag+Invalid
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jmp Invalid32Int
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DoNothing32Int:
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stc ;Don't pop stack
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ret
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CheckMax32:
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ja Over32Int
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test al,bSign ;Is it negative?
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jnz Store32Int ;If so, answer is OK
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Over32Int:
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;Overflow on integer store is invalid according to IEEE
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mov EMSEG:[CURerr],Invalid ;Must remove precision exception
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Invalid32Int:
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test EMSEG:[CWmask],Invalid ;Is it masked?
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jz DoNothing32Int ;No--leave memory unchanged
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;Store Indefinite
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;For FSTP, we go ahead and do the pop even though it's empty
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mov dword ptr dseg:[esi],80000000H ;32-bit integer indefinite
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ret ;CY clear
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;******************
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;Store Long Integer
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;******************
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EM_ENTRY eFISTP32
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eFISTP32:
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push offset PopStackChk ;Return here after store
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EM_ENTRY eFIST32
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eFIST32:
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mov EMSEG:[PrevDataOff],esi ;Save operand pointer
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mov ebx,EMSEG:[edi].lManHi
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mov ecx,EMSEG:[edi].ExpSgn
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mov edi,EMSEG:[edi].lManLo
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;mantissa in ebx:edi, exponent in high ecx, sign in ch bit 7, tag in cl
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;memory destination is dseg:esi
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|
mov al,ch ;Save sign bit
|
|
cmp cl,bTAG_ZERO
|
|
.erre bTAG_VALID lt bTAG_ZERO
|
|
.erre bTAG_SNGL lt bTAG_ZERO
|
|
jz Store32Int ;Just store zero and exit
|
|
ja StoreSpcl32Int
|
|
NormStore32Int:
|
|
xor edx,edx
|
|
sar ecx,16 ;Bring exponent down
|
|
cmp ecx,-1 ;Is it less than 1?
|
|
jle Under32Int
|
|
cmp ecx,31
|
|
jg Over32Int
|
|
sub ecx,31
|
|
neg ecx ;cl = amount to shift right
|
|
shrd edx,edi,cl
|
|
shrd edi,ebx,cl ;Collect round and sticky bits
|
|
shr ebx,cl ;Align integer
|
|
;See if we need to round
|
|
mov ecx,edi
|
|
or ecx,edx ;Throwing away any bits?
|
|
jz StoreIEEE32Int
|
|
;Result will not be exact--check rounding mode
|
|
Round32Int:
|
|
mov EMSEG:[CURerr],Precision ;Set flag on inexact result
|
|
test EMSEG:[CWcntl],RoundControl ;Check rounding control bits
|
|
.erre RCnear eq 0
|
|
jnz NotNearest32Int ;Not just round-to-nearest
|
|
|
|
;To perform "round even" when the round bit is set and the sticky bits
|
|
;are zero, we treat the LSB as if it were a sticky bit. Thus if the LSB
|
|
;is set, that will always force a round up (to even) if the round bit is
|
|
;set. If the LSB is zero, then the sticky bits remain zero and we always
|
|
;round down.
|
|
|
|
bt ebx,0 ;Look at LSB (for round even)
|
|
adc edx,-1 ;CY set if sticky bits <>0
|
|
adc edi,(1 shl 31)-1 ;CY set if round up
|
|
jnc StoreIEEE32Int
|
|
mov EMSEG:[SWcc],RoundUp
|
|
inc ebx
|
|
jz Over32Int
|
|
StoreIEEE32Int:
|
|
cmp ebx,1 shl 31 ;Check for max value
|
|
jae CheckMax32
|
|
SignAndStore32Int:
|
|
shl eax,24 ;Sign to MSB
|
|
cdq ;Extend sign through edx
|
|
xor ebx,edx ;Complement
|
|
sub ebx,edx ; and increment if negative
|
|
clc
|
|
Store32Int:
|
|
mov dseg:[esi],ebx
|
|
;CY clear indicates no error
|
|
ret
|
|
|
|
Under32Int:
|
|
;ZF set if exponent is -1
|
|
xchg edx,edi ;32-bit right shift
|
|
xchg edi,ebx ;ebx = 0 now
|
|
jz Round32Int ;If exponent was -1, ready to round
|
|
mov EMSEG:[CURerr],Precision ;Set flag on inexact result
|
|
NotNearest32Int:
|
|
;We want to increase the magnitude if RCup and +, or RCdown and -
|
|
mov ah,EMSEG:[CWcntl] ;Get rounding control
|
|
sar al,7 ;Expand sign through whole byte
|
|
.erre (not RCup and RoundControl) eq RCdown
|
|
xor ah,al ;Flip rounding bits if negative
|
|
and ah,RoundControl
|
|
cmp ah,RCup ;Rounding up?
|
|
jnz StoreIEEE32Int ;No, chop it
|
|
mov EMSEG:[SWcc],RoundUp
|
|
inc ebx
|
|
jnc StoreIEEE32Int
|
|
jmp Over32Int
|
|
|
|
;*******************************************************************************
|
|
|
|
StoreSpcl16Int:
|
|
cmp cl,bTAG_DEN
|
|
jz NormStore16Int ;Ignore denormal
|
|
cmp cl,bTAG_EMPTY
|
|
jnz Over16Int ;All other specials are invalid
|
|
mov EMSEG:[CURerr],StackFlag+Invalid
|
|
jmp Invalid16Int
|
|
|
|
DoNothing16Int:
|
|
stc ;Don't pop stack
|
|
ret
|
|
|
|
CheckMax16:
|
|
ja Over16Int
|
|
test al,bSign ;Is it negative?
|
|
jnz Store16Int ;If so, answer is OK
|
|
Over16Int:
|
|
;Overflow on integer store is invalid according to IEEE
|
|
mov EMSEG:[CURerr],Invalid
|
|
Invalid16Int:
|
|
test EMSEG:[CWmask],Invalid ;Is it masked?
|
|
jz DoNothing16Int ;No--leave memory unchanged
|
|
;Store Indefinite
|
|
;For FSTP, we go ahead and do the pop even though it's empty
|
|
mov word ptr dseg:[esi],8000H ;16-bit integer indefinite
|
|
ret ;CY clear
|
|
|
|
;*******************
|
|
;Store Short Integer
|
|
;*******************
|
|
|
|
EM_ENTRY eFISTP16
|
|
eFISTP16:
|
|
push offset PopStackChk ;Return here after store
|
|
|
|
EM_ENTRY eFIST16
|
|
eFIST16:
|
|
mov EMSEG:[PrevDataOff],esi ;Save operand pointer
|
|
mov ebx,EMSEG:[edi].lManHi
|
|
mov ecx,EMSEG:[edi].ExpSgn
|
|
mov edi,EMSEG:[edi].lManLo
|
|
;mantissa in ebx:edi, exponent in high ecx, sign in ch bit 7, tag in cl
|
|
;memory destination is dseg:esi
|
|
mov al,ch ;Save sign bit
|
|
cmp cl,bTAG_ZERO
|
|
.erre bTAG_VALID lt bTAG_ZERO
|
|
.erre bTAG_SNGL lt bTAG_ZERO
|
|
jz Store16Int ;Just store zero and exit
|
|
ja StoreSpcl16Int
|
|
NormStore16Int:
|
|
xor edx,edx
|
|
sar ecx,16 ;Bring exponent down
|
|
cmp ecx,-1 ;Is it less than 1?
|
|
jle Under16Int
|
|
cmp ecx,15
|
|
jg Over16Int
|
|
sub ecx,31
|
|
neg ecx ;cl = amount to shift right
|
|
shrd edx,edi,cl
|
|
shrd edi,ebx,cl ;Collect round and sticky bits
|
|
shr ebx,cl ;Align integer
|
|
;See if we need to round
|
|
mov ecx,edi
|
|
or ecx,edx ;Throwing away any bits?
|
|
jz StoreIEEE16Int
|
|
;Result will not be exact--check rounding mode
|
|
Round16Int:
|
|
mov EMSEG:[CURerr],Precision ;Set flag on inexact result
|
|
test EMSEG:[CWcntl],RoundControl ;Check rounding control bits
|
|
.erre RCnear eq 0
|
|
jnz NotNearest16Int ;Not just round-to-nearest
|
|
|
|
;To perform "round even" when the round bit is set and the sticky bits
|
|
;are zero, we treat the LSB as if it were a sticky bit. Thus if the LSB
|
|
;is set, that will always force a round up (to even) if the round bit is
|
|
;set. If the LSB is zero, then the sticky bits remain zero and we always
|
|
;round down.
|
|
|
|
bt ebx,0 ;Look at LSB (for round even)
|
|
adc edx,-1 ;CY set if sticky bits <>0
|
|
adc edi,(1 shl 31)-1 ;CY set if round up
|
|
jnc StoreIEEE16Int
|
|
mov EMSEG:[SWcc],RoundUp
|
|
inc ebx
|
|
StoreIEEE16Int:
|
|
cmp ebx,1 shl 15 ;Check for max value
|
|
jae CheckMax16
|
|
SignAndStore16Int:
|
|
shl eax,24 ;Sign to MSB
|
|
cdq ;Extend sign through edx
|
|
xor ebx,edx ;Complement
|
|
sub ebx,edx ; and increment if negative
|
|
clc
|
|
Store16Int:
|
|
mov dseg:[esi],bx
|
|
;CY clear indicates no error
|
|
ret
|
|
|
|
Under16Int:
|
|
;ZF set if exponent is -1
|
|
xchg edx,edi ;16-bit right shift
|
|
xchg edi,ebx ;ebx = 0 now
|
|
jz Round16Int ;If exponent was -1, ready to round
|
|
mov EMSEG:[CURerr],Precision ;Set flag on inexact result
|
|
NotNearest16Int:
|
|
;We want to increase the magnitude if RCup and +, or RCdown and -
|
|
mov ah,EMSEG:[CWcntl] ;Get rounding control
|
|
sar al,7 ;Expand sign through whole byte
|
|
.erre (not RCup and RoundControl) eq RCdown
|
|
xor ah,al ;Flip rounding bits if negative
|
|
and ah,RoundControl
|
|
cmp ah,RCup ;Rounding up?
|
|
jnz StoreIEEE16Int ;No, chop it
|
|
mov EMSEG:[SWcc],RoundUp
|
|
inc ebx
|
|
jnc StoreIEEE16Int
|
|
jmp Over16Int
|
|
|
|
;*******************************************************************************
|
|
|
|
;******************
|
|
;Store Quad Integer
|
|
;******************
|
|
|
|
EM_ENTRY eFISTP64
|
|
eFISTP64:
|
|
mov EMSEG:[PrevDataOff],esi ;Save operand pointer
|
|
call RoundToInteger
|
|
jc Invalid64Int
|
|
;Have integer in ebx:edi
|
|
;Sign in ch
|
|
cmp ebx,1 shl 31 ;Check for max value
|
|
jae CheckMax64
|
|
or ch,ch ;Check sign
|
|
jns Store64Int
|
|
;64-bit negation
|
|
not ebx
|
|
neg edi
|
|
sbb ebx,-1
|
|
Store64Int:
|
|
mov dseg:[esi],edi
|
|
mov dseg:[esi+4],ebx
|
|
jmp PopStack
|
|
|
|
CheckMax64:
|
|
ja Over64Int
|
|
test al,bSign ;Is it negative?
|
|
jnz Store64Int ;If so, answer is OK
|
|
Over64Int:
|
|
;Overflow on integer store is invalid according to IEEE
|
|
mov EMSEG:[CURerr],Invalid
|
|
Invalid64Int:
|
|
test EMSEG:[CWmask],Invalid ;Is it masked?
|
|
jz DoNothing80 ;No--leave memory unchanged
|
|
;Store Indefinite
|
|
;For FSTP, we go ahead and do the pop even though it's empty
|
|
mov dword ptr dseg:[esi],0
|
|
mov dword ptr dseg:[esi+4],80000000H ;64-bit integer indefinite
|
|
jmp PopStack
|
|
|
|
;*******************************************************************************
|
|
|
|
Empty80:
|
|
;It's empty--signal invalid operation
|
|
mov EMSEG:[CURerr],StackFlag+Invalid
|
|
test EMSEG:[CWmask],Invalid ;Is it masked?
|
|
jz DoNothing80 ;No--leave memory unchanged
|
|
;Store Indefinite
|
|
;For FSTP, we go ahead and do the pop even though it's empty
|
|
mov dword ptr dseg:[esi],0
|
|
mov dword ptr dseg:[esi+4],0C0000000H
|
|
mov word ptr dseg:[esi+8],0FFFFH ;80-bit IEEE indefinite
|
|
jmp PopStack
|
|
|
|
DoNothing80:
|
|
ret
|
|
|
|
;***************
|
|
;Store Temp Real
|
|
;***************
|
|
|
|
EM_ENTRY eFSTP80
|
|
eFSTP80:
|
|
mov EMSEG:[PrevDataOff],esi ;Save operand pointer
|
|
mov eax,EMSEG:[edi].ExpSgn
|
|
cmp al,bTAG_EMPTY
|
|
jz Empty80
|
|
|
|
push offset PopStack
|
|
|
|
StoreTempReal:
|
|
mov ebx,EMSEG:[edi].lManHi
|
|
mov edi,EMSEG:[edi].lManLo
|
|
;mantissa in ebx:edi, exponent in high eax, sign in ah bit 7, tag in al
|
|
;memory destination is dseg:esi
|
|
mov ecx,eax ;get copy of sign and tag
|
|
shr ecx,16 ;Bring exponent down
|
|
cmp al,bTAG_ZERO
|
|
jz StoreIEEE80 ;Skip bias if zero
|
|
add ecx,IexpBias-TexpBias ;Correct bias
|
|
cmp al,bTAG_DEN
|
|
jz Denorm80
|
|
StoreIEEE80:
|
|
and eax,bSign shl 8
|
|
or ecx,eax ;Combine sign with exponent
|
|
mov dseg:[esi],edi
|
|
mov dseg:[esi+4],ebx
|
|
mov dseg:[esi+8],cx
|
|
|
|
; jmp PopStack
|
|
ret
|
|
|
|
Denorm80:
|
|
;Must change it to a denormal
|
|
dec ecx
|
|
neg ecx ;Use as shift count
|
|
cmp cl,32 ;Long shift?
|
|
jae LongDenorm
|
|
shrd edi,ebx,cl
|
|
shr ebx,cl
|
|
xor ecx,ecx ;Exponent is zero
|
|
jmp StoreIEEE80
|
|
|
|
LongDenorm:
|
|
;edi must be zero if we have 32 bits to shift
|
|
xchg ebx,edi ;32-bit right shift
|
|
shr edi,cl ;shift count is modulo-32
|
|
xor ecx,ecx ;Exponent is zero
|
|
jmp StoreIEEE80
|