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274 lines
8.1 KiB
274 lines
8.1 KiB
/*++
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Copyright (c) 1990-1997 Microsoft Corporation
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Module Name:
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vga.h
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Author:
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Erick Smith (ericks) Oct. 1997
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Environment:
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kernel mode only
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Revision History:
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--*/
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//
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// VGA register definitions
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//
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// ports in monochrome mode
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#define CRTC_ADDRESS_PORT_MONO 0x03b4 // CRT Controller Address and
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#define CRTC_DATA_PORT_MONO 0x03b5 // Data registers in mono mode
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#define FEAT_CTRL_WRITE_PORT_MONO 0x03bA // Feature Control write port
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// in mono mode
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#define INPUT_STATUS_1_MONO 0x03bA // Input Status 1 register read
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// port in mono mode
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#define ATT_INITIALIZE_PORT_MONO INPUT_STATUS_1_MONO
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// Register to read to reset
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// Attribute Controller index/data
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#define ATT_ADDRESS_PORT 0x03c0 // Attribute Controller Address and
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#define ATT_DATA_WRITE_PORT 0x03c0 // Data registers share one port
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// for writes, but only Address is
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// readable at 0x3C0
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#define ATT_DATA_READ_PORT 0x03c1 // Attribute Controller Data reg is
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// readable here
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#define MISC_OUTPUT_REG_WRITE_PORT 0x03c2 // Miscellaneous Output reg write
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// port
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#define INPUT_STATUS_0_PORT 0x03c2 // Input Status 0 register read
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// port
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#define VIDEO_SUBSYSTEM_ENABLE_PORT 0x03c3 // Bit 0 enables/disables the
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// entire VGA subsystem
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#define SEQ_ADDRESS_PORT 0x03c4 // Sequence Controller Address and
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#define SEQ_DATA_PORT 0x03c5 // Data registers
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#define DAC_PIXEL_MASK_PORT 0x03c6 // DAC pixel mask reg
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#define DAC_ADDRESS_READ_PORT 0x03c7 // DAC register read index reg,
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// write-only
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#define DAC_STATE_PORT 0x03c7 // DAC state (read/write),
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// read-only
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#define DAC_ADDRESS_WRITE_PORT 0x03c8 // DAC register write index reg
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#define DAC_DATA_REG_PORT 0x03c9 // DAC data transfer reg
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#define FEAT_CTRL_READ_PORT 0x03cA // Feature Control read port
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#define MISC_OUTPUT_REG_READ_PORT 0x03cC // Miscellaneous Output reg read
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// port
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#define GRAPH_ADDRESS_PORT 0x03cE // Graphics Controller Address
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#define GRAPH_DATA_PORT 0x03cF // and Data registers
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#define CRTC_ADDRESS_PORT_COLOR 0x03d4 // CRT Controller Address and
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#define CRTC_DATA_PORT_COLOR 0x03d5 // Data registers in color mode
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#define FEAT_CTRL_WRITE_PORT_COLOR 0x03dA // Feature Control write port
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#define INPUT_STATUS_1_COLOR 0x03dA // Input Status 1 register read
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// port in color mode
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#define ATT_INITIALIZE_PORT_COLOR INPUT_STATUS_1_COLOR
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// Register to read to reset
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// Attribute Controller index/data
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// toggle in color mode
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//
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// VGA indexed register indexes.
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//
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#define IND_CURSOR_START 0x0A // index in CRTC of the Cursor Start
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#define IND_CURSOR_END 0x0B // and End registers
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#define IND_CURSOR_HIGH_LOC 0x0E // index in CRTC of the Cursor Location
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#define IND_CURSOR_LOW_LOC 0x0F // High and Low Registers
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#define IND_VSYNC_END 0x11 // index in CRTC of the Vertical Sync
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// End register, which has the bit
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// that protects/unprotects CRTC
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// index registers 0-7
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#define IND_SET_RESET_ENABLE 0x01 // index of Set/Reset Enable reg in GC
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#define IND_DATA_ROTATE 0x03 // index of Data Rotate reg in GC
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#define IND_READ_MAP 0x04 // index of Read Map reg in Graph Ctlr
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#define IND_GRAPH_MODE 0x05 // index of Mode reg in Graph Ctlr
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#define IND_GRAPH_MISC 0x06 // index of Misc reg in Graph Ctlr
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#define IND_BIT_MASK 0x08 // index of Bit Mask reg in Graph Ctlr
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#define IND_SYNC_RESET 0x00 // index of Sync Reset reg in Seq
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#define IND_MAP_MASK 0x02 // index of Map Mask in Sequencer
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#define IND_MEMORY_MODE 0x04 // index of Memory Mode reg in Seq
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#define IND_CRTC_PROTECT 0x11 // index of reg containing regs 0-7 in
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// CRTC
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#define START_SYNC_RESET_VALUE 0x01 // value for Sync Reset reg to start
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// synchronous reset
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#define END_SYNC_RESET_VALUE 0x03 // value for Sync Reset reg to end
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// synchronous reset
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//
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// Values for Attribute Controller Index register to turn video off
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// and on, by setting bit 5 to 0 (off) or 1 (on).
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//
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#define VIDEO_DISABLE 0
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#define VIDEO_ENABLE 0x20
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#define VGA_NUM_SEQUENCER_PORTS 5
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#define VGA_NUM_CRTC_PORTS 25
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#define VGA_NUM_GRAPH_CONT_PORTS 9
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#define VGA_NUM_ATTRIB_CONT_PORTS 21
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#define VGA_NUM_DAC_ENTRIES 256
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//
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// Value written to the Read Map register when identifying the existence of
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// a VGA in VgaInitialize. This value must be different from the final test
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// value written to the Bit Mask in that routine.
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//
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#define READ_MAP_TEST_SETTING 0x03
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//
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// Masks to keep only the significant bits of the Graphics Controller and
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// Sequencer Address registers. Masking is necessary because some VGAs, such
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// as S3-based ones, don't return unused bits set to 0, and some SVGAs use
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// these bits if extensions are enabled.
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//
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#define GRAPH_ADDR_MASK 0x0F
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#define SEQ_ADDR_MASK 0x07
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//
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// Mask used to toggle Chain4 bit in the Sequencer's Memory Mode register.
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//
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#define CHAIN4_MASK 0x08
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//
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// Default text mode setting for various registers, used to restore their
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// states if VGA detection fails after they've been modified.
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//
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#define MEMORY_MODE_TEXT_DEFAULT 0x02
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#define BIT_MASK_DEFAULT 0xFF
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#define READ_MAP_DEFAULT 0x00
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//
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// prototypes
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//
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BOOLEAN
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VgaInterpretCmdStream(
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PUSHORT pusCmdStream
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);
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BOOLEAN
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VgaIsPresent(
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VOID
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);
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#define BI_RLE4 2
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#pragma pack(1)
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typedef struct _BITMAPFILEHEADER {
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USHORT bfType;
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ULONG bfSize;
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USHORT bfReserved1;
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USHORT bfReserved2;
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ULONG bfOffBits;
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} BITMAPFILEHEADER, *PBITMAPFILEHEADER;
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typedef struct _BITMAPINFOHEADER {
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ULONG biSize;
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LONG biWidth;
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LONG biHeight;
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USHORT biPlanes;
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USHORT biBitCount;
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ULONG biCompression;
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ULONG biSizeImage;
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LONG biXPelsPerMeter;
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LONG biYPelsPerMeter;
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ULONG biClrUsed;
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ULONG biClrImportant;
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} BITMAPINFOHEADER, *PBITMAPINFOHEADER;
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typedef struct _RGBQUAD {
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UCHAR rgbBlue;
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UCHAR rgbGreen;
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UCHAR rgbRed;
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UCHAR rgbReserved;
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} RGBQUAD, *PRGBQUAD;
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#pragma pack()
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VOID
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SetPixel(
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ULONG x,
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ULONG y,
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ULONG color
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);
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VOID
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DisplayCharacter(
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UCHAR c,
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ULONG x,
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ULONG y,
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ULONG fore_color,
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ULONG back_color
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);
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VOID
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DisplayStringXY(
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PUCHAR s,
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ULONG x,
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ULONG y,
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ULONG fore_color,
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ULONG back_color
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);
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VOID
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BitBlt(
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ULONG x,
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ULONG y,
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ULONG width,
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ULONG height,
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PUCHAR Buffer,
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ULONG bpp,
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LONG ScanWidth
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);
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VOID
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VgaScroll(
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ULONG CharHeight
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);
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VOID
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PreserveRow(
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ULONG y,
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ULONG CharHeight,
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BOOLEAN bRestore
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);
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VOID
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SetPaletteEntry(
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ULONG index,
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ULONG RGB
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);
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VOID
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SetPaletteEntryRGB(
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ULONG index,
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RGBQUAD rgb
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);
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VOID
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InitPaletteWithTable(
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PRGBQUAD Palette,
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ULONG count
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);
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VOID
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InitializePalette(
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VOID
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);
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VOID
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WaitForVsync(
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VOID
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);
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