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185 lines
6.0 KiB
185 lines
6.0 KiB
/*++
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Copyright (C) Microsoft Corporation, 1999 - 1999
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Module Name:
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ideuser.h
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Abstract:
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These are the structures and defines that are used in the
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PCI IDE mini drivers.
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Revision History:
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--*/
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#if !defined (___ideuser_h___)
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#define ___ideuser_h___
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//@@BEGIN_DDKSPLIT
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typedef enum {
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DeviceUnknown = 0,
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DeviceIsAta,
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DeviceIsAtapi,
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DeviceNotExist
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} IDE_DEVICETYPE;
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typedef enum {
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DdlPioOnly = 0,
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DdlFirmwareOk,
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DdlAlways
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} DMADETECTIONLEVEL;
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#define DMA_DETECTION_LEVEL_REG_KEY L"DmaDetectionLevel"
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#define PCMCIA_IDE_CONTROLLER_HAS_SLAVE L"PcmciaIdeHasSlaveDevice"
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#define MASTER_DEVICE_TIMEOUT L"MasterDeviceDetectionTimeout"
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#define SLAVE_DEVICE_TIMEOUT L"SlaveDeviceDetectionTimeout"
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#define MASTER_DEVICE_TYPE_REG_KEY L"MasterDeviceType"
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#define SLAVE_DEVICE_TYPE_REG_KEY L"SlaveDeviceType"
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#define MASTER_DEVICE_TYPE2_REG_KEY L"MasterDeviceType2"
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#define SLAVE_DEVICE_TYPE2_REG_KEY L"SlaveDeviceType2"
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#define USER_MASTER_DEVICE_TYPE_REG_KEY L"UserMasterDeviceType"
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#define USER_SLAVE_DEVICE_TYPE_REG_KEY L"UserSlaveDeviceType"
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#define USER_MASTER_DEVICE_TYPE2_REG_KEY L"UserMasterDeviceType2"
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#define USER_SLAVE_DEVICE_TYPE2_REG_KEY L"UserSlaveDeviceType2"
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#define MASTER_DEVICE_TIMING_MODE L"MasterDeviceTimingMode"
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#define SLAVE_DEVICE_TIMING_MODE L"SlaveDeviceTimingMode"
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#define MASTER_DEVICE_TIMING_MODE2 L"MasterDeviceTimingMode2"
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#define SLAVE_DEVICE_TIMING_MODE2 L"SlaveDeviceTimingMode2"
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#define MASTER_DEVICE_TIMING_MODE_ALLOWED L"MasterDeviceTimingModeAllowed"
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#define SLAVE_DEVICE_TIMING_MODE_ALLOWED L"SlaveDeviceTimingModeAllowed"
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#define MASTER_DEVICE_TIMING_MODE_ALLOWED2 L"MasterDeviceTimingModeAllowed2"
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#define SLAVE_DEVICE_TIMING_MODE_ALLOWED2 L"SlaveDeviceTimingModeAllowed2"
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#define USER_MASTER_DEVICE_TIMING_MODE_ALLOWED L"UserMasterDeviceTimingModeAllowed"
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#define USER_SLAVE_DEVICE_TIMING_MODE_ALLOWED L"UserSlaveDeviceTimingModeAllowed"
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#define USER_MASTER_DEVICE_TIMING_MODE_ALLOWED2 L"UserMasterDeviceTimingModeAllowed2"
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#define USER_SLAVE_DEVICE_TIMING_MODE_ALLOWED2 L"UserSlaveDeviceTimingModeAllowed2"
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#define MASTER_IDDATA_CHECKSUM L"MasterIdDataCheckSum"
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#define SLAVE_IDDATA_CHECKSUM L"SlaveIdDataCheckSum"
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#define MASTER_IDDATA_CHECKSUM2 L"MasterIdDataCheckSum2"
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#define SLAVE_IDDATA_CHECKSUM2 L"SlaveIdDataCheckSum2"
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//@@END_DDKSPLIT
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#define PIO_MODE0 (1 << 0)
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#define PIO_MODE1 (1 << 1)
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#define PIO_MODE2 (1 << 2)
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#define PIO_MODE3 (1 << 3)
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#define PIO_MODE4 (1 << 4)
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#define SWDMA_MODE0 (1 << 5)
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#define SWDMA_MODE1 (1 << 6)
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#define SWDMA_MODE2 (1 << 7)
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#define MWDMA_MODE0 (1 << 8)
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#define MWDMA_MODE1 (1 << 9)
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#define MWDMA_MODE2 (1 << 10)
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#define UDMA_MODE0 (1 << 11)
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#define UDMA_MODE1 (1 << 12)
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#define UDMA_MODE2 (1 << 13)
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#define UDMA_MODE3 (1 << 14)
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#define UDMA_MODE4 (1 << 15)
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#define UDMA_MODE5 (1 << 16)
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#define PIO_SUPPORT (PIO_MODE0 | PIO_MODE1 | PIO_MODE2 | PIO_MODE3 | PIO_MODE4)
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#define SWDMA_SUPPORT (SWDMA_MODE0 | SWDMA_MODE1 | SWDMA_MODE2)
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#define MWDMA_SUPPORT (MWDMA_MODE0 | MWDMA_MODE1 | MWDMA_MODE2)
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#define UDMA33_SUPPORT (UDMA_MODE0 | UDMA_MODE1 | UDMA_MODE2)
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#define UDMA66_SUPPORT (UDMA_MODE3 | UDMA_MODE4)
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#define UDMA100_SUPPORT (UDMA_MODE5 )
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#define UDMA_SUPPORT (UNINITIALIZED_TRANSFER_MODE & (~(PIO_SUPPORT | SWDMA_SUPPORT | MWDMA_SUPPORT)))
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#define DMA_SUPPORT (SWDMA_SUPPORT | MWDMA_SUPPORT | UDMA_SUPPORT)
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#define ALL_MODE_SUPPORT (PIO_SUPPORT | DMA_SUPPORT)
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#define PIO0 0
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#define PIO1 1
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#define PIO2 2
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#define PIO3 3
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#define PIO4 4
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#define SWDMA0 5
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#define SWDMA1 6
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#define SWDMA2 7
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#define MWDMA0 8
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#define MWDMA1 9
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#define MWDMA2 10
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#define UDMA0 11
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#define MAX_XFER_MODE 18
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#define UNINITIALIZED_CYCLE_TIME 0xffffffff
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#define UNINITIALIZED_TRANSFER_MODE 0x7fffffff
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#define IS_DEFAULT(mode) (!(mode & 0x80000000))
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#define GenTransferModeMask(i, mode) {\
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ULONG temp=0xffffffff; \
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mode |= (temp >> (31-(i)));\
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}
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//
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// mode should not be 0
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//
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#define GetHighestTransferMode(mode, i) {\
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ULONG temp=(mode); \
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ASSERT(temp); \
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i=0; \
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while ( temp) { \
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temp = (temp >> 1);\
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i++;\
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} \
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i--; \
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}
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#define GetHighestDMATransferMode(mode, i) {\
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ULONG temp=mode >> 5;\
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i=5; \
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while ( temp) { \
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temp = (temp >> 1); \
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i++; \
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} \
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i--; \
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}
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#define GetHighestPIOTransferMode(mode, i) { \
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ULONG temp = (mode & PIO_SUPPORT); \
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i=0; \
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temp = temp >> 1; \
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while (temp) { \
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temp = temp >> 1; \
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i++; \
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} \
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}
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#define SetDefaultTiming(timingTable, length) {\
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timingTable[0]=PIO_MODE0_CYCLE_TIME; \
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timingTable[1]=PIO_MODE1_CYCLE_TIME; \
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timingTable[2]=PIO_MODE2_CYCLE_TIME; \
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timingTable[3]=PIO_MODE3_CYCLE_TIME; \
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timingTable[4]=PIO_MODE4_CYCLE_TIME; \
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timingTable[5]=SWDMA_MODE0_CYCLE_TIME; \
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timingTable[6]=SWDMA_MODE1_CYCLE_TIME; \
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timingTable[7]=SWDMA_MODE2_CYCLE_TIME; \
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timingTable[8]=MWDMA_MODE0_CYCLE_TIME; \
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timingTable[9]=MWDMA_MODE1_CYCLE_TIME; \
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timingTable[10]=MWDMA_MODE2_CYCLE_TIME; \
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timingTable[11]=UDMA_MODE0_CYCLE_TIME; \
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timingTable[12]=UDMA_MODE1_CYCLE_TIME; \
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timingTable[13]=UDMA_MODE2_CYCLE_TIME; \
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timingTable[14]=UDMA_MODE3_CYCLE_TIME; \
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timingTable[15]=UDMA_MODE4_CYCLE_TIME; \
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timingTable[16]=UDMA_MODE5_CYCLE_TIME; \
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timingTable[17]=UDMA_MODE6_CYCLE_TIME; \
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length = MAX_XFER_MODE; \
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}
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#endif // ___ideuser_h___
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