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208 lines
6.6 KiB
208 lines
6.6 KiB
/* *************************************************************************
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** INTEL Corporation Proprietary Information
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**
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** This listing is supplied under the terms of a license
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** agreement with INTEL Corporation and may not be copied
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** nor disclosed except in accordance with the terms of
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** that agreement.
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**
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** Copyright (c) 1995, 1996 Intel Corporation.
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** All Rights Reserved.
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**
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** *************************************************************************
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*/
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// $Author: AKASAI $
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// $Date: 15 Mar 1996 08:48:06 $
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// $Archive: S:\h26x\src\dec\d1blkcpy.cpv $
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// $Header: S:\h26x\src\dec\d1blkcpy.cpv 1.0 15 Mar 1996 08:48:06 AKASAI $
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// $Log: S:\h26x\src\dec\d1blkcpy.cpv $
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//
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// Rev 1.0 15 Mar 1996 08:48:06 AKASAI
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// Initial revision.
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//
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// Rev 1.3 31 Jan 1996 13:15:14 RMCKENZX
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// Rewrote file to avoid bank conflicts. Fully unrolled the loop.
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// Module now really will execute in 52 cycles if the cache is hot.
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//
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// Rev 1.2 22 Dec 1995 13:51:06 KMILLS
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// added new copyright notice
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//
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// Rev 1.1 25 Sep 1995 09:03:22 CZHU
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// Added comments on cycle counts
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//
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// Rev 1.0 11 Sep 1995 16:52:26 CZHU
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// Initial revision.
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//
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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// BlockCopy reads reference in BYTES and writes DWORDS. Read of BYTES
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// is to avoid data alignment problems from motion compensated previous.
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//
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// Input U8 *reference (Motion Compensated address of reference)
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// Output U8 *output (Output buffer)
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//
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// Registers used:
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// eax source address
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// ebx temp
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// ecx, edx accumulators
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// edi destination address
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// esi PITCH
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//
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// Assumption: reference and output use PITCH
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//
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// Cycle count:
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//
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//------------------------------------------------------------------------------
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#include "precomp.h"
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#pragma code_seg("IACODE2")
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__declspec(naked)
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void BlockCopy (U32 uDstBlock, U32 uSrcBlock)
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{
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__asm {
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mov eax, [esp+8] // eax gets Base addr of uSrcBlock
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push edi
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push esi // avoid Address Generation Interlocks
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push ebx
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mov cl, 2[eax] // ref[0][2]
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mov edi, [esp+16] // edi gets Base addr of uDstBlock
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mov ch, 3[eax] // ref[0][3]
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mov dh, 7[eax] // ref[0][7]
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shl ecx, 16
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mov dl, 6[eax] // ref[0][6]
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shl edx, 16
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mov ebx, [edi] // heat output cache
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mov esi, PITCH
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mov cl, 0[eax] // ref[0][0]
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mov dh, 5[eax] // ref[0][5]
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mov ch, 1[eax] // ref[0][1]
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mov dl, 4[eax] // ref[0][4]
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add eax, esi
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mov 0[edi], ecx // row 0, bytes 0-3
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mov 4[edi], edx // row 0, bytes 4-7
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mov cl, 2[eax] // ref[1][2]
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mov dh, 7[eax] // ref[1][7]
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mov ch, 3[eax] // ref[1][3]
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add edi, esi
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shl ecx, 16
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mov dl, 6[eax] // ref[1][6]
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shl edx, 16
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mov ebx, [edi] // heat output cache
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mov cl, 0[eax] // ref[1][0]
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mov dh, 5[eax] // ref[1][5]
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mov ch, 1[eax] // ref[1][1]
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mov dl, 4[eax] // ref[1][4]
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add eax, esi
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mov 0[edi], ecx // row 1, bytes 0-3
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mov cl, 2[eax] // ref[2][2]
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mov 4[edi], edx // row 1, bytes 4-7
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mov ch, 3[eax] // ref[2][3]
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add edi, esi
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shl ecx, 16
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mov dh, 7[eax] // ref[2][7]
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mov dl, 6[eax] // ref[2][6]
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mov ebx, [edi] // heat output cache
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shl edx, 16
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mov cl, 0[eax] // ref[2][0]
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mov dh, 5[eax] // ref[2][5]
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mov ch, 1[eax] // ref[2][1]
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mov dl, 4[eax] // ref[2][4]
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add eax, esi
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mov 0[edi], ecx // row 2, bytes 0-3
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mov 4[edi], edx // row 2, bytes 4-7
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mov cl, 2[eax] // ref[3][2]
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mov dh, 7[eax] // ref[3][7]
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mov ch, 3[eax] // ref[3][3]
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add edi, esi
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shl ecx, 16
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mov dl, 6[eax] // ref[3][6]
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shl edx, 16
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mov ebx, [edi] // heat output cache
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mov cl, 0[eax] // ref[3][0]
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mov dh, 5[eax] // ref[3][5]
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mov ch, 1[eax] // ref[3][1]
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mov dl, 4[eax] // ref[3][4]
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add eax, esi
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mov 0[edi], ecx // row 3, bytes 0-3
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mov cl, 2[eax] // ref[4][2]
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mov 4[edi],edx // row 3, bytes 4-7
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mov ch, 3[eax] // ref[4][3]
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add edi, esi
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shl ecx, 16
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mov dh, 7[eax] // ref[4][7]
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mov dl, 6[eax] // ref[4][6]
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mov ebx, [edi] // heat output cache
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shl edx, 16
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mov cl, 0[eax] // ref[4][0]
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mov dh, 5[eax] // ref[4][5]
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mov ch, 1[eax] // ref[4][1]
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mov dl, 4[eax] // ref[4][4]
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add eax, esi
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mov 0[edi], ecx // row 4, bytes 0-3
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mov 4[edi], edx // row 4, bytes 4-7
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mov cl, 2[eax] // ref[5][2]
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mov dh, 7[eax] // ref[5][7]
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mov ch, 3[eax] // ref[5][3]
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add edi, esi
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shl ecx, 16
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mov dl, 6[eax] // ref[5][6]
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shl edx, 16
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mov ebx, [edi] // heat output cache
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mov cl, 0[eax] // ref[5][0]
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mov dh, 5[eax] // ref[5][5]
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mov ch, 1[eax] // ref[5][1]
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mov dl, 4[eax] // ref[5][4]
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add eax, esi
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mov 0[edi], ecx // row 5, bytes 0-3
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mov cl, 2[eax] // ref[6][2]
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mov 4[edi], edx // row 5, bytes 4-7
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mov ch, 3[eax] // ref[6][3]
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add edi, esi
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shl ecx, 16
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mov dh, 7[eax] // ref[6][7]
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mov dl, 6[eax] // ref[6][6]
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mov ebx, [edi] // heat output cache
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shl edx, 16
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mov cl, 0[eax] // ref[6][0]
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mov dh, 5[eax] // ref[6][5]
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mov ch, 1[eax] // ref[6][1]
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mov dl, 4[eax] // ref[6][4]
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add eax, esi
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mov 0[edi], ecx // row 6, bytes 0-3
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mov 4[edi], edx // row 6, bytes 4-7
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mov cl, 2[eax] // ref[7][2]
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mov dh, 7[eax] // ref[7][7]
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mov ch, 3[eax] // ref[7][3]
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add edi, esi
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shl ecx, 16
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mov dl, 6[eax] // ref[7][6]
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shl edx, 16
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mov ebx, [edi] // heat output cache
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mov cl, 0[eax] // ref[7][0]
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mov dh, 5[eax] // ref[7][5]
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mov ch, 1[eax] // ref[7][1]
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mov dl, 4[eax] // ref[7][4]
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mov 0[edi], ecx // row 7, bytes 0-3
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mov 4[edi], edx // row 7, bytes 4-7
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pop ebx
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pop esi
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pop edi
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ret
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} // end of asm BlockCopy
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}
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#pragma code_seg()
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