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554 lines
14 KiB
554 lines
14 KiB
//----------------------------------------------------------------------------
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//
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// ARM machine implementation.
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//
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// Copyright (C) Microsoft Corporation, 2001-2002.
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//
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//----------------------------------------------------------------------------
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#include "ntsdp.hpp"
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char g_ArmSp[] = "sp";
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char g_ArmLr[] = "lr";
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char g_ArmPc[] = "pc";
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char g_ArmPsr[] = "psr";
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char g_ArmPsrN[] = "nf";
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char g_ArmPsrZ[] = "zf";
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char g_ArmPsrC[] = "cf";
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char g_ArmPsrV[] = "vf";
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char g_ArmPsrQ[] = "qf";
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char g_ArmPsrI[] = "if";
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char g_ArmPsrF[] = "ff";
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char g_ArmPsrT[] = "tf";
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char g_ArmPsrMode[] = "mode";
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REGDEF g_ArmRegs[] =
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{
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g_R0, ARM_R0, g_R1, ARM_R1, g_R2, ARM_R2, g_R3, ARM_R3,
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g_R4, ARM_R4, g_R5, ARM_R5, g_R6, ARM_R6,
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g_R7, ARM_R7, g_R8, ARM_R8, g_R9, ARM_R9, g_R10, ARM_R10,
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g_R11, ARM_R11, g_R12, ARM_R12,
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g_ArmSp, ARM_SP, g_ArmLr, ARM_LR, g_ArmPc, ARM_PC, g_ArmPsr, ARM_PSR,
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g_ArmPsrN, ARM_PSR_N, g_ArmPsrZ, ARM_PSR_Z, g_ArmPsrC, ARM_PSR_C,
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g_ArmPsrV, ARM_PSR_V, g_ArmPsrQ, ARM_PSR_Q, g_ArmPsrI, ARM_PSR_I,
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g_ArmPsrF, ARM_PSR_F, g_ArmPsrT, ARM_PSR_T,
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g_ArmPsrMode, ARM_PSR_MODE,
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NULL, 0,
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};
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REGSUBDEF g_ArmSubRegs[] =
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{
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{ ARM_PSR_N, ARM_PSR, 31, 1 },
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{ ARM_PSR_Z, ARM_PSR, 30, 1 },
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{ ARM_PSR_C, ARM_PSR, 29, 1 },
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{ ARM_PSR_V, ARM_PSR, 28, 1 },
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{ ARM_PSR_Q, ARM_PSR, 27, 1 },
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{ ARM_PSR_I, ARM_PSR, 7, 1 },
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{ ARM_PSR_F, ARM_PSR, 6, 1 },
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{ ARM_PSR_T, ARM_PSR, 5, 1 },
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{ ARM_PSR_MODE, ARM_PSR, 0, 5 },
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{ REG_ERROR, REG_ERROR, 0, 0 },
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};
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RegisterGroup g_ArmGroup =
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{
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0, g_ArmRegs, g_ArmSubRegs, NULL
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};
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// First ExecTypes entry must be the actual processor type.
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ULONG g_ArmExecTypes[] =
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{
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IMAGE_FILE_MACHINE_ARM
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};
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// This array must be sorted by CV reg value.
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CvRegMap g_ArmCvRegMap[] =
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{
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{CV_ARM_R0, ARM_R0},
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{CV_ARM_R1, ARM_R1},
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{CV_ARM_R2, ARM_R2},
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{CV_ARM_R3, ARM_R3},
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{CV_ARM_R4, ARM_R4},
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{CV_ARM_R5, ARM_R5},
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{CV_ARM_R6, ARM_R6},
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{CV_ARM_R7, ARM_R7},
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{CV_ARM_R8, ARM_R8},
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{CV_ARM_R9, ARM_R9},
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{CV_ARM_R10, ARM_R10},
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{CV_ARM_R11, ARM_R11},
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{CV_ARM_R12, ARM_R12},
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{CV_ARM_SP, ARM_SP},
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{CV_ARM_LR, ARM_LR},
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{CV_ARM_PC, ARM_PC},
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{CV_ARM_CPSR, ARM_PSR},
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};
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ArmMachineInfo::ArmMachineInfo(TargetInfo* Target)
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: MachineInfo(Target)
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{
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m_FullName = "ARM 32-bit";
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m_AbbrevName = "arm";
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m_PageSize = ARM_PAGE_SIZE;
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m_PageShift = ARM_PAGE_SHIFT;
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m_NumExecTypes = 1;
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m_ExecTypes = g_ArmExecTypes;
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m_Ptr64 = FALSE;
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m_RetRegIndex = ARM_R0;
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m_MaxDataBreakpoints = 0;
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m_SymPrefix = NULL;
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m_AllMask = REGALL_INT32;
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m_SizeCanonicalContext = sizeof(ARM_CONTEXT);
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m_SverCanonicalContext = NT_SVER_NT4;
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m_CvRegMapSize = DIMA(g_ArmCvRegMap);
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m_CvRegMap = g_ArmCvRegMap;
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}
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HRESULT
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ArmMachineInfo::Initialize(void)
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{
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m_NumGroups = 1;
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m_Groups[0] = &g_ArmGroup;
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return MachineInfo::Initialize();
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}
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void
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ArmMachineInfo::
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InitializeContext(ULONG64 Pc,
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PDBGKD_ANY_CONTROL_REPORT ControlReport)
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{
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// No ARM KD support.
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}
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void
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ArmMachineInfo::GetSystemTypeInfo(PSYSTEM_TYPE_INFO Info)
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{
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Info->SizeTargetContext = sizeof(ARM_CONTEXT);
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Info->OffsetTargetContextFlags =
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FIELD_OFFSET(ARM_CONTEXT, ContextFlags);
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// NT doesn't run on the ARM so these NT-related
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// data structure constants are not meaningful.
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Info->SizeControlReport = 0;
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Info->OffsetSpecialRegisters = 0;
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Info->SizeKspecialRegisters = 0;
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Info->TriagePrcbOffset = 0;
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Info->SizePageFrameNumber = sizeof(ULONG);
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Info->SizePte = sizeof(ULONG);
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Info->SharedUserDataOffset = 0;
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Info->UmSharedUserDataOffset = 0;
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Info->UmSharedSysCallOffset = 0;
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Info->UmSharedSysCallSize = 0;
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Info->SizeDynamicFunctionTable = 0;
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Info->SizeRuntimeFunction = 0;
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}
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void
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ArmMachineInfo::GetDefaultKdData(PKDDEBUGGER_DATA64 KdData)
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{
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// No KD data to fill in.
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}
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HRESULT
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ArmMachineInfo::KdGetContextState(ULONG State)
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{
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// MCTX_CONTEXT and MCTX_FULL are the same for Arm.
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if (State >= MCTX_CONTEXT && m_ContextState < MCTX_FULL)
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{
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HRESULT Status;
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Status = m_Target->GetContext(m_Target->m_RegContextThread->m_Handle,
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&m_Context);
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if (Status != S_OK)
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{
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return Status;
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}
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m_ContextState = MCTX_FULL;
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}
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return S_OK;
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}
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HRESULT
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ArmMachineInfo::KdSetContext(void)
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{
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return m_Target->SetContext(m_Target->m_RegContextThread->m_Handle,
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&m_Context);
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}
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HRESULT
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ArmMachineInfo::ConvertContextFrom(PCROSS_PLATFORM_CONTEXT Context,
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ULONG FromSver,
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ULONG FromSize, PVOID From)
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{
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if (FromSize < sizeof(ARM_CONTEXT))
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{
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return E_INVALIDARG;
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}
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memcpy(Context, From, sizeof(ARM_CONTEXT));
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return S_OK;
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}
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HRESULT
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ArmMachineInfo::ConvertContextTo(PCROSS_PLATFORM_CONTEXT Context,
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ULONG ToSver, ULONG ToSize, PVOID To)
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{
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if (ToSize < sizeof(ARM_CONTEXT))
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{
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return E_INVALIDARG;
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}
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memcpy(To, Context, sizeof(ARM_CONTEXT));
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return S_OK;
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}
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void
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ArmMachineInfo::InitializeContextFlags(PCROSS_PLATFORM_CONTEXT Context,
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ULONG Version)
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{
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Context->ArmContext.ContextFlags = ARM_CONTEXT_FULL;
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}
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HRESULT
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ArmMachineInfo::GetContextFromThreadStack(ULONG64 ThreadBase,
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PCROSS_PLATFORM_CONTEXT Context,
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ULONG64 Stack)
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{
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return E_NOTIMPL;
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}
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HRESULT
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ArmMachineInfo::GetContextFromFiber(ProcessInfo* Process,
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ULONG64 FiberBase,
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PCROSS_PLATFORM_CONTEXT Context,
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BOOL Verbose)
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{
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return E_NOTIMPL;
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}
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HRESULT
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ArmMachineInfo::GetContextFromTrapFrame(ULONG64 TrapBase,
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PCROSS_PLATFORM_CONTEXT Context,
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BOOL Verbose)
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{
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return E_NOTIMPL;
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}
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void
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ArmMachineInfo::GetScopeFrameFromContext(PCROSS_PLATFORM_CONTEXT Context,
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PDEBUG_STACK_FRAME ScopeFrame)
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{
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ZeroMemory(ScopeFrame, sizeof(*ScopeFrame));
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ScopeFrame->InstructionOffset = Context->ArmContext.Pc;
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ScopeFrame->FrameOffset = Context->ArmContext.R11;
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ScopeFrame->StackOffset = Context->ArmContext.Sp;
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}
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HRESULT
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ArmMachineInfo::GetScopeFrameRegister(ULONG Reg,
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PDEBUG_STACK_FRAME ScopeFrame,
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PULONG64 Value)
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{
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HRESULT Status;
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REGVAL RegVal;
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switch(Reg)
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{
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case ARM_SP:
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*Value = ScopeFrame->StackOffset;
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return S_OK;
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case ARM_R11:
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*Value = ScopeFrame->FrameOffset;
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return S_OK;
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default:
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RegVal.I64 = 0;
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if ((Status = FullGetVal(Reg, &RegVal)) != S_OK)
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{
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return Status;
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}
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*Value = RegVal.I64;
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return S_OK;
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}
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}
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HRESULT
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ArmMachineInfo::SetScopeFrameRegister(ULONG Reg,
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PDEBUG_STACK_FRAME ScopeFrame,
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ULONG64 Value)
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{
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REGVAL RegVal;
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switch(Reg)
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{
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case ARM_SP:
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ScopeFrame->StackOffset = Value;
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return S_OK;
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case ARM_R11:
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ScopeFrame->FrameOffset = Value;
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return S_OK;
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default:
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RegVal.Type = GetType(Reg);
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RegVal.I64 = Value;
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return FullSetVal(Reg, &RegVal);
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}
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}
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int
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ArmMachineInfo::GetType(ULONG Reg)
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{
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if (Reg < ARM_INT_FIRST || Reg > ARM_INT_LAST)
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{
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return REGVAL_SUB32;
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}
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else
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{
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return REGVAL_INT32;
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}
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}
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HRESULT
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ArmMachineInfo::GetVal(ULONG Reg, REGVAL *Val)
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{
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HRESULT Status;
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if (Reg < ARM_INT_FIRST || Reg > ARM_INT_LAST)
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{
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return E_INVALIDARG;
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}
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if ((Status = GetContextState(MCTX_FULL)) != S_OK)
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{
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return Status;
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}
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Val->Type = GetType(Reg);
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Val->I64 = *(&m_Context.ArmContext.R0 + (Reg - ARM_INT_FIRST));
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return S_OK;
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}
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HRESULT
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ArmMachineInfo::SetVal(ULONG Reg, REGVAL *Val)
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{
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HRESULT Status;
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if (m_ContextIsReadOnly)
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{
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return HRESULT_FROM_WIN32(ERROR_WRITE_FAULT);
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}
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if (Reg < ARM_INT_FIRST || Reg > ARM_INT_LAST)
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{
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return E_INVALIDARG;
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}
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// Optimize away some common cases where registers are
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// set to their current value.
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if (m_ContextState >= MCTX_PC && Reg == ARM_PC &&
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Val->I64 == m_Context.ArmContext.Pc)
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{
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return S_OK;
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}
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if ((Status = GetContextState(MCTX_DIRTY)) != S_OK)
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{
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return Status;
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}
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*(&m_Context.ArmContext.R0 + (Reg - ARM_INT_FIRST)) = Val->I32;
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NotifyChangeDebuggeeState(DEBUG_CDS_REGISTERS,
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RegCountFromIndex(Reg));
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return S_OK;
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}
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void
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ArmMachineInfo::GetPC(PADDR Address)
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{
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ADDRFLAT(Address, EXTEND64(GetReg32(ARM_PC)));
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}
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void
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ArmMachineInfo::SetPC(PADDR Address)
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{
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SetReg32(ARM_PC, (ULONG)Flat(*Address));
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}
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void
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ArmMachineInfo::GetFP(PADDR Address)
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{
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ADDRFLAT(Address, EXTEND64(GetReg32(ARM_R11)));
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}
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void
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ArmMachineInfo::GetSP(PADDR Address)
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{
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ADDRFLAT(Address, EXTEND64(GetReg32(ARM_SP)));
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}
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ULONG64
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ArmMachineInfo::GetArgReg(void)
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{
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return EXTEND64(GetReg32(ARM_R0));
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}
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ULONG64
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ArmMachineInfo::GetRetReg(void)
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{
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return EXTEND64(GetReg32(ARM_R0));
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}
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void
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ArmMachineInfo::OutputAll(ULONG Mask, ULONG OutMask)
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{
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if (GetContextState(MCTX_FULL) != S_OK)
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{
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ErrOut("Unable to retrieve register information\n");
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return;
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}
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if (Mask & (REGALL_INT32 | REGALL_INT64))
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{
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MaskOut(OutMask, " r0=%08x r1=%08x r2=%08x "
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"r3=%08x r4=%08x r5=%08x\n",
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m_Context.ArmContext.R0, m_Context.ArmContext.R1,
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m_Context.ArmContext.R2, m_Context.ArmContext.R3,
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m_Context.ArmContext.R4, m_Context.ArmContext.R5);
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MaskOut(OutMask, " r6=%08x r7=%08x r8=%08x "
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"r9=%08x r10=%08x r11=%08x\n",
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m_Context.ArmContext.R6, m_Context.ArmContext.R7,
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m_Context.ArmContext.R8, m_Context.ArmContext.R9,
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m_Context.ArmContext.R10, m_Context.ArmContext.R11);
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MaskOut(OutMask, "r12=%08x sp=%08x lr=%08x "
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"pc=%08x psr=%08x %s%s%s%s%s %s\n",
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m_Context.ArmContext.R12, m_Context.ArmContext.Sp,
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m_Context.ArmContext.Lr, m_Context.ArmContext.Pc,
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m_Context.ArmContext.Psr,
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(m_Context.ArmContext.Psr & ARM_FLAG_N) ? "N" : "-",
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(m_Context.ArmContext.Psr & ARM_FLAG_Z) ? "Z" : "-",
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(m_Context.ArmContext.Psr & ARM_FLAG_C) ? "C" : "-",
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(m_Context.ArmContext.Psr & ARM_FLAG_V) ? "V" : "-",
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(m_Context.ArmContext.Psr & ARM_FLAG_Q) ? "Q" : "-",
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(m_Context.ArmContext.Psr & ARM_FLAG_T) ? "Thumb" : "ARM");
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}
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}
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HRESULT
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ArmMachineInfo::SetAndOutputTrapFrame(ULONG64 TrapBase,
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PCROSS_PLATFORM_CONTEXT Context)
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{
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return SetAndOutputContext(Context, TRUE, REGALL_INT32);
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}
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TRACEMODE
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ArmMachineInfo::GetTraceMode(void)
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{
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return TRACE_NONE;
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}
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void
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ArmMachineInfo::SetTraceMode(TRACEMODE Mode)
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{
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// No explicit trace mode needed.
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}
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BOOL
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ArmMachineInfo::IsStepStatusSupported(ULONG Status)
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{
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switch (Status)
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{
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case DEBUG_STATUS_STEP_INTO:
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case DEBUG_STATUS_STEP_OVER:
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return TRUE;
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default:
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return FALSE;
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}
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}
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ULONG
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ArmMachineInfo::ExecutingMachine(void)
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{
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return m_ExecTypes[0];
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}
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HRESULT
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ArmMachineInfo::SetPageDirectory(ThreadInfo* Thread,
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ULONG Idx, ULONG64 PageDir,
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PULONG NextIdx)
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{
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return E_NOTIMPL;
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}
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HRESULT
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ArmMachineInfo::GetVirtualTranslationPhysicalOffsets(ThreadInfo* Thread,
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ULONG64 Virt,
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PULONG64 Offsets,
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ULONG OffsetsSize,
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PULONG Levels,
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PULONG PfIndex,
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PULONG64 LastVal)
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{
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return E_NOTIMPL;
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}
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HRESULT
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ArmMachineInfo::GetBaseTranslationVirtualOffset(PULONG64 Offset)
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{
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return E_NOTIMPL;
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}
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void
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ArmMachineInfo::DecodePte(ULONG64 Pte, PULONG64 PageFrameNumber,
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PULONG Flags)
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{
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// XXX
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*PageFrameNumber = 0;
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*Flags = 0;
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}
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void
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ArmMachineInfo::OutputFunctionEntry(PVOID RawEntry)
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{
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ErrOut("ARM function entries not implemented\n");
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}
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HRESULT
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ArmMachineInfo::ReadDynamicFunctionTable(ProcessInfo* Process,
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ULONG64 Table,
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PULONG64 NextTable,
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PULONG64 MinAddress,
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PULONG64 MaxAddress,
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PULONG64 BaseAddress,
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PULONG64 TableData,
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PULONG TableSize,
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PWSTR OutOfProcessDll,
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PCROSS_PLATFORM_DYNAMIC_FUNCTION_TABLE RawTable)
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{
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return E_NOTIMPL;
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}
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PVOID
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ArmMachineInfo::FindDynamicFunctionEntry(PCROSS_PLATFORM_DYNAMIC_FUNCTION_TABLE Table,
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ULONG64 Address,
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PVOID TableData,
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ULONG TableSize)
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{
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return NULL;
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}
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HRESULT
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ArmMachineInfo::ReadKernelProcessorId
|
|
(ULONG Processor, PDEBUG_PROCESSOR_IDENTIFICATION_ALL Id)
|
|
{
|
|
// No ARM KD support.
|
|
return E_NOTIMPL;
|
|
}
|