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282 lines
8.4 KiB
282 lines
8.4 KiB
/*++
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Copyright (c) 1996, 1997 Microsoft Corporation
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Module Name:
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init.c
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Abstract:
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This module contains the initialization code for AGP440.SYS.
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Author:
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John Vert (jvert) 10/21/1997
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Revision History:
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--*/
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#include "agp440.h"
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ULONG AgpExtensionSize = sizeof(AGP440_EXTENSION);
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PAGP_FLUSH_PAGES AgpFlushPages = NULL; // not implemented
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NTSTATUS
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AgpInitializeTarget(
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IN PVOID AgpExtension
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)
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/*++
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Routine Description:
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Entrypoint for target initialization. This is called first.
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Arguments:
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AgpExtension - Supplies the AGP extension
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Return Value:
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NTSTATUS
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--*/
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{
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PAGP440_EXTENSION Extension = AgpExtension;
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//
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// Initialize our chipset-specific extension
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//
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Extension->ApertureStart.QuadPart = 0;
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Extension->ApertureLength = 0;
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Extension->Gart = NULL;
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Extension->GartLength = 0;
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Extension->GlobalEnable = FALSE;
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Extension->PCIEnable = FALSE;
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Extension->GartPhysical.QuadPart = 0;
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Extension->SpecialTarget = 0;
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return(STATUS_SUCCESS);
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}
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NTSTATUS
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AgpInitializeMaster(
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IN PVOID AgpExtension,
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OUT ULONG *AgpCapabilities
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)
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/*++
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Routine Description:
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Entrypoint for master initialization. This is called after target initialization
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and should be used to initialize the AGP capabilities of both master and target.
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This is also called when the master transitions into the D0 state.
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Arguments:
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AgpExtension - Supplies the AGP extension
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AgpCapabilities - Returns the capabilities of this AGP device.
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Return Value:
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STATUS_SUCCESS
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--*/
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{
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NTSTATUS Status;
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PCI_AGP_CAPABILITY MasterCap;
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PCI_AGP_CAPABILITY TargetCap;
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PAGP440_EXTENSION Extension = AgpExtension;
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ULONG SBAEnable;
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ULONG DataRate;
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ULONG FastWrite;
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BOOLEAN ReverseInit;
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ULONG VendorId = 0;
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ULONG AgpCtrl = 0;
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#if DBG
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PCI_AGP_CAPABILITY CurrentCap;
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#endif
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//
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// Intel says if all BIOS manufacturers perform RMW ops on this
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// register, then it will always be set, however two video OEMs
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// have complained of systems where this was not set, and was
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// causing the system to freeze, so we'll hard code it just in
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// case (only affects 440LX)
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//
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AgpLibReadAgpTargetConfig(AgpExtension, &VendorId, 0, sizeof(VendorId));
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if ((VendorId == AGP_440LX_IDENTIFIER) ||
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(VendorId == AGP_440LX2_IDENTIFIER)) {
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AgpLibReadAgpTargetConfig(AgpExtension, &AgpCtrl, AGPCTRL_OFFSET, sizeof(AgpCtrl));
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AgpCtrl |= READ_SYNC_ENABLE;
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AgpLibWriteAgpTargetConfig(AgpExtension, &AgpCtrl, AGPCTRL_OFFSET, sizeof(AgpCtrl));
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}
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//
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// Indicate that we can map memory through the GART aperture
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//
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*AgpCapabilities = AGP_CAPABILITIES_MAP_PHYSICAL;
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//
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// Get the master and target AGP capabilities
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//
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Status = AgpLibGetMasterCapability(AgpExtension, &MasterCap);
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if (!NT_SUCCESS(Status)) {
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AGPLOG(AGP_CRITICAL,
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("AGP440InitializeDevice - AgpLibGetMasterCapability failed %08lx\n"));
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return(Status);
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}
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//
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// Some broken cards (Matrox Millenium II "AGP") report no valid
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// supported transfer rates. These are not really AGP cards. They
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// have an AGP Capabilities structure that reports no capabilities.
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//
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if (MasterCap.AGPStatus.Rate == 0) {
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AGPLOG(AGP_CRITICAL,
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("AGP440InitializeDevice - AgpLibGetMasterCapability returned no valid transfer rate\n"));
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return(STATUS_INVALID_DEVICE_REQUEST);
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}
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Status = AgpLibGetTargetCapability(AgpExtension, &TargetCap);
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if (!NT_SUCCESS(Status)) {
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AGPLOG(AGP_CRITICAL,
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("AGP440InitializeDevice - AgpLibGetTargetCapability failed %08lx\n"));
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return(Status);
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}
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//
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// Determine the greatest common denominator for data rate.
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//
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DataRate = TargetCap.AGPStatus.Rate & MasterCap.AGPStatus.Rate;
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AGP_ASSERT(DataRate != 0);
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//
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// Select the highest common rate.
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//
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if (DataRate & PCI_AGP_RATE_4X) {
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DataRate = PCI_AGP_RATE_4X;
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} else if (DataRate & PCI_AGP_RATE_2X) {
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DataRate = PCI_AGP_RATE_2X;
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} else if (DataRate & PCI_AGP_RATE_1X) {
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DataRate = PCI_AGP_RATE_1X;
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}
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//
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// Previously a call was made to change the rate (successfully),
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// use this rate again now
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//
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if (Extension->SpecialTarget & AGP_FLAG_SPECIAL_RESERVE) {
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DataRate = (ULONG)((Extension->SpecialTarget &
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AGP_FLAG_SPECIAL_RESERVE) >>
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AGP_FLAG_SET_RATE_SHIFT);
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//
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// If we're in AGP3 mode, and our rate was successfully
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// programmed, then we must convert into AGP2 rate bits
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//
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if (TargetCap.AGPStatus.Agp3Mode == 1) {
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ASSERT(MasterCap.AGPStatus.Agp3Mode == 1);
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ASSERT((DataRate == 8) || (DataRate == PCI_AGP_RATE_4X));
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DataRate >>= 2;
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}
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}
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//
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// Enable SBA if both master and target support it.
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//
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SBAEnable = (TargetCap.AGPStatus.SideBandAddressing & MasterCap.AGPStatus.SideBandAddressing);
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//
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// Enable FastWrite if both master and target support it.
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//
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FastWrite = (TargetCap.AGPStatus.FastWrite & MasterCap.AGPStatus.FastWrite);
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//
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// Enable the Master first.
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//
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ReverseInit =
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(Extension->SpecialTarget & AGP_FLAG_REVERSE_INITIALIZATION) ==
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AGP_FLAG_REVERSE_INITIALIZATION;
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if (ReverseInit) {
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MasterCap.AGPCommand.Rate = DataRate;
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MasterCap.AGPCommand.AGPEnable = 1;
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MasterCap.AGPCommand.SBAEnable = SBAEnable;
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MasterCap.AGPCommand.FastWriteEnable = FastWrite;
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MasterCap.AGPCommand.FourGBEnable = 0;
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MasterCap.AGPCommand.RequestQueueDepth = TargetCap.AGPStatus.RequestQueueDepthMaximum;
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Status = AgpLibSetMasterCapability(AgpExtension, &MasterCap);
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if (!NT_SUCCESS(Status)) {
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AGPLOG(AGP_CRITICAL,
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("AGP440InitializeDevice - AgpLibSetMasterCapability %08lx failed %08lx\n",
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&MasterCap,
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Status));
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}
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}
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//
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// Now enable the Target.
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//
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TargetCap.AGPCommand.Rate = DataRate;
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TargetCap.AGPCommand.AGPEnable = 1;
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TargetCap.AGPCommand.SBAEnable = SBAEnable;
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TargetCap.AGPCommand.FastWriteEnable = FastWrite;
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TargetCap.AGPCommand.FourGBEnable = 0;
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Status = AgpLibSetTargetCapability(AgpExtension, &TargetCap);
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if (!NT_SUCCESS(Status)) {
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AGPLOG(AGP_CRITICAL,
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("AGP440InitializeDevice - AgpLibSetTargetCapability %08lx for target failed %08lx\n",
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&TargetCap,
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Status));
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return(Status);
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}
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if (!ReverseInit) {
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MasterCap.AGPCommand.Rate = DataRate;
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MasterCap.AGPCommand.AGPEnable = 1;
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MasterCap.AGPCommand.SBAEnable = SBAEnable;
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MasterCap.AGPCommand.FastWriteEnable = FastWrite;
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MasterCap.AGPCommand.FourGBEnable = 0;
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MasterCap.AGPCommand.RequestQueueDepth = TargetCap.AGPStatus.RequestQueueDepthMaximum;
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Status = AgpLibSetMasterCapability(AgpExtension, &MasterCap);
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if (!NT_SUCCESS(Status)) {
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AGPLOG(AGP_CRITICAL,
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("AGP440InitializeDevice - AgpLibSetMasterCapability %08lx failed %08lx\n",
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&MasterCap,
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Status));
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}
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}
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#if DBG
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//
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// Read them back, see if it worked
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//
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Status = AgpLibGetMasterCapability(AgpExtension, &CurrentCap);
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AGP_ASSERT(NT_SUCCESS(Status));
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//
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// If the target request queue depth is greater than the master will
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// allow, it will be trimmed. Loosen the assert to not require an
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// exact match.
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//
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AGP_ASSERT(CurrentCap.AGPCommand.RequestQueueDepth <= MasterCap.AGPCommand.RequestQueueDepth);
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CurrentCap.AGPCommand.RequestQueueDepth = MasterCap.AGPCommand.RequestQueueDepth;
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AGP_ASSERT(RtlEqualMemory(&CurrentCap.AGPCommand, &MasterCap.AGPCommand, sizeof(CurrentCap.AGPCommand)));
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Status = AgpLibGetTargetCapability(AgpExtension, &CurrentCap);
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AGP_ASSERT(NT_SUCCESS(Status));
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AGP_ASSERT(RtlEqualMemory(&CurrentCap.AGPCommand, &TargetCap.AGPCommand, sizeof(CurrentCap.AGPCommand)));
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#endif
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return(Status);
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}
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