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557 lines
14 KiB
557 lines
14 KiB
/*++
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Copyright (c) 1990-1998 Microsoft Corporation, All Rights Reserved
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Module Name:
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ne2000hw.h
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Abstract:
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Hardware definitions.
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Author:
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Sean Selitrennikoff
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Environment:
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Notes:
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optional-notes
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Revision History:
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--*/
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#ifndef _NE2000HARDWARE_
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#define _NE2000HARDWARE_
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//
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// Definitions for supporting clone adapters.
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//
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//
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// Valid value ranges for the IoBaseAddress.
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//
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#ifdef NE1000
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#define MIN_IOBASEADDR 0x0200
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#else
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#define MIN_IOBASEADDR 0x0120
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#endif
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#define MAX_IOBASEADDR 0xc3d0
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//
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// Valid value ranges for the InterruptNumber.
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//
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#define MIN_IRQ 2
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#ifdef NE1000
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#define MAX_IRQ 9
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#else
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#define MAX_IRQ 15
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#endif
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//
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// Types of Ne2000 cards.
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//
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#define NE2000_ISA 0
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#define NE2000_PCMCIA 1
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//
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// ID for MCA Ne2000 clone cards
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//
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#define AE2_ADAPTER_ID 0x67b0
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#define UB_ADAPTER_ID 0x611f
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#define NE2_ADAPTER_ID 0x7154
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//
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// Microchannel IRQ POS register mask and shift count
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//
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#define MC_IRQ_MASK 0x60
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#define MC_IRQ_MASK_UB 0x0E
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//
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// Microchannel I/O base address mask and shift count
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//
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#define MC_IO_BASE_MASK 0x0E
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#define MC_IO_BASE_MASK_UB 0xE0
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//
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// Default value for Adapter->IoBaseAddr
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//
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#define DEFAULT_IOBASEADDR (PVOID)0x300
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#define CIS_NET_ADDR_OFFSET 0xff0
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//
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// Default value for Adapter->InterruptNumber
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//
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#define DEFAULT_INTERRUPTNUMBER 3
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//
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// Default value for Adapter->MulticastListMax
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//
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#define DEFAULT_MULTICASTLISTMAX 8
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//
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// Offsets from Adapter->IoPAddr of the ports used to access
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// the 8390 NIC registers.
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//
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// The names in parenthesis are the abbreviations by which
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// the registers are referred to in the 8390 data sheet.
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//
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// Some of the offsets appear more than once
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// because they have have relevant page 0 and page 1 values,
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// or they are different registers when read than they are
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// when written. The notation MSB indicates that only the
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// MSB can be set for this register, the LSB is assumed 0.
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//
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#define NIC_COMMAND 0x0 // (CR)
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#define NIC_PAGE_START 0x1 // (PSTART) MSB, write-only
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#define NIC_PHYS_ADDR 0x1 // (PAR0) page 1
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#define NIC_PAGE_STOP 0x2 // (PSTOP) MSB, write-only
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#define NIC_BOUNDARY 0x3 // (BNRY) MSB
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#define NIC_XMIT_START 0x4 // (TPSR) MSB, write-only
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#define NIC_XMIT_STATUS 0x4 // (TSR) read-only
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#define NIC_XMIT_COUNT_LSB 0x5 // (TBCR0) write-only
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#define NIC_XMIT_COUNT_MSB 0x6 // (TBCR1) write-only
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#define NIC_FIFO 0x6 // (FIFO) read-only
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#define NIC_INTR_STATUS 0x7 // (ISR)
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#define NIC_CURRENT 0x7 // (CURR) page 1
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#define NIC_MC_ADDR 0x8 // (MAR0) page 1
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#define NIC_CRDA_LSB 0x8 // (CRDA0)
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#define NIC_RMT_ADDR_LSB 0x8 // (RSAR0)
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#define NIC_CRDA_MSB 0x9 // (CRDA1)
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#define NIC_RMT_ADDR_MSB 0x9 // (RSAR1)
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#define NIC_RMT_COUNT_LSB 0xa // (RBCR0) write-only
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#define NIC_RMT_COUNT_MSB 0xb // (RBCR1) write-only
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#define NIC_RCV_CONFIG 0xc // (RCR) write-only
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#define NIC_RCV_STATUS 0xc // (RSR) read-only
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#define NIC_XMIT_CONFIG 0xd // (TCR) write-only
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#define NIC_FAE_ERR_CNTR 0xd // (CNTR0) read-only
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#define NIC_DATA_CONFIG 0xe // (DCR) write-only
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#define NIC_CRC_ERR_CNTR 0xe // (CNTR1) read-only
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#define NIC_INTR_MASK 0xf // (IMR) write-only
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#define NIC_MISSED_CNTR 0xf // (CNTR2) read-only
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#define NIC_RACK_NIC 0x10 // Byte to read or write
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#define NIC_RESET 0x1f // (RESET)
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//
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// Constants for the NIC_COMMAND register.
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//
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// Start/stop the card, start transmissions, and select
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// which page of registers was seen through the ports.
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//
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#define CR_STOP (UCHAR)0x01 // reset the card
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#define CR_START (UCHAR)0x02 // start the card
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#define CR_XMIT (UCHAR)0x04 // begin transmission
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#define CR_NO_DMA (UCHAR)0x20 // stop remote DMA
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#define CR_PS0 (UCHAR)0x40 // low bit of page number
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#define CR_PS1 (UCHAR)0x80 // high bit of page number
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#define CR_PAGE0 (UCHAR)0x00 // select page 0
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#define CR_PAGE1 CR_PS0 // select page 1
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#define CR_PAGE2 CR_PS1 // select page 2
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#define CR_DMA_WRITE (UCHAR)0x10 // Write
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#define CR_DMA_READ (UCHAR)0x08 // Read
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#define CR_SEND (UCHAR)0x18 // send
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//
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// Constants for the NIC_XMIT_STATUS register.
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//
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// Indicate the result of a packet transmission.
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//
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#define TSR_XMIT_OK (UCHAR)0x01 // transmit with no errors
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#define TSR_COLLISION (UCHAR)0x04 // collided at least once
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#define TSR_ABORTED (UCHAR)0x08 // too many collisions
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#define TSR_NO_CARRIER (UCHAR)0x10 // carrier lost
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#define TSR_NO_CDH (UCHAR)0x40 // no collision detect heartbeat
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//
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// Constants for the NIC_INTR_STATUS register.
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//
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// Indicate the cause of an interrupt.
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//
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#define ISR_EMPTY (UCHAR)0x00 // no bits set in ISR
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#define ISR_RCV (UCHAR)0x01 // packet received with no errors
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#define ISR_XMIT (UCHAR)0x02 // packet transmitted with no errors
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#define ISR_RCV_ERR (UCHAR)0x04 // error on packet reception
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#define ISR_XMIT_ERR (UCHAR)0x08 // error on packet transmission
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#define ISR_OVERFLOW (UCHAR)0x10 // receive buffer overflow
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#define ISR_COUNTER (UCHAR)0x20 // MSB set on tally counter
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#define ISR_DMA_DONE (UCHAR)0x40 // RDC
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#define ISR_RESET (UCHAR)0x80 // (not an interrupt) card is reset
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//
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// Constants for the NIC_RCV_CONFIG register.
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//
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// Configure what type of packets are received.
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//
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#define RCR_REJECT_ERR (UCHAR)0x00 // reject error packets
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#define RCR_BROADCAST (UCHAR)0x04 // receive broadcast packets
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#define RCR_MULTICAST (UCHAR)0x08 // receive multicast packets
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#define RCR_ALL_PHYS (UCHAR)0x10 // receive ALL directed packets
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#define RCR_MONITOR (UCHAR)0x20 // don't collect packets
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//
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// Constants for the NIC_RCV_STATUS register.
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//
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// Indicate the status of a received packet.
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//
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// These are also used to interpret the status byte in the
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// packet header of a received packet.
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//
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#define RSR_PACKET_OK (UCHAR)0x01 // packet received with no errors
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#define RSR_CRC_ERROR (UCHAR)0x02 // packet received with CRC error
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#define RSR_MULTICAST (UCHAR)0x20 // packet received was multicast
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#define RSR_DISABLED (UCHAR)0x40 // received is disabled
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#define RSR_DEFERRING (UCHAR)0x80 // receiver is deferring
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//
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// Constants for the NIC_XMIT_CONFIG register.
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//
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// Configures how packets are transmitted.
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//
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#define TCR_NO_LOOPBACK (UCHAR)0x00 // normal operation
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#define TCR_LOOPBACK (UCHAR)0x02 // loopback (set when NIC is stopped)
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#define TCR_INHIBIT_CRC (UCHAR)0x01 // inhibit appending of CRC
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#define TCR_NIC_LBK (UCHAR)0x02 // loopback through the NIC
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#define TCR_SNI_LBK (UCHAR)0x04 // loopback through the SNI
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#define TCR_COAX_LBK (UCHAR)0x06 // loopback to the coax
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//
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// Constants for the NIC_DATA_CONFIG register.
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//
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// Set data transfer sizes.
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//
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#define DCR_BYTE_WIDE (UCHAR)0x00 // byte-wide DMA transfers
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#define DCR_WORD_WIDE (UCHAR)0x01 // word-wide DMA transfers
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#define DCR_LOOPBACK (UCHAR)0x00 // loopback mode (TCR must be set)
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#define DCR_NORMAL (UCHAR)0x08 // normal operation
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#define DCR_FIFO_2_BYTE (UCHAR)0x00 // 2-byte FIFO threshhold
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#define DCR_FIFO_4_BYTE (UCHAR)0x20 // 4-byte FIFO threshhold
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#define DCR_FIFO_8_BYTE (UCHAR)0x40 // 8-byte FIFO threshhold
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#define DCR_FIFO_12_BYTE (UCHAR)0x60 // 12-byte FIFO threshhold
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#define DCR_AUTO_INIT (UCHAR)0x10 // Auto-init to remove packets from ring
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//
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// Constants for the NIC_INTR_MASK register.
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//
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// Configure which ISR settings actually cause interrupts.
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//
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#define IMR_RCV (UCHAR)0x01 // packet received with no errors
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#define IMR_XMIT (UCHAR)0x02 // packet transmitted with no errors
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#define IMR_RCV_ERR (UCHAR)0x04 // error on packet reception
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#define IMR_XMIT_ERR (UCHAR)0x08 // error on packet transmission
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#define IMR_OVERFLOW (UCHAR)0x10 // receive buffer overflow
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#define IMR_COUNTER (UCHAR)0x20 // MSB set on tally counter
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//++
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//
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// VOID
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// CardStart(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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//
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// Routine Description:
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//
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// Starts the card.
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//
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// Arguments:
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//
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// Adapter - pointer to the adapter block
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//
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// Return Value:
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//
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// None.
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//
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//--
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//
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// Assume that the card has been stopped as in CardStop.
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//
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#define CardStart(Adapter) \
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NdisRawWritePortUchar(((Adapter->IoPAddr)+NIC_XMIT_CONFIG), TCR_NO_LOOPBACK)
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//++
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//
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// VOID
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// CardSetAllMulticast(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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// Routine Description:
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//
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// Enables every bit in the card multicast bit mask.
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// Calls SyncCardSetAllMulticast.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardSetAllMulticast(Adapter) \
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NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
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SyncCardSetAllMulticast, (PVOID)(Adapter))
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//++
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//
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// VOID
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// CardCopyMulticastRegs(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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// Routine Description:
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//
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// Writes out the entire multicast bit mask to the card from
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// Adapter->NicMulticastRegs. Calls SyncCardCopyMulticastRegs.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardCopyMulticastRegs(Adapter) \
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NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
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SyncCardCopyMulticastRegs, (PVOID)(Adapter))
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//++
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//
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// VOID
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// CardGetInterruptStatus(
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// IN PNE2000_ADAPTER Adapter,
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// OUT PUCHAR InterrupStatus
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// )
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//
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// Routine Description:
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//
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// Reads the interrupt status (ISR) register from the card. Only
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// called at IRQL INTERRUPT_LEVEL.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// InterruptStatus - Returns the value of ISR.
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//
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// Return Value:
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//
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//--
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#define CardGetInterruptStatus(_Adapter,_InterruptStatus) \
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NdisRawReadPortUchar(((_Adapter)->IoPAddr+NIC_INTR_STATUS), (_InterruptStatus))
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//++
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//
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// VOID
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// CardSetReceiveConfig(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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// Routine Description:
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//
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// Sets the receive configuration (RCR) register on the card.
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// The value used is Adapter->NicReceiveConfig. Calls
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// SyncCardSetReceiveConfig.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardSetReceiveConfig(Adapter) \
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NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
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SyncCardSetReceiveConfig, (PVOID)(Adapter))
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//++
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//
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// VOID
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// CardBlockInterrupts(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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// Routine Description:
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//
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// Blocks all interrupts from the card by clearing the
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// interrupt mask (IMR) register. Only called from
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// IRQL INTERRUPT_LEVEL.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardBlockInterrupts(Adapter) \
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NdisRawWritePortUchar(((Adapter)->IoPAddr+NIC_INTR_MASK), 0)
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//++
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//
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// VOID
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// CardUnblockInterrupts(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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// Routine Description:
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//
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// Unblocks all interrupts from the card by setting the
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// interrupt mask (IMR) register. Only called from IRQL
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// INTERRUPT_LEVEL.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardUnblockInterrupts(Adapter) \
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NdisRawWritePortUchar(\
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((Adapter)->IoPAddr+NIC_INTR_MASK), \
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(Adapter)->NicInterruptMask)
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//++
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//
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// VOID
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// CardAcknowledgeOverflowInterrupt(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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// Routine Description:
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//
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// Acknowledges an overflow interrupt by setting the bit in
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// the interrupt status (ISR) register. Calls
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// SyncCardAcknowledgeOverflow.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardAcknowledgeOverflowInterrupt(Adapter) \
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SyncCardAcknowledgeOverflow(Adapter)
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//++
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//
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// VOID
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// CardAcknowledgeCounterInterrupt(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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// Routine Description:
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//
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// Acknowledges a counter interrupt by setting the bit in
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// the interrupt status (ISR) register.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardAcknowledgeCounterInterrupt(Adapter) \
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NdisRawWritePortUchar(((Adapter)->IoPAddr+NIC_INTR_STATUS), ISR_COUNTER)
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//++
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//
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// VOID
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// CardUpdateCounters(
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// IN PNE2000_ADAPTER Adapter
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// )
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//
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// Routine Description:
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//
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// Updates the values of the three counters (frame alignment
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// errors, CRC errors, and missed packets) by reading in their
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// current values from the card and adding them to the ones
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// stored in the Adapter structure. Calls SyncCardUpdateCounters.
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//
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// Arguments:
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//
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// Adapter - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardUpdateCounters(Adapter) \
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NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
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SyncCardUpdateCounters, (PVOID)(Adapter))
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#endif // _NE2000HARDWARE_
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