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598 lines
13 KiB
598 lines
13 KiB
/*++
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Copyright (c) 1998 Microsoft Corporation
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Module Name:
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i64sapic.c
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Abstract:
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Implements I/O Sapic functionality
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Author:
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Todd Kjos (HP) (v-tkjos) 1-Jun-1998
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Environment:
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Kernel mode only.
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Revision History:
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--*/
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#include "halp.h"
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#include "iosapic.h"
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#include <ntacpi.h>
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VOID
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IoSapicMaskEntry(
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PIO_INTR_CONTROL IoUnit,
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ULONG RteNumber
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);
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VOID
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IoSapicSetEntry(
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PIO_INTR_CONTROL IoUnit,
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ULONG RteNumber
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);
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VOID
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IoSapicEnableEntry(
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PIO_INTR_CONTROL IoUnit,
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ULONG RteNumber
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);
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//
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// Method structure for control of IO Sapic Hardware
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//
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INTR_METHODS HalpIoSapicMethods = {
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IoSapicMaskEntry,
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IoSapicSetEntry,
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IoSapicEnableEntry
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};
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VOID
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HalpInti2InterruptController (
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IN ULONG InterruptInput,
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OUT PIO_INTR_CONTROL *InterruptController,
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OUT PULONG ControllerInti
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)
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/*++
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Routine Description:
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Convert InterruptInput to an interrupt controller
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structure and input number
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Arguments:
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InterruptInput - System Global Interrupt Input
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InterruptController - Pointer to Interupt controller structure
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ControllerInti - Redirection Table Entry on this interrupt controller
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Return Value:
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--*/
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{
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PIO_INTR_CONTROL IoUnit;
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for (IoUnit=HalpIoSapicList; IoUnit; IoUnit=IoUnit->flink) {
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if (InterruptInput <= IoUnit->IntiMax) {
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if (IoUnit->IntiBase > InterruptInput) {
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//
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// If there are holes in the list of Global System Vectors AND
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// someone specifies one of the non-existant GSVs, make sure we
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// return an error rather than getting horribly confused about
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// which IOAPIC contains the Inti.
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//
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IoUnit = NULL;
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}
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break;
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}
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}
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*InterruptController = IoUnit;
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if (IoUnit) {
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*ControllerInti = InterruptInput-IoUnit->IntiBase;
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}
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}
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BOOLEAN
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HalpGetSapicInterruptDesc (
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IN INTERFACE_TYPE BusType,
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IN ULONG BusNumber,
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IN ULONG BusInterruptLevel,
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OUT PULONG Inti,
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OUT PKAFFINITY InterruptAffinity
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)
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/*++
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Routine Description:
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This procedure gets a "Inti" describing the requested interrupt
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Arguments:
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BusType - The Bus type as known to the IO subsystem
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BusNumber - The number of the Bus we care for
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BusInterruptLevel - IRQ on the Bus
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Return Value:
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TRUE if AcpiInti found; otherwise FALSE.
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Inti - Global system interrupt input
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--*/
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController(BusInterruptLevel, &IoUnit, &RteNumber);
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// Make sure Inti is not out of range
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if (IoUnit == NULL) {
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return FALSE;
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}
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// It's in range, just give back the same value as was passed in
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*Inti = BusInterruptLevel;
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//
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// The Interrupt affinity is the intersection of the global affinity mask
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// (HalpDefaultInterruptAffinity) and any additional restrictions due to the
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// location of the Io Sapic (IoUnit->InterruptAffinity).
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//
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*InterruptAffinity = IoUnit->InterruptAffinity & HalpDefaultInterruptAffinity;
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return(TRUE);
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}
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ULONG
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HalpINTItoVector(
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ULONG Inti
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)
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// Returns the Vector associated with this global interrupt input
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// Vector is node and IDT entry
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController( Inti, &IoUnit, &RteNumber );
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ASSERT(IoUnit);
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return (IoUnit->Inti[RteNumber].GlobalVector);
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}
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VOID
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HalpSetINTItoVector(
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ULONG Inti,
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ULONG Vector
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)
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// Sets the vector for this global interrupt input
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// Vector is node and IDT entry
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController( Inti, &IoUnit, &RteNumber );
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ASSERT(IoUnit);
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// .Vector (IDTEntry) is set in SetRedirEntry
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IoUnit->Inti[RteNumber].GlobalVector = Vector;
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}
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VOID
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HalpSetRedirEntry (
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IN ULONG InterruptInput,
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IN ULONG Entry,
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IN USHORT ThisCpuApicID
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)
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/*++
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Routine Description:
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This procedure sets a IO Unit Redirection Table Entry
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Must be called with the HalpAccountingLock held
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Arguments:
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Return Value:
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None.
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--*/
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController( InterruptInput, &IoUnit, &RteNumber );
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ASSERT(IoUnit);
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ASSERT(IoUnit->Inti[RteNumber].GlobalVector);
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ASSERT((UCHAR)(IoUnit->Inti[RteNumber].GlobalVector) == (UCHAR)Entry);
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IoUnit->Inti[RteNumber].Vector = Entry;
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IoUnit->Inti[RteNumber].Destination = ThisCpuApicID << 16;
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IoUnit->FreeVectors[Entry >> 4] &= ~(1 << (Entry & 0x0F));
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IoUnit->IntrMethods->SetEntry(IoUnit, RteNumber);
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}
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VOID
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HalpWriteRedirEntry (
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IN ULONG GlobalInterrupt,
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IN UCHAR SapicVector,
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IN USHORT DestinationCPU,
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IN ULONG Flags,
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IN ULONG InterruptType
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)
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{
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ULONG rteNumber;
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PIO_INTR_CONTROL ioUnit;
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HalpInti2InterruptController( GlobalInterrupt, &ioUnit, &rteNumber );
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ASSERT(ioUnit);
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ioUnit->Inti[rteNumber].Vector = SapicVector;
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//
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// Set the delivery mode
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//
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switch (InterruptType) {
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case PLATFORM_INT_PMI:
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ioUnit->Inti[rteNumber].Vector &= ~INT_TYPE_MASK; // first clear the field
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ioUnit->Inti[rteNumber].Vector |= DELIVER_SMI;
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break;
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case PLATFORM_INT_CPE:
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ioUnit->Inti[rteNumber].Vector &= ~INT_TYPE_MASK; // first clear the field
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ioUnit->Inti[rteNumber].Vector |= DELIVER_LOW_PRIORITY;
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break;
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case PLATFORM_INT_INIT:
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ioUnit->Inti[rteNumber].Vector &= ~INT_TYPE_MASK; // first clear the field
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ioUnit->Inti[rteNumber].Vector |= DELIVER_INIT;
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break;
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}
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//
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// So we honor the flags passed into this function.
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//
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if (IS_LEVEL_TRIGGERED_MPS(Flags)) {
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ioUnit->Inti[rteNumber].Vector |= LEVEL_TRIGGERED;
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} else {
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ioUnit->Inti[rteNumber].Vector &= ~LEVEL_TRIGGERED;
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}
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if (IS_ACTIVE_LOW_MPS(Flags)) {
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ioUnit->Inti[rteNumber].Vector |= ACTIVE_LOW;
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} else {
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ioUnit->Inti[rteNumber].Vector &= ~ACTIVE_LOW;
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}
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ioUnit->Inti[rteNumber].Destination = DestinationCPU << 16;
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ioUnit->FreeVectors[SapicVector >> 4] &= ~(1 << (SapicVector & 0x0F));
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ioUnit->IntrMethods->SetEntry(ioUnit, rteNumber);
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} // HalpWriteRedirEntry()
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VOID
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HalpGetRedirEntry (
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IN ULONG InterruptInput,
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IN PULONG Entry,
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IN PULONG Destination
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)
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/*++
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Routine Description:
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Arguments:
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Return Value:
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None.
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--*/
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController( InterruptInput,&IoUnit,&RteNumber );
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ASSERT(IoUnit);
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*Entry = IoUnit->Inti[RteNumber].Vector;
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*Destination = IoUnit->Inti[RteNumber].Destination;
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}
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VOID
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HalpGetFreeVectors(
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IN ULONG InterruptInput,
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OUT PUSHORT *FreeVectors
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)
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{
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ULONG rteNumber;
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PIO_INTR_CONTROL ioUnit;
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HalpInti2InterruptController( InterruptInput, &ioUnit, &rteNumber );
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ASSERT(ioUnit);
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*FreeVectors = ioUnit->FreeVectors;
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}
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VOID
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HalpSetVectorAllocated(
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IN ULONG InterruptInput,
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IN UCHAR Vector
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)
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{
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ULONG rteNumber;
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PIO_INTR_CONTROL ioUnit;
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HalpInti2InterruptController( InterruptInput, &ioUnit, &rteNumber );
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ASSERT(ioUnit);
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ioUnit->FreeVectors[Vector >> 4] &= ~(1 << (Vector & 0xF));
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}
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VOID
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HalpEnableRedirEntry(
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IN ULONG InterruptInput
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)
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/*++
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Routine Description:
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This procedure enables a IO Unit Redirection Table Entry
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by setting the mask bit in the Redir Entry.
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Arguments:
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InterruptInput - The input line we're interested in
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Return Value:
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None.
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--*/
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController( InterruptInput, &IoUnit, &RteNumber );
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ASSERT(IoUnit);
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IoUnit->IntrMethods->EnableEntry(IoUnit, RteNumber);
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}
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VOID
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HalpDisableRedirEntry(
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IN ULONG InterruptInput
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)
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/*++
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Routine Description:
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This procedure disables a IO Unit Redirection Table Entry
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by setting the mask bit in the Redir Entry.
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Arguments:
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InterruptInput - The input line we're interested in
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Return Value:
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None.
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--*/
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController( InterruptInput, &IoUnit, &RteNumber );
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ASSERT(IoUnit);
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IoUnit->IntrMethods->MaskEntry(IoUnit, RteNumber);
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}
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VOID
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IoSapicMaskEntry(
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PIO_INTR_CONTROL IoUnit,
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ULONG RteNumber
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)
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{
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PIO_SAPIC_REGS IoSapicPtr = IoUnit->RegBaseVirtual;
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IoSapicPtr->RegisterSelect = RteNumber * 2 + IO_REDIR_00_LOW;
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IoSapicPtr->RegisterWindow |= INTERRUPT_MASKED;
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HalDebugPrint(( HAL_VERBOSE, "HAL: IoSapicMaskEntry - %d [%#p]: Dest=%#x Vec=%#x\n",
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RteNumber,IoSapicPtr,
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IoUnit->Inti[RteNumber].Destination,
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IoUnit->Inti[RteNumber].Vector
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));
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}
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VOID
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IoSapicEnableEntry(
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PIO_INTR_CONTROL IoUnit,
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ULONG RteNumber
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)
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{
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PIO_SAPIC_REGS IoSapicPtr = IoUnit->RegBaseVirtual;
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IoSapicPtr->RegisterSelect = RteNumber * 2 + IO_REDIR_00_LOW;
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IoSapicPtr->RegisterWindow &= (~INTERRUPT_MASKED);
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HalDebugPrint(( HAL_VERBOSE, "HAL: IoSapicEnableEntry: %d [%#p]: Dest=%#x Vec=%#x\n",
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RteNumber, IoSapicPtr,
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IoUnit->Inti[RteNumber].Destination,
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IoUnit->Inti[RteNumber].Vector
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));
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}
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VOID
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IoSapicSetEntry(
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PIO_INTR_CONTROL IoUnit,
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ULONG RteNumber
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)
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{
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PIO_SAPIC_REGS IoSapicPtr = IoUnit->RegBaseVirtual;
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ULONG RedirRegister;
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PULONG_PTR EoiValue;
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USHORT ApicId;
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// Only SetEntry sets the eoi table because set entry is the only
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// one that sets the destination CPU.
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EoiValue = (PULONG_PTR)(IoUnit->Inti[RteNumber].Vector & LEVEL_TRIGGERED ? &IoSapicPtr->Eoi : 0 );
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ApicId = (USHORT)((IoUnit->Inti[RteNumber].Destination & SAPIC_XID_MASK) >> SAPIC_XID_SHIFT);
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HalpWriteEOITable(
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IoUnit->Inti[RteNumber].Vector & INT_VECTOR_MASK,
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EoiValue,
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HalpGetProcessorNumberByApicId(ApicId));
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RedirRegister = RteNumber * 2 + IO_REDIR_00_LOW;
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IoSapicPtr->RegisterSelect = RedirRegister+1;
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IoSapicPtr->RegisterWindow = IoUnit->Inti[RteNumber].Destination;
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IoSapicPtr->RegisterSelect = RedirRegister;
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IoSapicPtr->RegisterWindow = IoUnit->Inti[RteNumber].Vector; // Enable
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HalDebugPrint(( HAL_VERBOSE, "HAL: IoSapicSetEntry: %d [%#p]: Dest=%#x Vec=%#x Eoi=%#p\n",
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RteNumber, IoSapicPtr,
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IoUnit->Inti[RteNumber].Destination,
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IoUnit->Inti[RteNumber].Vector,
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EoiValue
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));
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}
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BOOLEAN
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HalpIsActiveLow(
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ULONG Inti
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)
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController (
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Inti,&IoUnit,&RteNumber
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);
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return( (IoUnit->Inti[RteNumber].Vector & ACTIVE_LOW) == ACTIVE_LOW);
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}
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BOOLEAN
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HalpIsLevelTriggered(
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ULONG Inti
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)
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController (
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Inti,&IoUnit,&RteNumber
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);
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ASSERT(IoUnit);
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return( (IoUnit->Inti[RteNumber].Vector & LEVEL_TRIGGERED) == LEVEL_TRIGGERED);
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}
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VOID
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HalpSetPolarity(
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ULONG Inti,
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BOOLEAN ActiveLow
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)
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController (
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Inti,&IoUnit,&RteNumber
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);
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ASSERT(IoUnit);
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if (ActiveLow) {
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IoUnit->Inti[RteNumber].Vector |= ACTIVE_LOW;
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} else {
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IoUnit->Inti[RteNumber].Vector &= ~ACTIVE_LOW;
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}
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}
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VOID
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HalpSetLevel(
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ULONG Inti,
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BOOLEAN LevelTriggered
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)
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{
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PIO_INTR_CONTROL IoUnit;
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ULONG RteNumber;
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HalpInti2InterruptController (
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Inti,&IoUnit,&RteNumber
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);
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ASSERT(IoUnit);
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if (LevelTriggered) {
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IoUnit->Inti[RteNumber].Vector |= LEVEL_TRIGGERED;
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} else {
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IoUnit->Inti[RteNumber].Vector &= ~LEVEL_TRIGGERED;
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}
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}
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VOID
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HalpSpuriousHandler (
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IN PKINTERRUPT_ROUTINE Interrupt,
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IN PKTRAP_FRAME TrapFrame
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)
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/*++
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Routine Description:
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Spurious Interrupt handler. Dummy return or we can count number of
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occurance of spurious interrupts. Right now, we will do a dummy return.
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Arguements:
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Return Parameters:
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--*/
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{
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}
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