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569 lines
17 KiB
569 lines
17 KiB
/*++
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Copyright (c) 1991-2000 Microsoft Corporation
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Module Name:
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ixinfo.c
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Abstract:
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Author:
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Ken Reneris (kenr) 08-Aug-1994
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Environment:
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Kernel mode only.
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Revision History:
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--*/
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#include "halp.h"
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#include "pci.h"
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#include "pcip.h"
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#ifdef _PNP_POWER_
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HAL_CALLBACKS HalCallback;
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extern WCHAR rgzSuspendCallbackName[];
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VOID
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HalInitSystemPhase2 (
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VOID
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);
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VOID
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HalpLockSuspendCode (
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IN PVOID CallbackContext,
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IN PVOID Argument1,
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IN PVOID Argument2
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);
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#endif
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NTSTATUS
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HalpQueryInstalledBusInformation (
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OUT PVOID Buffer,
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IN ULONG BufferLength,
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OUT PULONG ReturnedLength
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);
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(PAGE,HaliQuerySystemInformation)
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#pragma alloc_text(PAGE,HaliSetSystemInformation)
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#pragma alloc_text(INIT,HalInitSystemPhase2)
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#ifdef _PNP_POWER_
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#pragma alloc_text(PAGE,HalpLockSuspendCode)
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#endif
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#endif
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//
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// HalQueryMcaInterface
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//
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VOID
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HalpMcaLockInterface(
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VOID
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);
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VOID
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HalpMcaUnlockInterface(
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VOID
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);
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NTSTATUS
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HalpMcaReadRegisterInterface(
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IN UCHAR BankNumber,
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IN OUT PMCA_EXCEPTION Exception
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);
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#ifdef ACPI_HAL
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extern PHYSICAL_ADDRESS HalpMaxHotPlugMemoryAddress;
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#endif
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#if defined(ACPI_HAL) && defined(_HALPAE_) && !defined(NT_UP)
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extern PVOID HalpAcpiSrat;
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NTSTATUS
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HalpGetAcpiStaticNumaTopology(
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HAL_NUMA_TOPOLOGY_INTERFACE * NumaInfo
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);
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#endif
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HAL_AMLI_BAD_IO_ADDRESS_LIST BadIOAddrList[] =
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{
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{0x000, 0x10, 0x1, NULL }, // ISA DMA
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{0x020, 0x2, 0x0, NULL }, // PIC
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{0x040, 0x4, 0x1, NULL }, // Timer1, Referesh, Speaker, Control Word
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{0x048, 0x4, 0x1, NULL }, // Timer2, Failsafe
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{0x070, 0x2, 0x1, NULL }, // Cmos/NMI enable
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{0x074, 0x3, 0x1, NULL }, // Extended Cmos
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{0x081, 0x3, 0x1, NULL }, // DMA
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{0x087, 0x1, 0x1, NULL }, // DMA
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{0x089, 0x1, 0x1, NULL }, // DMA
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{0x08a, 0x2, 0x1, NULL }, // DMA
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{0x08f, 0x1, 0x1, NULL }, // DMA
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{0x090, 0x2, 0x1, NULL }, // Arbritration Control Port, Card Select Feedback
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{0x093, 0x2, 0x1, NULL }, // Reserved, System board setup
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{0x096, 0x2, 0x1, NULL }, // POS channel select
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{0x0A0, 0x2, 0x0, NULL }, // Cascaded PIC
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{0x0C0, 0x20, 0x1, NULL }, // ISA DMA
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{0x4D0, 0x2, 0x0, NULL }, // Edge, level control registers for PIC
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{0xCF8, 0x8, 0x1, &HaliHandlePCIConfigSpaceAccess}, // PCI Config Space Access Pair
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{0x0, 0x0, 0x0, NULL }
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};
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VOID
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HalInitSystemPhase2 (
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VOID
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)
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{
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#ifdef _PNP_POWER_
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OBJECT_ATTRIBUTES ObjectAttributes;
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NTSTATUS Status;
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UNICODE_STRING unicodeString;
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PCALLBACK_OBJECT CallbackObject;
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//
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// Create hal callbacks
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//
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InitializeObjectAttributes(
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&ObjectAttributes,
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NULL,
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OBJ_CASE_INSENSITIVE,
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NULL,
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NULL
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);
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ExCreateCallback (&HalCallback.SetSystemInformation, &ObjectAttributes, TRUE, TRUE);
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ExCreateCallback (&HalCallback.BusCheck, &ObjectAttributes, TRUE, TRUE);
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//
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// Connect to suspend callback to lock hal hibaration code
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//
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RtlInitUnicodeString(&unicodeString, rgzSuspendCallbackName);
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InitializeObjectAttributes(
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&ObjectAttributes,
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&unicodeString,
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OBJ_CASE_INSENSITIVE,
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NULL,
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NULL
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);
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Status = ExCreateCallback (&CallbackObject, &ObjectAttributes, FALSE, FALSE);
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if (NT_SUCCESS(Status)) {
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ExRegisterCallback (
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CallbackObject,
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HalpLockSuspendCode,
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NULL
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);
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ObDereferenceObject (CallbackObject);
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}
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#endif
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}
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NTSTATUS
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HaliQuerySystemInformation(
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IN HAL_QUERY_INFORMATION_CLASS InformationClass,
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IN ULONG BufferSize,
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OUT PVOID Buffer,
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OUT PULONG ReturnedLength
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)
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{
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NTSTATUS Status;
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PVOID InternalBuffer;
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ULONG Length;
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union {
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HAL_POWER_INFORMATION PowerInf;
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HAL_PROCESSOR_SPEED_INFORMATION ProcessorInf;
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MCA_EXCEPTION McaException;
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HAL_ERROR_INFO ErrorInfo;
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HAL_DISPLAY_BIOS_INFORMATION DisplayBiosInf;
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} U;
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BOOLEAN bUseFrameBufferCaching;
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PAGED_CODE();
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Status = STATUS_SUCCESS;
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*ReturnedLength = 0;
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Length = 0;
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switch (InformationClass) {
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#ifndef ACPI_HAL
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case HalInstalledBusInformation:
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Status = HalpQueryInstalledBusInformation (
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Buffer,
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BufferSize,
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ReturnedLength
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);
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break;
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#endif
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case HalFrameBufferCachingInformation:
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// Note - we want to return TRUE here to enable USWC in all
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// cases except in a "Shared Memory Cluster" machine.
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bUseFrameBufferCaching = TRUE;
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InternalBuffer = &bUseFrameBufferCaching;
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Length = sizeof (BOOLEAN);
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break;
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case HalMcaLogInformation:
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case HalCmcLogInformation:
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InternalBuffer = &U.McaException;
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Status = HalpGetMcaLog ((PMCA_EXCEPTION)Buffer,
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BufferSize,
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ReturnedLength);
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break;
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case HalErrorInformation:
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InternalBuffer = &U.ErrorInfo;
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Length = sizeof(HAL_ERROR_INFO);
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U.ErrorInfo.Version = ((PHAL_ERROR_INFO)Buffer)->Version;
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Status = HalpGetMceInformation( &U.ErrorInfo, &Length );
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break;
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case HalDisplayBiosInformation:
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InternalBuffer = &U.DisplayBiosInf;
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Length = sizeof(U.DisplayBiosInf);
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U.DisplayBiosInf = HalpGetDisplayBiosInformation ();
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break;
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#ifdef _PNP_POWER_
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case HalPowerInformation:
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RtlZeroMemory (&U.PowerInf, sizeof(HAL_POWER_INFORMATION));
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InternalBuffer = &U.PowerInf;
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Length = sizeof (HAL_POWER_INFORMATION);
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break;
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case HalProcessorSpeedInformation:
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RtlZeroMemory (&U.ProcessorInf, sizeof(HAL_POWER_INFORMATION));
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U.ProcessorInf.MaximumProcessorSpeed = 100;
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U.ProcessorInf.CurrentAvailableSpeed = 100;
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U.ProcessorInf.ConfiguredSpeedLimit = 100;
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InternalBuffer = &U.PowerInf;
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Length = sizeof (HAL_PROCESSOR_SPEED_INFORMATION);
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break;
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case HalCallbackInformation:
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InternalBuffer = &HalCallback;
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Length = sizeof (HAL_CALLBACKS);
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break;
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#endif
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#if defined(_HALPAE_) && !defined(NT_UP)
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case HalNumaTopologyInterface:
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if ((BufferSize == sizeof(HAL_NUMA_TOPOLOGY_INTERFACE)) &&
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(HalPaeEnabled() == TRUE)) {
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Status = STATUS_INVALID_LEVEL;
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#if defined(ACPI_HAL)
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if (HalpAcpiSrat) {
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Status = HalpGetAcpiStaticNumaTopology(Buffer);
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if (NT_SUCCESS(Status)) {
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*ReturnedLength = sizeof(HAL_NUMA_TOPOLOGY_INTERFACE);
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}
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break;
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}
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#endif
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} else {
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//
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// Buffer size is wrong, we could return valid data
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// if the buffer is too big,.... but instead we will
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// use this as an indication that we're not compatible
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// with the kernel.
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//
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Status = STATUS_INFO_LENGTH_MISMATCH;
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}
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break;
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#endif
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#if 0
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//
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// [ChuckL 2002/08/12] This code was used by the kernel to read MCA information
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// from a previous bugcheck and write it to the event log. This is now done
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// through WMI, so this code is disabled.
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//
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case HalQueryMcaInterface:
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if (BufferSize == sizeof(HAL_MCA_INTERFACE)) {
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HAL_MCA_INTERFACE *McaInterface;
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McaInterface = (HAL_MCA_INTERFACE *)Buffer;
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McaInterface->Lock = HalpMcaLockInterface;
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McaInterface->Unlock = HalpMcaUnlockInterface;
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McaInterface->ReadRegister = HalpMcaReadRegisterInterface;
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*ReturnedLength = sizeof(HAL_MCA_INTERFACE);
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Status = STATUS_SUCCESS;
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} else {
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Status = STATUS_INFO_LENGTH_MISMATCH;
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}
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break;
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#endif
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#if defined(_AMD64_)
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case HalProfileSourceInformation:
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Status = HalpQueryProfileInformation(InformationClass,
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BufferSize,
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Buffer,
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ReturnedLength);
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break;
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#endif
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case HalQueryMaxHotPlugMemoryAddress:
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if (BufferSize == sizeof(PHYSICAL_ADDRESS)) {
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#ifdef ACPI_HAL
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*((PPHYSICAL_ADDRESS) Buffer) = HalpMaxHotPlugMemoryAddress;
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*ReturnedLength = sizeof(PHYSICAL_ADDRESS);
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Status = STATUS_SUCCESS;
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#else
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Status = STATUS_NOT_IMPLEMENTED;
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#endif
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} else {
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Status = STATUS_INFO_LENGTH_MISMATCH;
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}
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break;
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case HalQueryAMLIIllegalIOPortAddresses:
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{
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static HAL_AMLI_BAD_IO_ADDRESS_LIST BadIOAddrList[] =
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{
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{0x000, 0x10, 0x1, NULL }, // ISA DMA
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{0x020, 0x2, 0x0, NULL }, // PIC
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{0x040, 0x4, 0x1, NULL }, // Timer1, Referesh, Speaker, Control Word
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{0x048, 0x4, 0x1, NULL }, // Timer2, Failsafe
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{0x070, 0x2, 0x1, NULL }, // Cmos/NMI enable
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{0x074, 0x3, 0x1, NULL }, // Extended Cmos
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{0x081, 0x3, 0x1, NULL }, // DMA
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{0x087, 0x1, 0x1, NULL }, // DMA
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{0x089, 0x1, 0x1, NULL }, // DMA
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{0x08a, 0x2, 0x1, NULL }, // DMA
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{0x08f, 0x1, 0x1, NULL }, // DMA
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{0x090, 0x2, 0x1, NULL }, // Arbritration Control Port, Card Select Feedback
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{0x093, 0x2, 0x1, NULL }, // Reserved, System board setup
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{0x096, 0x2, 0x1, NULL }, // POS channel select
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{0x0A0, 0x2, 0x0, NULL }, // Cascaded PIC
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{0x0C0, 0x20, 0x1, NULL }, // ISA DMA
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{0x4D0, 0x2, 0x0, NULL }, // Edge, level control registers for PIC
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{0xCF8, 0x8, 0x1, &HaliHandlePCIConfigSpaceAccess}, // PCI Config Space Access Pair
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{0x0, 0x0, 0x0, NULL }
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};
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if(BufferSize < sizeof(BadIOAddrList))
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{
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*ReturnedLength = sizeof(BadIOAddrList);
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Status = STATUS_INFO_LENGTH_MISMATCH;
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}
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else
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{
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Length = sizeof(BadIOAddrList);
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InternalBuffer = BadIOAddrList;
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Status = STATUS_SUCCESS;
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}
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break;
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}
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default:
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Status = STATUS_INVALID_LEVEL;
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break;
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}
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//
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// If non-zero Length copy data to callers buffer
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//
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if (Length) {
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if (BufferSize < Length) {
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Length = BufferSize;
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}
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*ReturnedLength = Length;
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RtlCopyMemory (Buffer, InternalBuffer, Length);
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}
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return Status;
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}
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NTSTATUS
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HaliSetSystemInformation (
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IN HAL_SET_INFORMATION_CLASS InformationClass,
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IN ULONG BufferSize,
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IN PVOID Buffer
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)
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{
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NTSTATUS Status;
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PAGED_CODE();
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Status = STATUS_SUCCESS;
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switch (InformationClass) {
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case HalKernelErrorHandler:
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Status = HalpMceRegisterKernelDriver( (PKERNEL_ERROR_HANDLER_INFO) Buffer, BufferSize );
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break;
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case HalMcaRegisterDriver:
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Status = HalpMcaRegisterDriver(
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(PMCA_DRIVER_INFO) Buffer // Info about registering driver
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);
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break;
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default:
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Status = STATUS_INVALID_LEVEL;
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break;
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}
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return Status;
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}
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#ifdef _PNP_POWER_
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VOID
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HalpLockSuspendCode (
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IN PVOID CallbackContext,
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IN PVOID Argument1,
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IN PVOID Argument2
|
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)
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{
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static PVOID CodeLock;
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switch ((ULONG) Argument1) {
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case 0:
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//
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// Lock code down which might be needed to perform a suspend
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//
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ASSERT (CodeLock == NULL);
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CodeLock = MmLockPagableCodeSection (&HaliSuspendHibernateSystem);
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break;
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case 1:
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//
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// Release the code lock
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//
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MmUnlockPagableImageSection (CodeLock);
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CodeLock = NULL;
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break;
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}
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}
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#endif
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|
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/*** HaliHandlePCIConfigSpaceAccess - Check to see if the Firmware is attempting to
|
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* access to PCI Config space. If so, intercept
|
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* the read/write call and do it using HAL API's.
|
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* This way we can make these calls sync.
|
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*
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* ENTRY
|
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* BOOLEAN Read - TRUE iff read
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* ULONG Addr - Address to do the operation on
|
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* ULONG Size - Size of data
|
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* PULONG pData - Pointer to the data buffer.
|
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*
|
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* EXIT
|
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* STATUS_SUCCESS if we do the PCI config space access.
|
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*/
|
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NTSTATUS HaliHandlePCIConfigSpaceAccess( BOOLEAN Read,
|
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ULONG Addr,
|
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ULONG Size,
|
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PULONG pData
|
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)
|
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{
|
|
static PCI_TYPE1_CFG_BITS CF8_Data = {0};
|
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static BOOLEAN CF8_Called = FALSE;
|
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NTSTATUS Status = STATUS_SUCCESS;
|
|
|
|
if(Addr == 0xCF8)
|
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{
|
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CF8_Data.u.AsULONG = *pData;
|
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CF8_Called = TRUE;
|
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}
|
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else if(Addr >= 0xCFC && Addr <= 0xCFF)
|
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{
|
|
if(CF8_Called)
|
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{
|
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ULONG Offset = 0;
|
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ULONG Return = 0;
|
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PCI_SLOT_NUMBER SlotNumber = {0};
|
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|
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Offset = (CF8_Data.u.bits.RegisterNumber << 2) + (Addr - 0xCFC);
|
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SlotNumber.u.bits.FunctionNumber = CF8_Data.u.bits.FunctionNumber;
|
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SlotNumber.u.bits.DeviceNumber = CF8_Data.u.bits.DeviceNumber;
|
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|
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if (Read)
|
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{
|
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//
|
|
// Do PCI config space read through HAL
|
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//
|
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Return = HaliPciInterfaceReadConfig( NULL,
|
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(UCHAR)CF8_Data.u.bits.BusNumber,
|
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SlotNumber.u.AsULONG,
|
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pData,
|
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Offset,
|
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Size
|
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);
|
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|
|
|
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}
|
|
else
|
|
{
|
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//
|
|
// Do PCI config space write through HAL
|
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//
|
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Return = HaliPciInterfaceWriteConfig( NULL,
|
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(UCHAR)CF8_Data.u.bits.BusNumber,
|
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SlotNumber.u.AsULONG,
|
|
pData,
|
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Offset,
|
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Size
|
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);
|
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|
|
|
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}
|
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|
|
}
|
|
else
|
|
{
|
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Status = STATUS_UNSUCCESSFUL;
|
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}
|
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|
|
}
|
|
else
|
|
{
|
|
Status = STATUS_UNSUCCESSFUL;
|
|
}
|
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|
|
return Status;
|
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|
|
}
|
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|