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1305 lines
26 KiB
1305 lines
26 KiB
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/**
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*** Copyright (C) 1996-97 Intel Corporation. All rights reserved.
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***
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*** The information and source code contained herein is the exclusive
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*** property of Intel Corporation and may not be disclosed, examined
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*** or reproduced in whole or in part without explicit written authorization
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*** from the company.
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**/
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/*++ BUILD Version: 0001 // Increment this if a change has global effects
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Copyright (c) 1991 Microsoft Corporation
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Module Name:
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halp.h
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Abstract:
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This header file defines the private Hardware Architecture Layer (HAL)
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interfaces, defines and structures.
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Author:
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John Vert (jvert) 11-Feb-92
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Revision History:
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--*/
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#ifndef _HALP_H_
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#define _HALP_H_
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//
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// ignore some warning for public headers.
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//
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#pragma warning(disable:4214) // bit field types other than int
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#pragma warning(disable:4201) // nameless struct/union
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#pragma warning(disable:4115) // named type definition in parentheses
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#include "nthal.h"
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#include "hal.h"
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#define IPI_VECTOR 0xE1
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#include "halnls.h"
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#if 0
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#ifndef _HALI_
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#include "..\inc\hali.h"
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#endif
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#endif
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#define HAL_MAXIMUM_PROCESSOR 0x20
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/*
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* Default clock and profile timer intervals (in 100ns-unit)
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*/
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#define DEFAULT_CLOCK_INTERVAL 100000 // 10 ms
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#define MINIMUM_CLOCK_INTERVAL 10000 // 1 ms
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#define MAXIMUM_CLOCK_INTERVAL 100000 // 10 ms
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//
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// Define Realtime Clock register numbers.
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//
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#define RTC_SECOND 0 // second of minute [0..59]
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#define RTC_SECOND_ALARM 1 // seconds to alarm
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#define RTC_MINUTE 2 // minute of hour [0..59]
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#define RTC_MINUTE_ALARM 3 // minutes to alarm
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#define RTC_HOUR 4 // hour of day [0..23]
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#define RTC_HOUR_ALARM 5 // hours to alarm
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#define RTC_DAY_OF_WEEK 6 // day of week [1..7]
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#define RTC_DAY_OF_MONTH 7 // day of month [1..31]
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#define RTC_MONTH 8 // month of year [1..12]
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#define RTC_YEAR 9 // year [00..99]
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#define RTC_CONTROL_REGISTERA 10 // control register A
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#define RTC_CONTROL_REGISTERB 11 // control register B
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#define RTC_CONTROL_REGISTERC 12 // control register C
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#define RTC_CONTROL_REGISTERD 13 // control register D
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#define RTC_REGNUMBER_RTC_CR1 0x6A // control register 1
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#define RTC_ISA_ADDRESS_PORT 0x070
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#define RTC_ISA_DATA_PORT 0x071
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extern PVOID HalpRtcAddressPort;
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extern PVOID HalpRtcDataPort;
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extern PLOADER_PARAMETER_BLOCK KeLoaderBlock;
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//
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// Define Control Register A structure.
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//
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typedef struct _RTC_CONTROL_REGISTER_A {
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UCHAR RateSelect : 4;
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UCHAR TimebaseDivisor : 3;
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UCHAR UpdateInProgress : 1;
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} RTC_CONTROL_REGISTER_A, *PRTC_CONTROL_REGISTER_A;
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//
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// Define Control Register B structure.
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//
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typedef struct _RTC_CONTROL_REGISTER_B {
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UCHAR DayLightSavingsEnable : 1;
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UCHAR HoursFormat : 1;
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UCHAR DataMode : 1;
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UCHAR SquareWaveEnable : 1;
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UCHAR UpdateInterruptEnable : 1;
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UCHAR AlarmInterruptEnable : 1;
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UCHAR TimerInterruptEnable : 1;
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UCHAR SetTime : 1;
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} RTC_CONTROL_REGISTER_B, *PRTC_CONTROL_REGISTER_B;
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//
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// Define Control Register C structure.
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//
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typedef struct _RTC_CONTROL_REGISTER_C {
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UCHAR Fill : 4;
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UCHAR UpdateInterruptFlag : 1;
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UCHAR AlarmInterruptFlag : 1;
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UCHAR TimeInterruptFlag : 1;
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UCHAR InterruptRequest : 1;
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} RTC_CONTROL_REGISTER_C, *PRTC_CONTROL_REGISTER_C;
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//
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// Define Control Register D structure.
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//
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typedef struct _RTC_CONTROL_REGISTER_D {
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UCHAR Fill : 7;
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UCHAR ValidTime : 1;
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} RTC_CONTROL_REGISTER_D, *PRTC_CONTROL_REGISTER_D;
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#define EISA_DMA_CHANNELS 8
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extern UCHAR HalpDmaChannelMasks[];
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//
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// HalpOwnedDisplayBeforeSleep is defined in mpdat.c
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//
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extern BOOLEAN HalpOwnedDisplayBeforeSleep;
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#define PIC_VECTORS 16
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#define PRIMARY_VECTOR_BASE 0x30
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#ifndef NEC_98
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#define PIC_SLAVE_IRQ 2
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#define PIC_SLAVE_REDIRECT 9
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#else
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#define PIC_SLAVE_IRQ 7
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#define PIC_SLAVE_REDIRECT 8
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#endif //NEC_98
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extern PVOID HalpSleepPageLock;
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KIRQL
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KfAcquireSpinLock (
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PKSPIN_LOCK SpinLock
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);
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VOID
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KfReleaseSpinLock (
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IN PKSPIN_LOCK SpinLock,
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IN KIRQL NewIrql
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);
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VOID
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KeSetAffinityThread (
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PKTHREAD Thread,
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KAFFINITY HalpActiveProcessors
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);
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KIRQL
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KfRaiseIrql (
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KIRQL NewIrql
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);
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VOID
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KfLowerIrql (
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KIRQL NewIrql
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);
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extern BOOLEAN
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KdPollBreakIn (
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VOID
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);
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VOID
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HalpSavePicState (
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VOID
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);
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VOID
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HalpSaveDmaControllerState (
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VOID
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);
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NTSTATUS
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HalAllocateAdapterChannel (
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IN PADAPTER_OBJECT AdapterObject,
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IN PWAIT_CONTEXT_BLOCK Wcb,
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IN ULONG NumberOfMapRegisters,
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IN PDRIVER_CONTROL ExecutionRoutine
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);
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ULONG
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HalReadDmaCounter (
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IN PADAPTER_OBJECT AdapterObject
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);
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VOID
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HalpSaveTimerState (
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VOID
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);
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VOID
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HalpRestorePicState (
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VOID
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);
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VOID
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HalpRestoreDmaControllerState (
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VOID
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);
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VOID
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HalpRestoreTimerState (
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VOID
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);
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BOOLEAN
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HalpIoSapicInitialize (
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VOID
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);
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BOOLEAN
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IsPsrDtOn (
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VOID
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);
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BOOLEAN
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HalpIoSapicConnectInterrupt (
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KIRQL Irql,
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IN ULONG Vector
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);
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NTSTATUS
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HalacpiGetInterruptTranslator(
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IN INTERFACE_TYPE ParentInterfaceType,
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IN ULONG ParentBusNumber,
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IN INTERFACE_TYPE BridgeInterfaceType,
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IN USHORT Size,
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IN USHORT Version,
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OUT PTRANSLATOR_INTERFACE Translator,
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OUT PULONG BridgeBusNumber
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);
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#ifdef notyet
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typedef struct {
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UCHAR MasterMask;
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UCHAR SlaveMask;
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UCHAR MasterEdgeLevelControl;
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UCHAR SlaveEdgeLevelControl;
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} PIC_CONTEXT, *PPIC_CONTEXT;
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#define EISA_DMA_CHANNELS 8
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typedef struct {
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UCHAR Dma1ExtendedModePort;
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UCHAR Dma2ExtendedModePort;
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DMA1_CONTROL Dma1Control;
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DMA2_CONTROL Dma2Control;
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} DMA_CONTEXT, *PDMA_CONTEXT;
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typedef struct {
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UCHAR nothing;
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} TIMER_CONTEXT, *PTIMER_CONTEXT;
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typedef struct {
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PIC_CONTEXT PicState;
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DMA_CONTEXT DmaState;
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} MOTHERBOARD_CONTEXT, *PMOTHERBOARD_CONTEXT;
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extern MOTHERBOARD_CONTEXT HalpMotherboardState;
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extern UCHAR HalpDmaChannelModes[];
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extern PVOID HalpSleepPageLock;
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extern UCHAR HalpDmaChannelMasks[];
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extern BOOLEAN HalpOwnedDisplayBeforeSleep;
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#endif //notyet
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VOID
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HalpGetProcessorIDs (
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VOID
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);
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VOID
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HalpInitializeInterrupts (
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VOID
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);
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VOID
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HalInitializeProcessor (
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ULONG Number,
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PLOADER_PARAMETER_BLOCK LoaderBlock
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);
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VOID
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HalpGetParameters (
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IN PLOADER_PARAMETER_BLOCK LoaderBlock
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);
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VOID
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HalpClearClock (
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VOID
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);
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VOID
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HalpClockInterrupt (
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IN PKINTERRUPT_ROUTINE Interrupt,
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IN PKTRAP_FRAME TrapFrame
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);
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VOID
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HalpClockInterruptPn(
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IN PKINTERRUPT_ROUTINE Interrupt,
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IN PKTRAP_FRAME TrapFrame
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);
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UCHAR
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HalpReadClockRegister (
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UCHAR Register
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);
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VOID
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HalpWriteClockRegister (
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UCHAR Register,
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UCHAR Value
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);
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// extern VOID
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// HalpProfileInterrupt (
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// IN PKTRAP_FRAME TrapFrame
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// );
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ULONGLONG
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HalpReadIntervalTimeCounter (
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VOID
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);
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VOID
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HalpProgramIntervalTimerVector(
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ULONGLONG IntervalTimerVector
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);
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VOID
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HalpClearITC (
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VOID );
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VOID
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HalpInitializeClock (
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VOID
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);
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VOID
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HalpInitializeClockPn (
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VOID
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);
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VOID
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HalpInitializeClockInterrupts(
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VOID
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);
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VOID
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HalpSetInitialClockRate (
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VOID
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);
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VOID
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HalpInitializeTimerResolution (
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ULONG Rate
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);
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VOID
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HalpUpdateITM (
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IN ULONGLONG NewITMValue
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);
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VOID
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HalpSendIPI (
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IN USHORT ProcessorID,
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IN ULONGLONG Data
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);
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VOID
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HalpOSRendez (
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IN USHORT ProcessorID
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);
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//
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// Prototype for system bus handlers
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//
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NTSTATUS
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HalpQuerySimBusSlots (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN ULONG BufferSize,
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OUT PULONG SlotNumbers,
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OUT PULONG ReturnedLength
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);
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ULONG
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HalpGetSimBusInterruptVector (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
|
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IN ULONG BusInterruptLevel,
|
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IN ULONG BusInterruptVector,
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OUT PKIRQL Irql,
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OUT PKAFFINITY Affinity
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);
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BOOLEAN
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HalpTranslateSimBusAddress (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN PHYSICAL_ADDRESS BusAddress,
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IN OUT PULONG AddressSpace,
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OUT PPHYSICAL_ADDRESS TranslatedAddress
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);
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VOID
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HalpRegisterSimBusHandler (
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VOID
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);
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ULONG
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HalpGetSimBusData(
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN ULONG SlotNumber,
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IN PVOID Buffer,
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IN ULONG Offset,
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IN ULONG Length
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);
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|
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ULONG
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HalpSetSimBusData(
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
|
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IN ULONG SlotNumber,
|
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IN PVOID Buffer,
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IN ULONG Offset,
|
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IN ULONG Length
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);
|
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|
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NTSTATUS
|
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HalpAssignSimBusSlotResources (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN PUNICODE_STRING RegistryPath,
|
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IN PUNICODE_STRING DriverClassName OPTIONAL,
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IN PDRIVER_OBJECT DriverObject,
|
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IN PDEVICE_OBJECT DeviceObject OPTIONAL,
|
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IN ULONG SlotNumber,
|
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IN OUT PCM_RESOURCE_LIST *AllocatedResources
|
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);
|
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|
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NTSTATUS
|
|
HalpAdjustSimBusResourceList (
|
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IN PBUS_HANDLER BusHandler,
|
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IN PBUS_HANDLER RootHandler,
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IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList
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);
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|
|
PDEVICE_HANDLER_OBJECT
|
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HalpReferenceSimDeviceHandler (
|
|
IN PBUS_HANDLER BusHandler,
|
|
IN PBUS_HANDLER RootHandler,
|
|
IN ULONG SlotNumber
|
|
);
|
|
|
|
NTSTATUS
|
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HalpSimDeviceControl (
|
|
IN PHAL_DEVICE_CONTROL_CONTEXT Context
|
|
);
|
|
|
|
ULONG
|
|
HalGetDeviceData (
|
|
IN PBUS_HANDLER BusHandler,
|
|
IN PBUS_HANDLER RootHandler,
|
|
IN PDEVICE_HANDLER_OBJECT DeviceHandler,
|
|
IN ULONG DataType,
|
|
IN PVOID Buffer,
|
|
IN ULONG Offset,
|
|
IN ULONG Length
|
|
);
|
|
|
|
ULONG
|
|
HalSetDeviceData (
|
|
IN PBUS_HANDLER BusHandler,
|
|
IN PBUS_HANDLER RootHandler,
|
|
IN PDEVICE_HANDLER_OBJECT DeviceHandler,
|
|
IN ULONG DataType,
|
|
IN PVOID Buffer,
|
|
IN ULONG Offset,
|
|
IN ULONG Length
|
|
);
|
|
|
|
NTSTATUS
|
|
HalpHibernateHal (
|
|
IN PBUS_HANDLER BusHandler,
|
|
IN PBUS_HANDLER RootHandler
|
|
);
|
|
|
|
NTSTATUS
|
|
HalpResumeHal (
|
|
IN PBUS_HANDLER BusHandler,
|
|
IN PBUS_HANDLER RootHandler
|
|
);
|
|
|
|
|
|
ULONG
|
|
HalpGetFeatureBits (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpInitMP(
|
|
IN ULONG Phase,
|
|
IN PLOADER_PARAMETER_BLOCK LoaderBlock
|
|
);
|
|
|
|
#ifdef RtlMoveMemory
|
|
#undef RtlMoveMemory
|
|
#undef RtlCopyMemory
|
|
#undef RtlFillMemory
|
|
#undef RtlZeroMemory
|
|
|
|
#define RtlCopyMemory(Destination,Source,Length) RtlMoveMemory((Destination),(Source),(Length))
|
|
VOID
|
|
RtlMoveMemory (
|
|
PVOID Destination,
|
|
CONST VOID *Source,
|
|
ULONG Length
|
|
);
|
|
|
|
VOID
|
|
RtlFillMemory (
|
|
PVOID Destination,
|
|
ULONG Length,
|
|
UCHAR Fill
|
|
);
|
|
|
|
VOID
|
|
RtlZeroMemory (
|
|
PVOID Destination,
|
|
ULONG Length
|
|
);
|
|
|
|
#endif
|
|
|
|
|
|
#if 0
|
|
#include "ixisa.h"
|
|
#endif
|
|
|
|
//
|
|
// Define map register translation entry structure.
|
|
//
|
|
|
|
typedef struct _TRANSLATION_ENTRY {
|
|
PVOID VirtualAddress;
|
|
ULONG PhysicalAddress;
|
|
ULONG Index;
|
|
} TRANSLATION_ENTRY, *PTRANSLATION_ENTRY;
|
|
|
|
//
|
|
//
|
|
|
|
|
|
typedef struct _PcMpIoApicEntry {
|
|
UCHAR EntryType;
|
|
UCHAR IoApicId;
|
|
UCHAR IoApicVersion;
|
|
UCHAR IoApicFlag;
|
|
PVOID IoApicAddress;
|
|
} PCMPIOAPIC, *PPCMPIOAPIC;
|
|
|
|
//
|
|
// MP_INFO is defined in pcmp_nt.inc
|
|
//
|
|
|
|
// typedef struct _MP_INFO {
|
|
// ULONG ApicVersion; // 82489Dx or Not
|
|
// ULONG ProcessorCount; // Number of Enabled Processors
|
|
// ULONG NtProcessors; // Number of Running Processors
|
|
// ULONG BusCount; // Number of buses in system
|
|
// ULONG IOApicCount; // Number of Io Apics in system
|
|
// ULONG IntiCount; // Number of Io Apic interrupt input entries
|
|
// ULONG LintiCount; // Number of Local Apic interrupt input entries
|
|
// ULONG IMCRPresent; // Indicates if the IMCR is present
|
|
// ULONG LocalApicBase; // Base of local APIC
|
|
// PULONG IoApicBase; // The virtual addresses of the IoApic
|
|
// PPCMPIOAPIC IoApicEntryPtr; // Ptr to 1st PC+MP IoApic entry
|
|
// ULONG IoApicPhys[]; // The physical addresses of the IoApi
|
|
|
|
//}MP_INFO, *PMP_INFO;
|
|
|
|
|
|
extern USHORT LOCAL_ID[];
|
|
|
|
#define VECTOR_SIZE 8
|
|
#define IPI_ID_SHIFT 4
|
|
#define IpiTOKEN_SHIFT 20
|
|
#define IpiTOKEN 0xFFE
|
|
|
|
#define EID_MASK 0xFF00
|
|
|
|
#define OS_RENDEZ_VECTOR 0x11
|
|
|
|
#define RENDEZ_TIME_OUT 0X0FFFFFFFF
|
|
|
|
//
|
|
// Some devices require a phyicially contiguous data buffers for DMA transfers.
|
|
// Map registers are used give the appearance that all data buffers are
|
|
// contiguous. In order to pool all of the map registers a master
|
|
// adapter object is used. This object is allocated and saved internal to this
|
|
// file. It contains a bit map for allocation of the registers and a queue
|
|
// for requests which are waiting for more map registers. This object is
|
|
// allocated during the first request to allocate an adapter which requires
|
|
// map registers.
|
|
//
|
|
// In this system, the map registers are translation entries which point to
|
|
// map buffers. Map buffers are physically contiguous and have physical memory
|
|
// addresses less than 0x01000000. All of the map registers are allocated
|
|
// initialially; however, the map buffers are allocated base in the number of
|
|
// adapters which are allocated.
|
|
//
|
|
// If the master adapter is NULL in the adapter object then device does not
|
|
// require any map registers.
|
|
//
|
|
|
|
extern PADAPTER_OBJECT MasterAdapterObject;
|
|
|
|
extern POBJECT_TYPE *IoAdapterObjectType;
|
|
|
|
extern BOOLEAN LessThan16Mb;
|
|
|
|
extern BOOLEAN HalpEisaDma;
|
|
|
|
//
|
|
// Map buffer prameters. These are initialized in HalInitSystem
|
|
//
|
|
|
|
extern PHYSICAL_ADDRESS HalpMapBufferPhysicalAddress;
|
|
extern ULONG HalpMapBufferSize;
|
|
|
|
extern ULONG HalpBusType;
|
|
extern ULONG HalpCpuType;
|
|
extern UCHAR HalpSerialLen;
|
|
extern UCHAR HalpSerialNumber[];
|
|
|
|
//
|
|
// The following macros are taken from mm\ia64\miia64.h. We need them here
|
|
// so the HAL can map its own memory before memory-management has been
|
|
// initialized, or during a BugCheck.
|
|
//
|
|
// MiGetPdeAddress returns the address of the PDE which maps the
|
|
// given virtual address.
|
|
//
|
|
|
|
#if defined(_WIN64)
|
|
|
|
#define ADDRESS_BITS 64
|
|
|
|
#define NT_ADDRESS_BITS 32
|
|
|
|
#define NT_ADDRESS_MASK (((UINT_PTR)1 << NT_ADDRESS_BITS) -1)
|
|
|
|
#define MiGetPdeAddress(va) \
|
|
((PHARDWARE_PTE)(((((UINT_PTR)(va) & NT_ADDRESS_MASK) >> PDI_SHIFT) << PTE_SHIFT) + PDE_BASE))
|
|
|
|
#define MiGetPteAddress(va) \
|
|
((PHARDWARE_PTE)(((((UINT_PTR)(va) & NT_ADDRESS_MASK) >> PAGE_SHIFT) << PTE_SHIFT) + PTE_BASE))
|
|
|
|
#else
|
|
|
|
#define MiGetPdeAddress(va) ((PHARDWARE_PTE)(((((ULONG)(va)) >> 22) << 2) + PDE_BASE))
|
|
|
|
//
|
|
// MiGetPteAddress returns the address of the PTE which maps the
|
|
// given virtual address.
|
|
//
|
|
|
|
#define MiGetPteAddress(va) ((PHARDWARE_PTE)(((((ULONG)(va)) >> 12) << 2) + PTE_BASE))
|
|
|
|
#endif // defined(_WIN64)
|
|
|
|
//
|
|
// Resource usage information
|
|
//
|
|
|
|
#pragma pack(1)
|
|
typedef struct {
|
|
UCHAR Flags;
|
|
KIRQL Irql;
|
|
UCHAR BusReleativeVector;
|
|
} IDTUsage;
|
|
|
|
typedef struct _HalAddressUsage{
|
|
struct _HalAddressUsage *Next;
|
|
CM_RESOURCE_TYPE Type; // Port or Memory
|
|
UCHAR Flags; // same as IDTUsage.Flags
|
|
struct {
|
|
ULONG Start;
|
|
ULONG Length;
|
|
} Element[];
|
|
} ADDRESS_USAGE;
|
|
#pragma pack()
|
|
|
|
//
|
|
// Added the following line
|
|
//
|
|
|
|
#define MAXIMUM_IDTVECTOR 0x0FF
|
|
|
|
//
|
|
// The following 3 lines are lifted from halp.h of halia64 directory
|
|
// to clear the build error from i64timer.c
|
|
//
|
|
|
|
#define DEFAULT_CLOCK_INTERVAL 100000 // 10 ms
|
|
#define MINIMUM_CLOCK_INTERVAL 10000 // 1 ms
|
|
#define MAXIMUM_CLOCK_INTERVAL 100000 // 10 ms
|
|
|
|
// IO Port emulation defines
|
|
|
|
#define IO_PORT_MASK 0x0FFFF;
|
|
#define BYTE_ADDRESS_MASK 0x00FFF;
|
|
#define BYTE_ADDRESS_CLEAR 0x0FFFC;
|
|
|
|
// #define ExtVirtualIOBase 0xFFFFFFFFFFC00000
|
|
|
|
// #define VirtualIOBase 0xFFFFFFFFFFC00000i64
|
|
#define VirtualIOBase (UINT_PTR)(KADDRESS_BASE+0xFFC00000)
|
|
|
|
// extern VOID *VirtualIOBase;
|
|
|
|
|
|
// #define PhysicalIOBase 0x80000000FFC00000i64
|
|
#define PhysicalIOBase 0x00000FFFFC000000i64
|
|
|
|
#define IDTOwned 0x01 // IDT is not available for others
|
|
#define InterruptLatched 0x02 // Level or Latched
|
|
#define InternalUsage 0x11 // Report usage on internal bus
|
|
#define DeviceUsage 0x21 // Report usage on device bus
|
|
|
|
extern IDTUsage HalpIDTUsage[];
|
|
extern ADDRESS_USAGE *HalpAddressUsageList;
|
|
|
|
#define HalpRegisterAddressUsage(a) \
|
|
(a)->Next = HalpAddressUsageList, HalpAddressUsageList = (a);
|
|
|
|
|
|
VOID
|
|
HalpInsertTranslationRegister (
|
|
IN UINT_PTR IFA,
|
|
IN ULONG SlotNumber,
|
|
IN ULONGLONG Attribute,
|
|
IN ULONGLONG ITIR
|
|
);
|
|
|
|
VOID
|
|
HalpFillTbForIOPortSpace (
|
|
ULONGLONG PhysicalAddress,
|
|
UINT_PTR VirtualAddress,
|
|
ULONG SlotNumber
|
|
);
|
|
|
|
|
|
//
|
|
// Temp definitions to thunk into supporting new bus extension format
|
|
//
|
|
|
|
VOID
|
|
HalpRegisterInternalBusHandlers (
|
|
VOID
|
|
);
|
|
|
|
PBUS_HANDLER
|
|
HalpAllocateBusHandler (
|
|
IN INTERFACE_TYPE InterfaceType,
|
|
IN BUS_DATA_TYPE BusDataType,
|
|
IN ULONG BusNumber,
|
|
IN INTERFACE_TYPE ParentBusDataType,
|
|
IN ULONG ParentBusNumber,
|
|
IN ULONG BusSpecificData
|
|
);
|
|
|
|
#define HalpHandlerForBus HaliHandlerForBus
|
|
#define HalpSetBusHandlerParent(c,p) (c)->ParentHandler = p;
|
|
|
|
//
|
|
// Define function prototypes.
|
|
//
|
|
|
|
VOID
|
|
HalInitSystemPhase2(
|
|
VOID
|
|
);
|
|
|
|
KIRQL
|
|
HaliRaiseIrqlToDpcLevel (
|
|
VOID
|
|
);
|
|
|
|
BOOLEAN
|
|
HalpGrowMapBuffers(
|
|
PADAPTER_OBJECT AdapterObject,
|
|
ULONG Amount
|
|
);
|
|
|
|
PADAPTER_OBJECT
|
|
HalpAllocateAdapter(
|
|
IN ULONG MapRegistersPerChannel,
|
|
IN PVOID AdapterBaseVa,
|
|
IN PVOID MapRegisterBase
|
|
);
|
|
|
|
VOID
|
|
HalpDisableAllInterrupts (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpProfileInterrupt(
|
|
IN PKTRAP_FRAME TrapFrame
|
|
);
|
|
|
|
VOID
|
|
HalpInitializeClock(
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpInitializeDisplay(
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpInitializeStallExecution(
|
|
IN CCHAR ProcessorNumber
|
|
);
|
|
|
|
VOID
|
|
HalpRemoveFences (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpInitializePICs(
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpIrq13Handler (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpFlushTLB (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpSerialize (
|
|
VOID
|
|
);
|
|
|
|
|
|
PVOID
|
|
HalMapPhysicalMemory(
|
|
IN PHYSICAL_ADDRESS PhysicalAddress,
|
|
IN ULONG NumberPages
|
|
);
|
|
|
|
|
|
PVOID
|
|
HalpMapPhysicalMemory(
|
|
IN PVOID PhysicalAddress,
|
|
IN ULONG NumberPages
|
|
);
|
|
|
|
PVOID
|
|
HalpMapPhysicalMemoryWriteThrough(
|
|
IN PVOID PhysicalAddress,
|
|
IN ULONG NumberPages
|
|
);
|
|
|
|
ULONG
|
|
HalpAllocPhysicalMemory(
|
|
IN PLOADER_PARAMETER_BLOCK LoaderBlock,
|
|
IN ULONG MaxPhysicalAddress,
|
|
IN ULONG NoPages,
|
|
IN BOOLEAN bAlignOn64k
|
|
);
|
|
|
|
BOOLEAN
|
|
HalpBiosDisplayReset(
|
|
IN VOID
|
|
);
|
|
|
|
HAL_DISPLAY_BIOS_INFORMATION
|
|
HalpGetDisplayBiosInformation (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpDisplayDebugStatus(
|
|
IN PUCHAR Status,
|
|
IN ULONG Length
|
|
);
|
|
|
|
VOID
|
|
HalpInitializeCmos (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpReadCmosTime (
|
|
PTIME_FIELDS TimeFields
|
|
);
|
|
|
|
VOID
|
|
HalpWriteCmosTime (
|
|
PTIME_FIELDS TimeFields
|
|
);
|
|
|
|
VOID
|
|
HalpAcquireCmosSpinLock (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpReleaseCmosSpinLock (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpResetAllProcessors (
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalpCpuID (
|
|
ULONG InEax,
|
|
PULONG OutEax,
|
|
PULONG OutEbx,
|
|
PULONG OutEcx,
|
|
PULONG OutEdx
|
|
);
|
|
|
|
ULONGLONG
|
|
FASTCALL
|
|
RDMSR (
|
|
IN ULONG MsrAddress
|
|
);
|
|
|
|
VOID
|
|
WRMSR (
|
|
IN ULONG MsrAddress,
|
|
IN ULONGLONG MsrValue
|
|
);
|
|
|
|
VOID
|
|
HalpEnableInterruptHandler (
|
|
IN UCHAR ReportFlags,
|
|
IN ULONG BusInterruptVector,
|
|
IN ULONG SystemInterruptVector,
|
|
IN KIRQL SystemIrql,
|
|
IN VOID (*HalInterruptServiceRoutine)(VOID),
|
|
IN KINTERRUPT_MODE InterruptMode
|
|
);
|
|
|
|
VOID
|
|
HalpRegisterVector (
|
|
IN UCHAR ReportFlags,
|
|
IN ULONG BusInterruptVector,
|
|
IN ULONG SystemInterruptVector,
|
|
IN KIRQL SystemIrql
|
|
);
|
|
|
|
VOID
|
|
HalpReportResourceUsage (
|
|
IN PUNICODE_STRING HalName,
|
|
IN INTERFACE_TYPE DeviceInterfaceToUse
|
|
);
|
|
|
|
VOID
|
|
HalpYearIs(
|
|
IN ULONG Year
|
|
);
|
|
|
|
VOID
|
|
HalpRecordEisaInterruptVectors(
|
|
VOID
|
|
);
|
|
|
|
NTSTATUS
|
|
HalIrqTranslateResourcesRoot(
|
|
IN PVOID Context,
|
|
IN PCM_PARTIAL_RESOURCE_DESCRIPTOR Source,
|
|
IN RESOURCE_TRANSLATION_DIRECTION Direction,
|
|
IN ULONG AlternativesCount, OPTIONAL
|
|
IN IO_RESOURCE_DESCRIPTOR Alternatives[], OPTIONAL
|
|
IN PDEVICE_OBJECT PhysicalDeviceObject,
|
|
OUT PCM_PARTIAL_RESOURCE_DESCRIPTOR Target
|
|
);
|
|
|
|
NTSTATUS
|
|
HalIrqTranslateResourceRequirementsRoot(
|
|
IN PVOID Context,
|
|
IN PIO_RESOURCE_DESCRIPTOR Source,
|
|
IN PDEVICE_OBJECT PhysicalDeviceObject,
|
|
OUT PULONG TargetCount,
|
|
OUT PIO_RESOURCE_DESCRIPTOR *Target
|
|
);
|
|
|
|
NTSTATUS
|
|
HalIrqTranslateResourceRequirementsIsa(
|
|
IN PVOID Context,
|
|
IN PIO_RESOURCE_DESCRIPTOR Source,
|
|
IN PDEVICE_OBJECT PhysicalDeviceObject,
|
|
OUT PULONG TargetCount,
|
|
OUT PIO_RESOURCE_DESCRIPTOR *Target
|
|
);
|
|
|
|
NTSTATUS
|
|
HalIrqTranslateResourcesIsa(
|
|
IN PVOID Context,
|
|
IN PCM_PARTIAL_RESOURCE_DESCRIPTOR Source,
|
|
IN RESOURCE_TRANSLATION_DIRECTION Direction,
|
|
IN ULONG AlternativesCount, OPTIONAL
|
|
IN IO_RESOURCE_DESCRIPTOR Alternatives[], OPTIONAL
|
|
IN PDEVICE_OBJECT PhysicalDeviceObject,
|
|
OUT PCM_PARTIAL_RESOURCE_DESCRIPTOR Target
|
|
);
|
|
|
|
//
|
|
// Defines for HalpFeatureBits
|
|
//
|
|
|
|
#define HAL_PERF_EVENTS 0x00000001
|
|
#define HAL_NO_SPECULATION 0x00000002
|
|
#define HAL_MCA_PRESENT 0x00000004 // Intel MCA Available
|
|
#define HAL_MCE_PRESENT 0x00000008 // ONLY Pentium style MCE available
|
|
|
|
extern ULONG HalpFeatureBits;
|
|
|
|
//
|
|
// Added HalpPciIrqMask
|
|
//
|
|
extern USHORT HalpPciIrqMask;
|
|
|
|
//
|
|
// Defines for Processor Features returned from CPUID instruction
|
|
//
|
|
|
|
#define CPUID_MCA_MASK 0x4000
|
|
#define CPUID_MCE_MASK 0x0080
|
|
|
|
|
|
// Added ITIR bit field masks
|
|
//
|
|
|
|
#define ITIR_PPN_MASK 0x7FFF000000000000
|
|
#define IoSpaceSize 0x14
|
|
#define Attribute_PPN_Mask 0x0000FFFFFFFFF000
|
|
|
|
#define IoSpaceAttribute 0x0010000000000473
|
|
|
|
NTSTATUS
|
|
HalpGetMcaLog(
|
|
OUT PMCA_EXCEPTION Exception,
|
|
OUT PULONG ReturnedLength
|
|
);
|
|
|
|
NTSTATUS
|
|
HalpMcaRegisterDriver(
|
|
IN PMCA_DRIVER_INFO pMcaDriverInfo // Info about registering driver
|
|
);
|
|
|
|
VOID
|
|
HalpMcaInit(
|
|
VOID
|
|
);
|
|
|
|
//
|
|
// Disable the Local APIC on UP (PIC 8259) PentiumPro systems to work around
|
|
// spurious interrupt errata.
|
|
//
|
|
#define APIC_BASE_MSR 0x1B
|
|
#define APIC_ENABLED 0x0000000000000800
|
|
|
|
|
|
//
|
|
// PnP stuff
|
|
//
|
|
|
|
VOID
|
|
HalIrqTranslatorReference(
|
|
PVOID Context
|
|
);
|
|
|
|
VOID
|
|
HalIrqTranslatorDereference(
|
|
PVOID Context
|
|
);
|
|
|
|
NTSTATUS
|
|
HalIrqTranslateResources(
|
|
IN PVOID Context,
|
|
IN PCM_PARTIAL_RESOURCE_DESCRIPTOR Source,
|
|
IN RESOURCE_TRANSLATION_DIRECTION Direction,
|
|
IN ULONG AlternativesCount, OPTIONAL
|
|
IN IO_RESOURCE_DESCRIPTOR Alternatives[], OPTIONAL
|
|
IN PDEVICE_OBJECT PhysicalDeviceObject,
|
|
OUT PCM_PARTIAL_RESOURCE_DESCRIPTOR Target
|
|
);
|
|
|
|
ULONG
|
|
HalpGetIsaIrqState(
|
|
ULONG Vector
|
|
);
|
|
|
|
|
|
|
|
// Definion for IA64 HalpVectorToINTI
|
|
|
|
#define VECTOR 0xFF;
|
|
#define LEVEL 32;
|
|
extern UCHAR HalpVectorToINTI[];
|
|
extern UCHAR HalpVectorToIRQL[];
|
|
|
|
// Definition for IA64 complete
|
|
|
|
|
|
//
|
|
// ACPI specific stuff
|
|
//
|
|
|
|
// from detect\i386\acpibios.h
|
|
typedef struct _ACPI_BIOS_INSTALLATION_CHECK {
|
|
UCHAR Signature[8]; // "RSD PTR" (ascii)
|
|
UCHAR Checksum;
|
|
UCHAR OemId[6]; // An OEM-supplied string
|
|
UCHAR reserved; // must be 0
|
|
ULONG RsdtAddress; // 32-bit physical address of RSDT
|
|
} ACPI_BIOS_INSTALLATION_CHECK, *PACPI_BIOS_INSTALLATION_CHECK;
|
|
|
|
NTSTATUS
|
|
HalpAcpiFindRsdt (
|
|
OUT PACPI_BIOS_INSTALLATION_CHECK RsdtPtr
|
|
);
|
|
|
|
NTSTATUS
|
|
HalpAcpiFindRsdtPhase0(
|
|
IN PLOADER_PARAMETER_BLOCK LoaderBlock
|
|
);
|
|
|
|
NTSTATUS
|
|
HalpSetupAcpiPhase0(
|
|
IN PLOADER_PARAMETER_BLOCK LoaderBlock
|
|
);
|
|
|
|
PVOID
|
|
HalpGetAcpiTable(
|
|
ULONG Signature
|
|
);
|
|
|
|
VOID
|
|
HalpSleepS5(
|
|
VOID
|
|
);
|
|
|
|
VOID
|
|
HalProcessorThrottle (
|
|
UCHAR
|
|
);
|
|
|
|
|
|
|
|
VOID
|
|
HalpStoreBufferUCHAR (
|
|
PUCHAR VirtualAddress,
|
|
PUCHAR Buffer,
|
|
ULONG Count
|
|
);
|
|
|
|
VOID
|
|
HalpStoreBufferUSHORT (
|
|
PUSHORT VirtualAddress,
|
|
PUSHORT Buffer,
|
|
ULONG Count
|
|
);
|
|
|
|
VOID
|
|
HalpStoreBufferULONG (
|
|
PULONG VirtualAddress,
|
|
PULONG Buffer,
|
|
ULONG Count
|
|
);
|
|
|
|
VOID
|
|
HalpStoreBufferULONGLONG (
|
|
PULONGLONG VirtualAddress,
|
|
PULONGLONG Buffer,
|
|
ULONG Count
|
|
);
|
|
|
|
|
|
VOID
|
|
HalpLoadBufferUCHAR (
|
|
PUCHAR VirtualAddress,
|
|
PUCHAR Buffer,
|
|
ULONG Count
|
|
);
|
|
|
|
VOID
|
|
HalpLoadBufferUSHORT (
|
|
PUSHORT VirtualAddress,
|
|
PUSHORT Buffer,
|
|
ULONG Count
|
|
);
|
|
|
|
VOID
|
|
HalpLoadBufferULONG (
|
|
PULONG VirtualAddress,
|
|
PULONG Buffer,
|
|
ULONG Count
|
|
);
|
|
|
|
VOID
|
|
HalpLoadBufferULONGLONG (
|
|
PULONGLONG VirtualAddress,
|
|
PULONGLONG Buffer,
|
|
ULONG Count
|
|
);
|
|
|
|
|
|
|
|
|
|
//
|
|
// I/O Port space
|
|
//
|
|
// IoSpaceSize = 0x14 for 2 power 0x14 is 1Meg space size.
|
|
//
|
|
|
|
#define IO_SPACE_SIZE 0x14
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// Present bit = 1B to wire the space.
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// Memory Attributes = 1001B for UC Memory type
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// Accessed Bit = 1B to "enable" access without faulting.
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// Dirty Bit = 1B to "enable" write without faulting.
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// Privilege Level = 00B for kernel accesses
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// Access Right = 010B for read/write accesses
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// Exception Deferral= 1B for Exception Deferral.
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// Exceptions are deferred
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// for speculative loads to pages with
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// non-spec. mem. attributes anyway.
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// Protection Key = 0 for kernel mode
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#define IO_SPACE_ATTRIBUTE 0x0010000000000473
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#endif // _HALP_
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