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910 lines
23 KiB
910 lines
23 KiB
title "Processor type and stepping detection"
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;++
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;
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; Copyright (c) 1989 Microsoft Corporation
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;
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; Module Name:
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;
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; cpu.asm
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;
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; Abstract:
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;
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; This module implements the assembley code necessary to determine
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; cpu type and stepping information.
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;
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; Author:
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;
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; Shie-Lin Tzong (shielint) 28-Oct-1991.
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; Some of the code is extracted from Cruiser (mainly,
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; the code to determine 386 stepping.)
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;
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; Environment:
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;
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; 80x86 Real Mode.
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;
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; Revision History:
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;
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;
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;--
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.xlist
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include cpu.inc
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.list
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;
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; constant for i386 32-bit multiplication test
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;
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MULTIPLIER equ 00000081h
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MULTIPLICAND equ 0417a000h
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RESULT_HIGH equ 00000002h
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RESULT_LOW equ 0fe7a000h
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;
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; Constants for Floating Point test
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;
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REALLONG_LOW equ 00000000
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REALLONG_HIGH equ 3FE00000h
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PSEUDO_DENORMAL_LOW equ 00000000h
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PSEUDO_DENORMAL_MID equ 80000000h
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PSEUDO_DENORMAL_HIGH equ 0000h
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.386p
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_TEXT SEGMENT PARA USE16 PUBLIC 'CODE'
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ASSUME CS: _TEXT, DS:NOTHING, SS:NOTHING
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;++
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;
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; USHORT
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; HwGetProcessorType (
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function determines type of processor (80486, 80386, 80286,
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; and even 8086/8088). it relies on Intel-approved code that takes
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; advantage of the documented behavior of the high nibble of the flag
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; word in the REAL MODE of the various processors.
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;
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; For completeness, the code also checks for 8088/8086. But, it won't
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; work.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; (ax) = x86h or 0 if unrecongnized processor.
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;
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;--
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.8086
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public _HwGetProcessorType
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_HwGetProcessorType proc near
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pushf ; save entry flags
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;
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; The MSB (bit 15) is always a one on the 8086 and 8088 and a zero on
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; the 286, 386 and 486.
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;
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pushf
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pop ax
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and ax, NOT 08000h ; clear bit 15 of flags
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push ax
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popf ; try to put that in the flags
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pushf
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pop ax ; look at what really went into flags
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test ax,08000h ; Was high bit set ?
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jnz short x_86 ; if nz, still set, goto x_86
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;
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; Bit 14 (NT flag) and bits 13/12 (IOPL bit field) are always zero on
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; the 286, but can be set on the 386 and 486.
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;
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or ax,07000h ; Try to set the NT/IOPL bits
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push ax
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popf ; Put in to the flags
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sti ; (for VDMM/IOPL0)
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pushf
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pop ax ; look at actual flags
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test ax,07000h ; Any high bits set ?
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jz short x_286 ; if z, no, goto x_286
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.386p
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;
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; The Alignment Check bit in flag can be set on 486 and is always zero
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; on 386.
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;
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mov eax,cr0 ; test for 486 processor
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push eax ; save CR0 value
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and eax,not CR0_AM ; disable alignment check
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mov cr0,eax
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db ADDRESS_OVERRIDE
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pushfd ; save original EFLAGS
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db ADDRESS_OVERRIDE
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pushfd ; try to set alignment check
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or dword ptr [esp],EFLAGS_AC ; bit in EFLAGS
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db ADDRESS_OVERRIDE
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popfd
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db ADDRESS_OVERRIDE
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pushfd ; copy new flags into ECX
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pop ecx ; [ecx] = new flags word
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db ADDRESS_OVERRIDE
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popfd ; restore original EFLAGS
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pop eax ; restore original CR0 value
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mov cr0,eax
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and ecx, EFLAGS_AC ; did AC bit get set?
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jz short x_386 ; if z, no, goto x_386
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mov eax, 4h ; if nz, we have a 486 processor
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.286p
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jmp short hpt99
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x_286:
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mov ax, 2h ; Return 286 processor type.
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jmp short hpt99
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x_86:
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mov ax, 0h ; Return 86h for 8088/8086 CPU type.
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jmp short hpt99
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x_386:
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mov ax, 3h ; Return 386 processor type.
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hpt99:
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popf ; restore flags
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ret
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_HwGetProcessorType endp
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IFDEF ALLOW_386
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.386p
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;++
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;
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; USHORT
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; HwGetCpuStepping (
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; UHSORT CpuType
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; )
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;
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; Routine Description:
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;
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; This function determines cpu stepping for the specified CPU type.
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;
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; Currently, this routine only determine stepping for 386 and 486.
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;
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; Arguments:
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;
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; CpuType - The Cpu type which its stepping information will be returned.
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; The input value MUST be either 386 or 486.
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;
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; Return Value:
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;
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; [ax] - Cpu stepping. For example, [ax] = D0h for D0 stepping.
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;
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;--
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if 0
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HgcsCpuType equ [esp + 2]
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public _HwGetCpuStepping
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_HwGetCpuStepping proc
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mov ax, HgcsCpuType ; [ax] = CpuType
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cmp ax, 3h ; Is cpu = 386?
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jz short Hgcs00 ; if z, yes, go Hgcs00
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call Get486Stepping ; else, check for 486 stepping
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jmp short Hgcs90 ; [ax] = Stepping information
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Hgcs00:
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call _Get386Stepping ; [ax] = Stepping information
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Hgcs90:
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ret
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_HwGetCpuStepping endp
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endif
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;++
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;
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; USHORT
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; _Get386Stepping (
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function determines cpu stepping for i386 CPU stepping.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; [ax] - Cpu stepping. For example, [ax] = D0h for D0 stepping.
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; [ax] = 0 means bad CPU and stepping is not important.
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;
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;--
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public _Get386Stepping
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_Get386Stepping proc
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call MultiplyTest ; Perform mutiplication test
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jnc short G3s00 ; if nc, muttest is ok
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mov ax, 0
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ret
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G3s00:
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call Check386B0 ; Check for B0 stepping
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jnc short G3s05 ; if nc, it's B1/later
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mov ax, 0B0h ; It is B0/earlier stepping
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ret
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G3s05:
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call Check386D1 ; Check for D1 stepping
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jc short G3s10 ; if c, it is NOT D1
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mov ax, 0D1h ; It is D1/later stepping
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ret
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G3s10:
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mov ax, 0B1h ; assume it is B1 stepping
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ret
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_Get386Stepping endp
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if 0
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;++
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;
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; USHORT
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; Get486Stepping (
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; VOID
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; )
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;
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; Routine Description:
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;
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; This function determines cpu stepping for i486 CPU type.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; [ax] - Cpu stepping. For example, [ax] = D0h for D0 stepping.
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;
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;--
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public Get486Stepping
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Get486Stepping proc
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call Check486AStepping ; Check for A stepping
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jnc short G4s00 ; if nc, it is NOT A stepping
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mov ax, 0A0h ; set to A stepping
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ret
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G4s00: call Check486BStepping ; Check for B stepping
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jnc short G4s10 ; if nc, it is NOT a B stepping
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mov ax, 0B0h ; set to B stepping
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ret
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;
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; Before we test for 486 C/D step, we need to make sure NPX is present.
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; Because the test uses FP instruction to do the detection.
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;
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G4s10: call _IsNpxPresent ; Check if cpu has coprocessor support?
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cmp ax, 0
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jz short G4s15 ; it is actually 486sx
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call Check486CStepping ; Check for C stepping
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jnc short G4s20 ; if nc, it is NOT a C stepping
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G4s15:
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mov ax, 0C0h ; set to C stepping
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ret
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G4s20: mov ax, 0D0h ; Set to D stepping
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ret
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Get486Stepping endp
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;++
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;
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; BOOLEAN
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; Check486AStepping (
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; VOID
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; )
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;
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; Routine Description:
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;
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; This routine checks for 486 A Stepping.
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;
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; It takes advantage of the fact that on the A-step of the i486
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; processor, the ET bit in CR0 could be set or cleared by software,
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; but was not used by the hardware. On B or C -step, ET bit in CR0
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; is now hardwired to a "1" to force usage of the 386 math coprocessor
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; protocol.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; Carry Flag clear if B or later stepping.
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; Carry Flag set if A or earlier stepping.
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;
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;--
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public Check486AStepping
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Check486AStepping proc near
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.386p
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mov eax, cr0 ; reset ET bit in cr0
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and eax, NOT CR0_ET
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mov cr0, eax
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mov eax, cr0 ; get cr0 back
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test eax, CR0_ET ; if ET bit still set?
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jnz short cas10 ; if nz, yes, still set, it's NOT A step
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stc
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ret
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cas10: clc
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ret
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ret
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Check486AStepping endp
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;++
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;
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; BOOLEAN
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; Check486BStepping (
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; VOID
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; )
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;
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; Routine Description:
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;
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; This routine checks for 486 B Stepping.
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;
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; On the i486 processor, the "mov to/from DR4/5" instructions were
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; aliased to "mov to/from DR6/7" instructions. However, the i486
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; B or earlier steps generate an Invalid opcode exception when DR4/5
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; are used with "mov to/from special register" instruction.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; Carry Flag clear if C or later stepping.
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; Carry Flag set if B stepping.
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;
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;--
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public Check486BStepping
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Check486BStepping proc
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push ds
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push bx
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xor ax,ax
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mov ds,ax ; (DS) = 0 (real mode IDT)
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mov bx,6*4
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push dword ptr [bx] ; save old int 6 vector
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mov word ptr [bx].VectorOffset,offset Temporary486Int6
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mov [bx].VectorSegment,cs ; set vector to new int 6 handler
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c4bs50: db 0fh, 21h, 0e0h ; mov eax, DR4
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nop
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nop
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nop
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nop
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nop
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clc ; it is C step
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jmp short c4bs70
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c4bs60: stc ; it's B step
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c4bs70: pop dword ptr [bx] ; restore old int 6 vector
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pop bx
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pop ds
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ret
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ret
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Check486BStepping endp
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;++
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;
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; BOOLEAN
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; Temporary486Int6 (
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; VOID
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; )
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;
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; Routine Description:
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;
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; Temporary int 6 handler - assumes the cause of the exception was the
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; attempted execution of an mov to/from DR4/5 instruction.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; none.
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;
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;--
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Temporary486Int6 proc
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mov word ptr [esp].IretIp,offset c4bs60 ; set IP to stc instruction
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iret
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Temporary486Int6 endp
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;++
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;
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; BOOLEAN
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; Check486CStepping (
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; VOID
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; )
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;
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; Routine Description:
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;
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; This routine checks for 486 C Stepping.
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;
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; This routine takes advantage of the fact that FSCALE produces
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; wrong result with Denormal or Pseudo-denormal operand on 486
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; C and earlier steps.
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;
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; If the value contained in ST(1), second location in the floating
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; point stack, is between 1 and 11, and the value in ST, top of the
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; floating point stack, is either a pseudo-denormal number or a
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; denormal number with the underflow exception unmasked, the FSCALE
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; instruction produces an incorrect result.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; Carry Flag clear if D or later stepping.
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; Carry Flag set if C stepping.
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;
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;--
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FpControl equ [ebp - 2]
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RealLongSt1 equ [ebp - 10]
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PseudoDenormal equ [ebp - 20]
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FscaleResult equ [ebp - 30]
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public Check486CStepping
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Check486CStepping proc
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push ebp
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mov ebp, esp
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sub esp, 30 ; Allocate space for temp real variables
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;
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; Initialize the local FP variables to predefined values.
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; RealLongSt1 = 1.0 * (2 ** -1) = 0.5 in normalized double precision FP form
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; PseudoDenormal = a unsupported format by IEEE.
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; Sign bit = 0
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; Exponent = 000000000000000B
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; Significand = 100000...0B
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; FscaleResult = The result of FSCALE instruction. Depending on 486 step,
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; the value will be different:
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; Under C and earlier steps, 486 returns the original value
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; in ST as the result. The correct returned value should be
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; original significand and an exponent of 0...01.
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;
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mov dword ptr RealLongSt1, REALLONG_LOW
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mov dword ptr RealLongSt1 + 4, REALLONG_HIGH
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mov dword ptr PseudoDenormal, PSEUDO_DENORMAL_LOW
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mov dword ptr PseudoDenormal + 4, PSEUDO_DENORMAL_MID
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mov word ptr PseudoDenormal + 8, PSEUDO_DENORMAL_HIGH
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.387
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fnstcw FpControl ; Get FP control word
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or word ptr FpControl, 0FFh ; Mask all the FP exceptions
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fldcw FpControl ; Set FP control
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fld qword ptr RealLongSt1 ; 0 < ST(1) = RealLongSt1 < 1
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fld tbyte ptr PseudoDenormal; Denormalized operand. Note, i486
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; won't report denormal exception
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; on 'FLD' instruction.
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; ST(0) = Extended Denormalized operand
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fscale ; try to trigger 486Cx errata
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fstp tbyte ptr FscaleResult ; Store ST(0) in FscaleResult
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cmp word ptr FscaleResult + 8, PSEUDO_DENORMAL_HIGH
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; Is Exponent changed?
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jz short c4ds00 ; if z, no, it is C step
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clc
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jmp short c4ds10
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c4ds00: stc
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c4ds10: mov esp, ebp
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pop ebp
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ret
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Check486CStepping endp
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endif
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;++
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;
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; BOOLEAN
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; Check386B0 (
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; VOID
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; )
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;
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; Routine Description:
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;
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; This routine checks for 386 B0 or earlier stepping.
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;
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; It takes advantage of the fact that the bit INSERT and
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; EXTRACT instructions that existed in B0 and earlier versions of the
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; 386 were removed in the B1 stepping. When executed on the B1, INSERT
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; and EXTRACT cause an int 6 (invalid opcode) exception. This routine
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; can therefore discriminate between B1/later 386s and B0/earlier 386s.
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; It is intended to be used in sequence with other checks to determine
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; processor stepping by exercising specific bugs found in specific
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; steppings of the 386.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; Carry Flag clear if B1 or later stepping
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; Carry Flag set if B0 or prior
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;
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;--
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ASSUME ds:nothing, es:nothing, fs:nothing, gs:nothing, ss:nothing
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Check386B0 proc
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push ds
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push bx
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xor ax,ax
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mov ds,ax ; (DS) = 0 (real mode IDT)
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mov bx,6*4
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push dword ptr [bx] ; save old int 6 vector
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mov word ptr [bx].VectorOffset,offset TemporaryInt6
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mov [bx].VectorSegment,cs ; set vector to new int 6 handler
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|
|
|
;
|
|
; Attempt execution of Extract Bit String instruction. Execution on
|
|
; B0 or earlier with length (CL) = 0 will return 0 into the destination
|
|
; (CX in this case). Execution on B1 or later will fail either due to
|
|
; taking the invalid opcode trap, or if the opcode is valid, we don't
|
|
; expect CX will be zeroed by any new instruction supported by newer
|
|
; steppings. The dummy int 6 handler will clears the Carry Flag and
|
|
; returns execution to the appropriate label. If the instruction
|
|
; actually executes, CX will *probably* remain unchanged in any new
|
|
; stepping that uses the opcode for something else. The nops are meant
|
|
; to handle newer steppings with an unknown instruction length.
|
|
;
|
|
|
|
xor ax,ax
|
|
mov dx,ax
|
|
mov cx,0ff00h ; Extract length (CL) == 0, (CX) != 0
|
|
|
|
b1c50: db 0fh, 0a6h, 0cah ; xbts cx,dx,ax,cl
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
stc ; assume B0
|
|
jcxz short b1c70 ; jmp if B0
|
|
b1c60: clc
|
|
b1c70: pop dword ptr [bx] ; restore old int 6 vector
|
|
|
|
pop bx
|
|
pop ds
|
|
ret
|
|
|
|
Check386B0 endp
|
|
|
|
;++
|
|
;
|
|
; BOOLEAN
|
|
; TemporaryInt6 (
|
|
; VOID
|
|
; )
|
|
;
|
|
; Routine Description:
|
|
;
|
|
; Temporary int 6 handler - assumes the cause of the exception was the
|
|
; attempted execution of an XTBS instruction.
|
|
;
|
|
; Arguments:
|
|
;
|
|
; None.
|
|
;
|
|
; Return Value:
|
|
;
|
|
; none.
|
|
;
|
|
;--
|
|
|
|
TemporaryInt6 proc
|
|
|
|
mov word ptr [esp].IretIp,offset b1c60 ; set IP to clc instruction
|
|
iret
|
|
|
|
TemporaryInt6 endp
|
|
|
|
;++
|
|
;
|
|
; BOOLEAN
|
|
; Check386D1 (
|
|
; VOID
|
|
; )
|
|
;
|
|
; Routine Description:
|
|
;
|
|
; This routine checks for 386 D1 Stepping.
|
|
;
|
|
; It takes advantage of the fact that on pre-D1 386, if a REPeated
|
|
; MOVS instruction is executed when single-stepping is enabled,
|
|
; a single step trap is taken every TWO moves steps, but should
|
|
; occuu each move step.
|
|
;
|
|
; NOTE: This routine cannot distinguish between a D0 stepping and a D1
|
|
; stepping. If a need arises to make this distinction, this routine
|
|
; will need modification. D0 steppings will be recognized as D1.
|
|
;
|
|
; Arguments:
|
|
;
|
|
; None.
|
|
;
|
|
; Return Value:
|
|
;
|
|
; Carry Flag clear if D1 or later stepping
|
|
; Carry Flag set if B1 or prior
|
|
;
|
|
;--
|
|
|
|
assume ds:nothing, es:nothing, fs:nothing, gs:nothing, ss:nothing
|
|
|
|
Check386D1 proc
|
|
|
|
push ds
|
|
push bx
|
|
|
|
xor ax,ax
|
|
mov ds,ax ; (DS) = 0 (real mode IDT)
|
|
mov bx,1*4
|
|
push dword ptr [bx] ; save old int 1 vector
|
|
|
|
mov word ptr [bx].VectorOffset,offset TemporaryInt1
|
|
mov word ptr [bx].VectorSegment,cs ; set vector to new int 1 handler
|
|
|
|
;
|
|
; Attempt execution of rep movsb instruction with the Trace Flag set.
|
|
; Execution on B1 or earlier with length (CX) > 1 will trace over two
|
|
; iterations before accepting the trace trap. Execution on D1 or later
|
|
; will accept the trace trap after a single iteration. The dummy int 1
|
|
; handler will return execution to the instruction following the movsb
|
|
; instruction. Examination of (CX) will reveal the stepping.
|
|
;
|
|
|
|
sub sp,4 ; make room for target of movsb
|
|
xor si,si ; (ds:si) = 0:0
|
|
push ss ; (es:di) = ss:sp-4
|
|
pop es
|
|
mov di,sp
|
|
mov cx,2 ; 2 iterations
|
|
pushf
|
|
or word ptr [esp], EFLAGS_TF
|
|
popf ; cause a single step trap
|
|
rep movsb
|
|
|
|
d1c60: add sp,4 ; clean off stack
|
|
pop dword ptr [bx] ; restore old int 1 vector
|
|
stc ; assume B1
|
|
jcxz short d1cx ; jmp if <= B1
|
|
clc ; else clear carry to indicate >= D1
|
|
d1cx:
|
|
pop bx
|
|
pop ds
|
|
ret
|
|
|
|
Check386D1 endp
|
|
|
|
;++
|
|
;
|
|
; BOOLEAN
|
|
; TemporaryInt1 (
|
|
; VOID
|
|
; )
|
|
;
|
|
; Routine Description:
|
|
;
|
|
; Temporary int 1 handler - assumes the cause of the exception was
|
|
; trace trap at the above rep movs instruction.
|
|
;
|
|
; Arguments:
|
|
;
|
|
; (esp)->eip of trapped instruction
|
|
; cs of trapped instruction
|
|
; eflags of trapped instruction
|
|
;
|
|
;--
|
|
|
|
TemporaryInt1 proc
|
|
|
|
and word ptr [esp].IretFlags,not EFLAGS_TF ; clear caller's Trace Flag
|
|
mov word ptr [esp].IretIp,offset d1c60 ; set IP to next instruction
|
|
iret
|
|
|
|
TemporaryInt1 endp
|
|
|
|
;++
|
|
;
|
|
; BOOLEAN
|
|
; MultiplyTest (
|
|
; VOID
|
|
; )
|
|
;
|
|
; Routine Description:
|
|
;
|
|
; This routine checks the 386 32-bit multiply instruction.
|
|
; The reason for this check is because some of the i386 fail to
|
|
; perform this instruction.
|
|
;
|
|
; Arguments:
|
|
;
|
|
; None.
|
|
;
|
|
; Return Value:
|
|
;
|
|
; Carry Flag clear on success
|
|
; Carry Flag set on failure
|
|
;
|
|
;--
|
|
;
|
|
|
|
assume ds:nothing, es:nothing, fs:nothing, gs:nothing, ss:nothing
|
|
|
|
MultiplyTest proc
|
|
|
|
xor cx,cx ; 64K times is a nice round number
|
|
mlt00: push cx
|
|
call Multiply ; does this chip's multiply work?
|
|
pop cx
|
|
jc short mltx ; if c, No, exit
|
|
loop mlt00 ; if nc, YEs, loop to try again
|
|
clc
|
|
mltx:
|
|
ret
|
|
|
|
MultiplyTest endp
|
|
|
|
;++
|
|
;
|
|
; BOOLEAN
|
|
; Multiply (
|
|
; VOID
|
|
; )
|
|
;
|
|
; Routine Description:
|
|
;
|
|
; This routine performs 32-bit multiplication test which is known to
|
|
; fail on bad 386s.
|
|
;
|
|
; Note, the supplied pattern values must be used for consistent results.
|
|
;
|
|
; Arguments:
|
|
;
|
|
; None.
|
|
;
|
|
; Return Value:
|
|
;
|
|
; Carry Flag clear on success.
|
|
; Carry Flag set on failure.
|
|
;
|
|
;--
|
|
|
|
Multiply proc
|
|
|
|
mov ecx, MULTIPLIER
|
|
mov eax, MULTIPLICAND
|
|
mul ecx
|
|
|
|
cmp edx, RESULT_HIGH ; Q: high order answer OK ?
|
|
stc ; assume failure
|
|
jnz short mlpx ; N: exit with error
|
|
|
|
cmp eax, RESULT_LOW ; Q: low order answer OK ?
|
|
stc ; assume failure
|
|
jnz short mlpx ; N: exit with error
|
|
|
|
clc ; indicate success
|
|
mlpx:
|
|
ret
|
|
|
|
Multiply endp
|
|
|
|
;++
|
|
;
|
|
; BOOLEAN
|
|
; IsNpxPresent(
|
|
; VOID
|
|
; );
|
|
;
|
|
; Routine Description:
|
|
;
|
|
; This routine determines if there is any Numeric coprocessor
|
|
; present. If yes, the ET bit in CR0 will be set; otherwise
|
|
; it will be reset.
|
|
;
|
|
; Note that we do NOT determine its type (287, 387).
|
|
; This code is extracted from Intel book.
|
|
;
|
|
; Arguments:
|
|
;
|
|
; None.
|
|
;
|
|
; Return:
|
|
;
|
|
; TRUE - If NPX is present. Else a value of FALSE is returned.
|
|
;
|
|
;--
|
|
|
|
if 0
|
|
public _IsNpxPresent
|
|
_IsNpxPresent proc near
|
|
|
|
push bp ; Save caller's bp
|
|
.386p
|
|
mov eax, cr0
|
|
and eax, NOT CR0_ET ; Assume no NPX
|
|
mov edx, 0
|
|
.287
|
|
fninit ; Initialize NPX
|
|
mov cx, 5A5Ah ; Put non-zero value
|
|
push cx ; into the memory we are going to use
|
|
mov bp, sp
|
|
fnstsw word ptr [bp] ; Retrieve status - must use non-wait
|
|
cmp byte ptr [bp], 0 ; All bits cleared by fninit?
|
|
jne Inp10
|
|
|
|
or eax, CR0_ET
|
|
mov edx, 1
|
|
Inp10:
|
|
mov cr0, eax
|
|
pop ax ; clear scratch value
|
|
pop bp ; Restore caller's bp
|
|
mov eax, edx
|
|
ret
|
|
|
|
_IsNpxPresent endp
|
|
endif
|
|
|
|
ENDIF ; def ALLOW_386
|
|
|
|
_TEXT ENDS
|
|
END
|