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242 lines
7.7 KiB
242 lines
7.7 KiB
// $Header: G:/SwDev/WDM/Video/bt848/rcs/Preg.h 1.2 1998/04/29 22:43:35 tomz Exp $
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// Header file generated from zzztmp.h
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// use the macro DECLARE_regname to get declarations.
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// use the macro CONSTRUCT_regname to get constructor calls.
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#define DECLARE_COLORFORMAT RegisterDW ColorFormat; \
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RegField COLOR_EVEN; \
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RegField COLOR_ODD
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#define CONSTRUCT_COLORFORMAT ColorFormat( 0x00D4, RW), \
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COLOR_EVEN( ColorFormat, 0, 4, RW), \
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COLOR_ODD( ColorFormat, 4, 4, RW)
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#define DECLARE_COLORCONTROL RegisterDW ColorControl; \
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RegField BSWAP_EVEN; \
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RegField BSWAP_ODD; \
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RegField WSWAP_EVEN; \
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RegField WSWAP_ODD; \
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RegField GAMMA; \
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RegField RGB_DED; \
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RegField COLOR_BARS; \
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RegField EXT_FRMRATE
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#define CONSTRUCT_COLORCONTROL ColorControl( 0x00D8, RW), \
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BSWAP_EVEN( ColorControl, 0, 1, RW), \
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BSWAP_ODD( ColorControl, 1, 1, RW), \
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WSWAP_EVEN( ColorControl, 2, 1, RW), \
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WSWAP_ODD( ColorControl, 3, 1, RW), \
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GAMMA( ColorControl, 4, 1, RW), \
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RGB_DED( ColorControl, 5, 1, RW), \
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COLOR_BARS( ColorControl, 6, 1, RW), \
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EXT_FRMRATE( ColorControl, 7, 1, RW)
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#define DECLARE_CAPTURECONTROL RegisterDW CaptureControl; \
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RegField CAPTURE_EVEN; \
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RegField CAPTURE_ODD; \
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RegField CAPTURE_VBI_EVEN; \
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RegField CAPTURE_VBI_ODD; \
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RegField DITH_FRAME; \
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RegField RESERVED0
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#define CONSTRUCT_CAPTURECONTROL CaptureControl( 0x00DC, RW), \
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CAPTURE_EVEN( CaptureControl, 0, 1, RW), \
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CAPTURE_ODD( CaptureControl, 1, 1, RW), \
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CAPTURE_VBI_EVEN( CaptureControl, 2, 1, RW), \
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CAPTURE_VBI_ODD( CaptureControl, 3, 1, RW), \
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DITH_FRAME( CaptureControl, 4, 1, RW), \
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RESERVED0( CaptureControl, 5, 3, RW)
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#define DECLARE_VBIPACKETSIZE RegisterDW VBIPacketSize; \
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RegField VBI_PKT_LO
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#define CONSTRUCT_VBIPACKETSIZE VBIPacketSize( 0x00E0, RW), \
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VBI_PKT_LO( VBIPacketSize, 0, 8, RW)
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#define DECLARE_VBIDELAY RegisterDW VBIDelay; \
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RegField VBI_PKT_HI; \
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RegField EXT_RAW; \
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RegField VBI_HDELAY
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#define CONSTRUCT_VBIDELAY VBIDelay( 0x00E4, RW), \
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VBI_PKT_HI( VBIDelay, 0, 1, RW), \
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EXT_RAW( VBIDelay, 1, 1, RW), \
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VBI_HDELAY( VBIDelay, 2, 6, RW)
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#define DECLARE_INTERRUPTSTATUS RegisterDW InterruptStatus; \
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RegField FMTCHG; \
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RegField VSYNC; \
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RegField HSYNC; \
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RegField OFLOW; \
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RegField HLOCK; \
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RegField VPRES; \
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RegField RESERVED1; \
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RegField RESERVED2; \
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RegField I2CDONE; \
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RegField GPINT; \
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RegField RESERVED3; \
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RegField RISCI; \
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RegField FBUS; \
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RegField FTRGT; \
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RegField FDSR; \
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RegField PPERR; \
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RegField RIPERR; \
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RegField PABORT; \
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RegField OCERR; \
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RegField SCERR; \
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RegField RESERVED4; \
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RegField FIELD; \
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RegField RACK; \
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RegField V5IO; \
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RegField RISC_EN; \
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RegField RISCS
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#define CONSTRUCT_INTERRUPTSTATUS InterruptStatus( 0x0100, RW), \
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FMTCHG( InterruptStatus, 0, 1, RR), \
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VSYNC( InterruptStatus, 1, 1, RR), \
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HSYNC( InterruptStatus, 2, 1, RR), \
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OFLOW( InterruptStatus, 3, 1, RR), \
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HLOCK( InterruptStatus, 4, 1, RR), \
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VPRES( InterruptStatus, 5, 1, RR), \
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RESERVED1( InterruptStatus, 6, 1, RO), \
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RESERVED2( InterruptStatus, 7, 1, RO), \
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I2CDONE( InterruptStatus, 8, 1, RR), \
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GPINT( InterruptStatus, 9, 1, RR), \
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RESERVED3( InterruptStatus, 10, 1, RO), \
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RISCI( InterruptStatus, 11, 1, RR), \
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FBUS( InterruptStatus, 12, 1, RR), \
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FTRGT( InterruptStatus, 13, 1, RR), \
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FDSR( InterruptStatus, 14, 1, RR), \
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PPERR( InterruptStatus, 15, 1, RR), \
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RIPERR( InterruptStatus, 16, 1, RR), \
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PABORT( InterruptStatus, 17, 1, RR), \
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OCERR( InterruptStatus, 18, 1, RR), \
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SCERR( InterruptStatus, 19, 1, RR), \
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RESERVED4( InterruptStatus, 20, 4, RO), \
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FIELD( InterruptStatus, 24, 1, RO), \
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RACK( InterruptStatus, 25, 1, RO), \
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V5IO( InterruptStatus, 26, 1, RO), \
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RISC_EN( InterruptStatus, 27, 1, RO), \
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RISCS( InterruptStatus, 28, 4, RO)
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#define DECLARE_INTERRUPTMASK RegisterDW InterruptMask; \
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RegField IMASK_FMTCHG; \
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RegField IMASK_VSYNC; \
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RegField IMASK_HSYNC; \
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RegField IMASK_OFLOW; \
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RegField IMASK_HLOCK; \
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RegField IMASK_VPRES; \
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RegField IMASK_RESERVED6; \
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RegField IMASK_RESERVED7; \
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RegField IMASK_I2CDONE; \
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RegField IMASK_GPINT; \
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RegField IMASK_RESERVED10; \
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RegField IMASK_RISCI; \
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RegField IMASK_FBUS; \
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RegField IMASK_FTRGT; \
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RegField IMASK_FDSR; \
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RegField IMASK_PPERW; \
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RegField IMASK_RIPERW; \
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RegField IMASK_PABORT; \
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RegField IMASK_OCERW; \
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RegField IMASK_SCERW; \
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RegField IMASK_RESERVED23TO20
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#define CONSTRUCT_INTERRUPTMASK InterruptMask( 0x0104, RW), \
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IMASK_FMTCHG( InterruptMask, 0, 1, RW), \
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IMASK_VSYNC( InterruptMask, 1, 1, RW), \
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IMASK_HSYNC( InterruptMask, 2, 1, RW), \
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IMASK_OFLOW( InterruptMask, 3, 1, RW), \
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IMASK_HLOCK( InterruptMask, 4, 1, RW), \
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IMASK_VPRES( InterruptMask, 5, 1, RW), \
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IMASK_RESERVED6( InterruptMask, 6, 1, RW), \
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IMASK_RESERVED7( InterruptMask, 7, 1, RW), \
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IMASK_I2CDONE( InterruptMask, 8, 1, RW), \
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IMASK_GPINT( InterruptMask, 9, 1, RW), \
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IMASK_RESERVED10( InterruptMask, 10, 1, RW), \
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IMASK_RISCI( InterruptMask, 11, 1, RW), \
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IMASK_FBUS( InterruptMask, 12, 1, RW), \
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IMASK_FTRGT( InterruptMask, 13, 1, RW), \
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IMASK_FDSR( InterruptMask, 14, 1, RW), \
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IMASK_PPERW( InterruptMask, 15, 1, RW), \
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IMASK_RIPERW( InterruptMask, 16, 1, RW), \
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IMASK_PABORT( InterruptMask, 17, 1, RW), \
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IMASK_OCERW( InterruptMask, 18, 1, RW), \
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IMASK_SCERW( InterruptMask, 19, 1, RW), \
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IMASK_RESERVED23TO20( InterruptMask, 20, 4, RW)
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#define DECLARE_CONTROL RegisterDW Control; \
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RegField FIFO_ENABLE; \
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RegField RISC_ENABLE; \
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RegField PKTP; \
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RegField PLTP1; \
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RegField PLTP23; \
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RegField RESERVED5; \
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RegField GPCLKMODE; \
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RegField GPIOMODE; \
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RegField GPWEC; \
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RegField GPINTI; \
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RegField GPINTC
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#define CONSTRUCT_CONTROL Control( 0x010C, RW), \
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FIFO_ENABLE( Control, 0, 1, RW), \
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RISC_ENABLE( Control, 1, 1, RW), \
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PKTP( Control, 2, 2, RW), \
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PLTP1( Control, 4, 2, RW), \
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PLTP23( Control, 6, 2, RW), \
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RESERVED5( Control, 8, 2, RW), \
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GPCLKMODE( Control, 10, 1, RW), \
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GPIOMODE( Control, 11, 2, RW), \
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GPWEC( Control, 13, 1, RW), \
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GPINTI( Control, 14, 1, RW), \
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GPINTC( Control, 15, 1, RW)
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#define DECLARE_RISCPROGRAMSTARTADDRESS RegisterDW RISCProgramStartAddress; \
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RegField RISC_IPC
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#define CONSTRUCT_RISCPROGRAMSTARTADDRESS RISCProgramStartAddress( 0x0114, RW), \
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RISC_IPC( RISCProgramStartAddress, 0, 32, RW)
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#define DECLARE_GPIOOUTPUTENABLECONTROL RegisterDW GPIOOutputEnableControl; \
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RegField GPOE
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#define CONSTRUCT_GPIOOUTPUTENABLECONTROL GPIOOutputEnableControl( 0x0118, RW), \
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GPOE( GPIOOutputEnableControl, 0, 24, RW)
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#define DECLARE_GPIOREGISTEREDINPUTCONTROL RegisterDW GPIORegisteredInputControl; \
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RegField GPIE
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#define CONSTRUCT_GPIOREGISTEREDINPUTCONTROL GPIORegisteredInputControl( 0x011C, RW), \
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GPIE( GPIORegisteredInputControl, 0, 24, RW)
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#define DECLARE_GPIODATAIO RegisterDW GPIODataIO; \
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RegField GPDATA
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#define CONSTRUCT_GPIODATAIO GPIODataIO( 0x0200, RW), \
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GPDATA( GPIODataIO, 0, 24, RW)
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#define DECLARE_I2CDATA_CONTROL RegisterDW I2CData_Control; \
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RegField I2CDB0; \
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RegField I2CDB1; \
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RegField I2CDB2; \
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RegField I2CDIV; \
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RegField I2CSYNC; \
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RegField I2CW3B; \
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RegField I2CSCL; \
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RegField I2CSDA
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#define CONSTRUCT_I2CDATA_CONTROL I2CData_Control( 0x0110, RW), \
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I2CDB0( I2CData_Control, 24, 8, RV), \
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I2CDB1( I2CData_Control, 16, 8, RV), \
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I2CDB2( I2CData_Control, 8, 8, RV), \
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I2CDIV( I2CData_Control, 4, 4, RW), \
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I2CSYNC( I2CData_Control, 3, 1, RW), \
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I2CW3B( I2CData_Control, 2, 1, RW), \
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I2CSCL( I2CData_Control, 1, 1, RV), \
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I2CSDA( I2CData_Control, 0, 1, RV)
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#define DECLARE_RISCPROGRAMCOUNTER RegisterDW RISCProgramCounter
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#define CONSTRUCT_RISCPROGRAMCOUNTER RISCProgramCounter( 0x0120, RW)
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