Source code of Windows XP (NT5)
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133 lines
5.8 KiB

  1. //
  2. // p5ctrnm.h
  3. //
  4. // Offset definition file for exensible counter objects and counters
  5. //
  6. // These "relative" offsets must start at 0 and be multiples of 2 (i.e.
  7. // even numbers). In the Open Procedure, they will be added to the
  8. // "First Counter" and "First Help" values fo the device they belong to,
  9. // in order to determine the absolute location of the counter and
  10. // object names and corresponding help text in the registry.
  11. //
  12. // this file is used by the extensible counter DLL code as well as the
  13. // counter name and help text definition file (.INI) file that is used
  14. // by LODCTR to load the names into the registry.
  15. //
  16. #define PENTIUM 0
  17. #define DATA_READ 2
  18. #define DATA_WRITE 4
  19. #define DATA_TLB_MISS 6
  20. #define DATA_READ_MISS 8
  21. #define DATA_WRITE_MISS 10
  22. #define WRITE_HIT_TO_ME_LINE 12
  23. #define DATA_CACHE_LINE_WB 14
  24. #define DATA_CACHE_SNOOPS 16
  25. #define DATA_CACHE_SNOOP_HITS 18
  26. #define MEMORY_ACCESSES_IN_PIPES 20
  27. #define BANK_CONFLICTS 22
  28. #define MISADLIGNED_DATA_REF 24
  29. #define CODE_READ 26
  30. #define CODE_TLB_MISS 28
  31. #define CODE_CACHE_MISS 30
  32. #define SEGMENT_LOADS 32
  33. #define BRANCHES 38
  34. #define BTB_HITS 40
  35. #define TAKEN_BRANCH_OR_BTB_HITS 42
  36. #define PIPELINE_FLUSHES 44
  37. #define INSTRUCTIONS_EXECUTED 46
  38. #define INSTRUCTIONS_EXECUTED_IN_VPIPE 48
  39. #define BUS_UTILIZATION 50
  40. #define PIPE_STALLED_ON_WRITES 52
  41. #define PIPE_STALLED_ON_READ 54
  42. #define STALLED_WHILE_EWBE 56
  43. #define LOCKED_BUS_CYCLE 58
  44. #define IO_RW_CYCLE 60
  45. #define NON_CACHED_MEMORY_REF 62
  46. #define PIPE_STALLED_ON_ADDR_GEN 64
  47. #define FLOPS 70
  48. #define DR0 72
  49. #define DR1 74
  50. #define DR2 76
  51. #define DR3 78
  52. #define INTERRUPTS 80
  53. #define DATA_RW 82
  54. #define DATA_RW_MISS 84
  55. #define PCT_DATA_READ_MISS 86
  56. #define PCT_DATA_WRITE_MISS 88
  57. #define PCT_DATA_RW_MISS 90
  58. #define PCT_DATA_TLB_MISS 92
  59. #define PCT_DATA_SNOOP_HITS 94
  60. #define PCT_CODE_READ_MISS 96
  61. #define PCT_CODE_TLB_MISS 98
  62. #define PCT_SEGMENT_CACHE_HITS 100
  63. #define PCT_BTB_HITS 102
  64. #define PCT_VPIPE_INST 104
  65. #define PCT_BRANCHES 106
  66. #define P6_LD_BLOCKS 108
  67. #define P6_SB_DRAINS 110
  68. #define P6_MISALIGN_MEM_REF 112
  69. #define P6_SEGMENT_REG_LOADS 114
  70. #define P6_FP_COMP_OPS_EXE 116
  71. #define P6_FP_ASSIST 118
  72. #define P6_MUL 120
  73. #define P6_DIV 122
  74. #define P6_CYCLES_DIV_BUSY 124
  75. #define P6_L2_ADS 126
  76. #define P6_L2_DBUS_BUSY 128
  77. #define P6_L2_DBUS_BUSY_RD 130
  78. #define P6_L2_LINES_IN 132
  79. #define P6_L2_M_LINES_IN 134
  80. #define P6_L2_LINES_OUT 136
  81. #define P6_L2_M_LINES_OUT 138
  82. #define P6_L2_IFETCH 140
  83. #define P6_L2_LD 142
  84. #define P6_L2_ST 144
  85. #define P6_L2_RQSTS 146
  86. #define P6_DATA_MEM_REFS 148
  87. #define P6_DCU_LINES_IN 150
  88. #define P6_DCU_M_LINES_IN 152
  89. #define P6_DCU_M_LINES_OUT 154
  90. #define P6_DCU_MISS_OUTSTANDING 156
  91. #define P6_BUS_REQ_OUTSTANDING 158
  92. #define P6_BUS_BNR_DRV 160
  93. #define P6_BUS_DRDY_CLOCKS 162
  94. #define P6_BUS_LOCK_CLOCKS 164
  95. #define P6_BUS_DATA_RCV 166
  96. #define P6_BUS_TRANS_BRD 168
  97. #define P6_BUS_TRANS_RFO 170
  98. #define P6_BUS_TRANS_WB 172
  99. #define P6_BUS_TRANS_IFETCH 174
  100. #define P6_BUS_TRANS_INVAL 176
  101. #define P6_BUS_TRANS_PWR 178
  102. #define P6_BUS_TRANS_P 180
  103. #define P6_BUS_TRANS_IO 182
  104. #define P6_BUS_TRANS_DEF 184
  105. #define P6_BUS_TRANS_BURST 186
  106. #define P6_BUS_TRANS_MEM 188
  107. #define P6_BUS_TRANS_ANY 190
  108. #define P6_CPU_CLK_UNHALTED 192
  109. #define P6_BUS_HIT_DRV 194
  110. #define P6_BUS_HITM_DRV 196
  111. #define P6_BUS_SNOOP_STALL 198
  112. #define P6_IFU_IFETCH 200
  113. #define P6_IFU_IFETCH_MISS 202
  114. #define P6_ITLB_MISS 204
  115. #define P6_IFU_MEM_STALL 206
  116. #define P6_ILD_STALL 208
  117. #define P6_RESOURCE_STALLS 210
  118. #define P6_INST_RETIRED 212
  119. #define P6_FLOPS 214
  120. #define P6_UOPS_RETIRED 216
  121. #define P6_BR_INST_RETIRED 218
  122. #define P6_BR_MISS_PRED_RETIRED 220
  123. #define P6_CYCLES_INT_MASKED 222
  124. #define P6_CYCLES_INT_PENDING_AND_MASKED 224
  125. #define P6_HW_INT_RX 226
  126. #define P6_BR_TAKEN_RETIRED 228
  127. #define P6_BR_MISS_PRED_TAKEN_RET 230
  128. #define P6_INST_DECODED 232
  129. #define P6_PARTIAL_RAT_STALLS 234
  130. #define P6_BR_INST_DECODED 236
  131. #define P6_BTB_MISSES 238
  132. #define P6_BR_BOGUS 240
  133. #define P6_BACLEARS 242