Source code of Windows XP (NT5)
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  1. /*++ BUILD Version: 0001 // Increment this if a change has global effects
  2. Copyright (c) 1991 Microsoft Corporation
  3. Module Name:
  4. ixisa.h
  5. Abstract:
  6. This header file defines the private Hardware Architecture Layer (HAL)
  7. EISA/ISA specific interfaces, defines and structures.
  8. Author:
  9. Jeff Havens (jhavens) 20-Jun-91
  10. Revision History:
  11. --*/
  12. #ifndef _IXISA_
  13. #define _IXISA_
  14. //
  15. // The MAXIMUM_MAP_BUFFER_SIZE defines the maximum map buffers which the system
  16. // will allocate for devices which require phyically contigous buffers.
  17. //
  18. #define MAXIMUM_ISA_MAP_BUFFER_SIZE 0x40000
  19. #if !defined(_HALPAE_)
  20. #define MAXIMUM_MAP_BUFFER_SIZE MAXIMUM_ISA_MAP_BUFFER_SIZE
  21. #endif
  22. //
  23. // MAXIMUM_PCI_MAP_BUFFER_SIZE defines the maximum map buffers which the system
  24. // will allocate for 32-bit PCI devices on a 64-bit system.
  25. //
  26. #define MAXIMUM_PCI_MAP_BUFFER_SIZE (64 * 1024 * 1024)
  27. //
  28. // Define the initial buffer allocation size for a map buffers for systems with
  29. // no memory which has a physical address greater than MAXIMUM_PHYSICAL_ADDRESS.
  30. //
  31. #define INITIAL_MAP_BUFFER_SMALL_SIZE 0x10000
  32. //
  33. // Define the initial buffer allocation size for a map buffers for systems with
  34. // no memory which has a physical address greater than MAXIMUM_PHYSICAL_ADDRESS.
  35. //
  36. #define INITIAL_MAP_BUFFER_LARGE_SIZE 0x30000
  37. //
  38. // Define the incremental buffer allocation for a map buffers.
  39. //
  40. #define INCREMENT_MAP_BUFFER_SIZE 0x10000
  41. //
  42. // Define the maximum number of map registers that can be requested at one time
  43. // if actual map registers are required for the transfer.
  44. //
  45. #define MAXIMUM_ISA_MAP_REGISTER 16
  46. #define MAXIMUM_PCI_MAP_REGISTER 16
  47. //
  48. // Define the maximum physical address which can be handled by an Isa card.
  49. //
  50. #define MAXIMUM_PHYSICAL_ADDRESS 0x01000000
  51. //
  52. // Define the scatter/gather flag for the Map Register Base.
  53. //
  54. #define NO_SCATTER_GATHER 0x00000001
  55. //
  56. // Define the copy buffer flag for the index.
  57. //
  58. #define COPY_BUFFER 0XFFFFFFFF
  59. //
  60. // Define adapter object structure.
  61. //
  62. typedef struct _ADAPTER_OBJECT {
  63. DMA_ADAPTER DmaHeader;
  64. struct _ADAPTER_OBJECT *MasterAdapter;
  65. ULONG MapRegistersPerChannel;
  66. PVOID AdapterBaseVa;
  67. PVOID MapRegisterBase;
  68. ULONG NumberOfMapRegisters;
  69. ULONG CommittedMapRegisters;
  70. struct _WAIT_CONTEXT_BLOCK *CurrentWcb;
  71. KDEVICE_QUEUE ChannelWaitQueue;
  72. PKDEVICE_QUEUE RegisterWaitQueue;
  73. LIST_ENTRY AdapterQueue;
  74. KSPIN_LOCK SpinLock;
  75. PRTL_BITMAP MapRegisters;
  76. PUCHAR PagePort;
  77. UCHAR ChannelNumber;
  78. UCHAR AdapterNumber;
  79. USHORT DmaPortAddress;
  80. UCHAR AdapterMode;
  81. BOOLEAN NeedsMapRegisters;
  82. BOOLEAN MasterDevice;
  83. BOOLEAN Width16Bits;
  84. BOOLEAN ScatterGather;
  85. BOOLEAN IgnoreCount;
  86. BOOLEAN Dma32BitAddresses;
  87. BOOLEAN Dma64BitAddresses;
  88. LIST_ENTRY AdapterList;
  89. } ADAPTER_OBJECT;
  90. typedef struct _MASTER_ADAPTER_OBJECT {
  91. PADAPTER_OBJECT AdapterObject;
  92. //
  93. // Maximum number of buffers to allocate for this master adapter.
  94. //
  95. ULONG MaxBufferPages;
  96. //
  97. // Number of map buffers allocated
  98. //
  99. ULONG MapBufferSize;
  100. PHYSICAL_ADDRESS MapBufferPhysicalAddress;
  101. } MASTER_ADAPTER_OBJECT, *PMASTER_ADAPTER_OBJECT;
  102. ULONG
  103. HalGetDmaAlignment (
  104. PVOID Conext
  105. );
  106. NTSTATUS
  107. HalCalculateScatterGatherListSize(
  108. IN PADAPTER_OBJECT AdapterObject,
  109. IN OPTIONAL PMDL Mdl,
  110. IN PVOID CurrentVa,
  111. IN ULONG Length,
  112. OUT PULONG ScatterGatherListSize,
  113. OUT OPTIONAL PULONG pNumberOfMapRegisters
  114. );
  115. NTSTATUS
  116. HalBuildScatterGatherList (
  117. IN PADAPTER_OBJECT AdapterObject,
  118. IN PDEVICE_OBJECT DeviceObject,
  119. IN PMDL Mdl,
  120. IN PVOID CurrentVa,
  121. IN ULONG Length,
  122. IN PDRIVER_LIST_CONTROL ExecutionRoutine,
  123. IN PVOID Context,
  124. IN BOOLEAN WriteToDevice,
  125. IN PVOID ScatterGatherBuffer,
  126. IN ULONG ScatterGatherBufferLength
  127. );
  128. NTSTATUS
  129. HalBuildMdlFromScatterGatherList(
  130. IN PADAPTER_OBJECT AdapaterObject,
  131. IN PSCATTER_GATHER_LIST ScatterGather,
  132. IN PMDL OriginalMdl,
  133. OUT PMDL *TargetMdl
  134. );
  135. PHYSICAL_ADDRESS
  136. __inline
  137. HalpGetAdapterMaximumPhysicalAddress(
  138. IN PADAPTER_OBJECT AdapterObject
  139. )
  140. /*++
  141. Routine Description:
  142. This routine determines and returns the maximum physical address that
  143. can be accessed by the given adapter.
  144. Arguments:
  145. AdapterObject - Supplies a pointer to the adapter object used by this
  146. device.
  147. Return Value:
  148. Returns the maximum physical address that can be accessed by this
  149. device.
  150. --*/
  151. {
  152. PHYSICAL_ADDRESS maximumAddress;
  153. //
  154. // Assume the device requires physical addresses < 16M.
  155. //
  156. maximumAddress.HighPart = 0;
  157. maximumAddress.LowPart = MAXIMUM_PHYSICAL_ADDRESS - 1;
  158. //
  159. // IoMapTransfer() is sometimes called with a NULL adapter object. In
  160. // this case, assume the adapter is 24 bit.
  161. //
  162. if (AdapterObject == NULL) {
  163. return maximumAddress;
  164. }
  165. if (AdapterObject->MasterDevice) {
  166. if (AdapterObject->Dma64BitAddresses) {
  167. //
  168. // This device is a master and can handle 64 bit addresses.
  169. //
  170. maximumAddress.QuadPart = (ULONGLONG)-1;
  171. } else if(AdapterObject->Dma32BitAddresses) {
  172. //
  173. // This device is a master and can handle 32 bit addresses.
  174. //
  175. maximumAddress.LowPart = (ULONG)-1;
  176. }
  177. }
  178. return maximumAddress;
  179. }
  180. #endif // _IXISA_