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/*++
Copyright (c) 1992-2000 Microsoft Corporation
Module Name: findreg.c
Abstract: Maps CV register values to debugger's values
Environment:
User Mode.
Revision History:
Kshitiz K. Sharma (kksharma) 3/6/2000
--*/
#include "private.h"
#include "cvinfo.h"
#include "..\ntsd64\i386_reg.h"
#include "..\ntsd64\ia64_reg.h"
#include "..\ntsd64\alpha_reg.h"
typedef struct _REGISTER_LOOKUP { ULONG CVReg; ULONG DbgReg;} REGISTER_LOOKUP, *PREGISTER_LOOKUP;
REGISTER_LOOKUP gRegLookupX86[] = { { CV_REG_AL, X86_AL}, { CV_REG_CL, X86_CL}, { CV_REG_DL, X86_DL}, { CV_REG_BL, X86_BL}, { CV_REG_AH, X86_AH}, { CV_REG_CH, X86_CH}, { CV_REG_DH, X86_DH}, { CV_REG_BH, X86_BH}, { CV_REG_AX, X86_AX}, { CV_REG_CX, X86_CX}, { CV_REG_DX, X86_DX}, { CV_REG_BX, X86_BX}, { CV_REG_SP, X86_SP}, { CV_REG_BP, X86_BP}, { CV_REG_SI, X86_SI}, { CV_REG_DI, X86_DI}, { CV_REG_EAX, X86_EAX}, { CV_REG_ECX, X86_ECX}, { CV_REG_EDX, X86_EDX}, { CV_REG_EBX, X86_EBX}, { CV_REG_ESP, X86_ESP}, { CV_REG_EBP, X86_EBP}, { CV_REG_ESI, X86_ESI}, { CV_REG_EDI, X86_EDI}, { CV_REG_ES, X86_ES}, { CV_REG_CS, X86_CS}, { CV_REG_SS, X86_SS}, { CV_REG_DS, X86_DS}, { CV_REG_FS, X86_FS}, { CV_REG_GS, X86_GS}, { CV_REG_IP, X86_IP}, { CV_REG_FLAGS, X86_FL}, { CV_REG_EIP, X86_EIP}, { CV_REG_EFLAGS, X86_EFL},// { CV_REG_TEMP, REGTEMP},
// { CV_REG_TEMPH, REGTEMPH},
// { CV_REG_QUOTE, REGQUOTE},
// { CV_REG_PCDR3, REGPCDR3},
// { CV_REG_PCDR4, REGPCDR4},
// { CV_REG_PCDR5, REGPCDR5},
// { CV_REG_PCDR6, REGPCDR6},
// { CV_REG_PCDR7, REGPCDR7},
{ CV_REG_CR0, X86_CR0},// { CV_REG_CR1, REGCR1},
{ CV_REG_CR2, X86_CR2}, { CV_REG_CR3, X86_CR3}, { CV_REG_CR4, X86_CR4}, { CV_REG_DR0, X86_DR0}, { CV_REG_DR1, X86_DR1}, { CV_REG_DR2, X86_DR2}, { CV_REG_DR3, X86_DR3},// { CV_REG_DR4, REGDR4},
// { CV_REG_DR5, REGDR5},
{ CV_REG_DR6, X86_DR6}, { CV_REG_DR7, X86_DR7}, { CV_REG_GDTR, X86_GDTR}, { CV_REG_GDTL, X86_GDTL}, { CV_REG_IDTR, X86_IDTR}, { CV_REG_IDTL, X86_IDTL}, { CV_REG_LDTR, X86_LDTR}, { CV_REG_TR, X86_TR},
// { CV_REG_PSEUDO1, REGPSEUDO1},
// { CV_REG_PSEUDO2, REGPSEUDO2},
// { CV_REG_PSEUDO3, REGPSEUDO3},
// { CV_REG_PSEUDO4, REGPSEUDO4},
// { CV_REG_PSEUDO5, REGPSEUDO5},
// { CV_REG_PSEUDO6, REGPSEUDO6},
// { CV_REG_PSEUDO7, REGPSEUDO7},
// { CV_REG_PSEUDO8, REGPSEUDO8},
// { CV_REG_PSEUDO9, REGPSEUDO9},
{ CV_REG_ST0, X86_ST0}, { CV_REG_ST1, X86_ST1}, { CV_REG_ST2, X86_ST2}, { CV_REG_ST3, X86_ST3}, { CV_REG_ST4, X86_ST4}, { CV_REG_ST5, X86_ST5}, { CV_REG_ST6, X86_ST6}, { CV_REG_ST7, X86_ST7}, { CV_REG_CTRL, X86_FPCW}, { CV_REG_STAT, X86_FPSW}, { CV_REG_TAG, X86_FPTW},// { CV_REG_FPIP, REGFPIP},
// { CV_REG_FPCS, REGFPCS},
// { CV_REG_FPDO, REGFPDO},
// { CV_REG_FPDS, REGFPDS},
// { CV_REG_ISEM, REGISEM},
// { CV_REG_FPEIP, REGFPEIP},
// { CV_REG_FPEDO, REGFPEDO},
{ CV_REG_MM0, X86_MM0}, { CV_REG_MM1, X86_MM1}, { CV_REG_MM2, X86_MM2}, { CV_REG_MM3, X86_MM3}, { CV_REG_MM4, X86_MM4}, { CV_REG_MM5, X86_MM5}, { CV_REG_MM6, X86_MM6}, { CV_REG_MM7, X86_MM7},
};
REGISTER_LOOKUP gRegLookupIa64[] = {
// Branch Registers
{ CV_IA64_Br0, BRRP}, { CV_IA64_Br1, BRS0}, { CV_IA64_Br2, BRS1}, { CV_IA64_Br3, BRS2}, { CV_IA64_Br4, BRS3}, { CV_IA64_Br5, BRS4}, { CV_IA64_Br6, BRT0}, { CV_IA64_Br7, BRT1},
// Predicate Registers
{ CV_IA64_Preds, PREDS},
// Banked General Registers
/*
{ CV_IA64_IntH0, IntH0}, { CV_IA64_IntH1, IntH1}, { CV_IA64_IntH2, IntH2}, { CV_IA64_IntH3, IntH3}, { CV_IA64_IntH4, IntH4}, { CV_IA64_IntH5, IntH5}, { CV_IA64_IntH6, IntH6}, { CV_IA64_IntH7, IntH7}, { CV_IA64_IntH8, IntH8}, { CV_IA64_IntH9, IntH9}, { CV_IA64_IntH10, IntH10}, { CV_IA64_IntH11, IntH11}, { CV_IA64_IntH12, IntH12}, { CV_IA64_IntH13, IntH13}, { CV_IA64_IntH14, IntH14}, { CV_IA64_IntH15, IntH15},
// Special Registers
{ CV_IA64_Ip, Ip}, { CV_IA64_Umask, Umask}, { CV_IA64_Cfm, Cfm}, { CV_IA64_Psr, Psr},
// Banked General Registers
{ CV_IA64_Nats, Nats}, { CV_IA64_Nats2, Nats2}, { CV_IA64_Nats3, Nats3},*/ // General-Purpose Registers
// INTEGER REGISTER
// { CV_IA64_IntR0, IntZero},
{ CV_IA64_IntR1, INTGP}, { CV_IA64_IntR2, INTT0}, { CV_IA64_IntR3, INTT1}, { CV_IA64_IntR4, INTS0}, { CV_IA64_IntR5, INTS1}, { CV_IA64_IntR6, INTS2}, { CV_IA64_IntR7, INTS3}, { CV_IA64_IntR8, INTV0},// { CV_IA64_IntR9, INTAP},
{ CV_IA64_IntR10, INTT2}, { CV_IA64_IntR11, INTT3}, { CV_IA64_IntR12, INTSP}, { CV_IA64_IntR13, INTT4}, { CV_IA64_IntR14, INTT5}, { CV_IA64_IntR15, INTT6}, { CV_IA64_IntR16, INTT7}, { CV_IA64_IntR17, INTT8}, { CV_IA64_IntR18, INTT9}, { CV_IA64_IntR19, INTT10}, { CV_IA64_IntR20, INTT11}, { CV_IA64_IntR21, INTT12}, { CV_IA64_IntR22, INTT13}, { CV_IA64_IntR23, INTT14}, { CV_IA64_IntR24, INTT15}, { CV_IA64_IntR25, INTT16}, { CV_IA64_IntR26, INTT17}, { CV_IA64_IntR27, INTT18}, { CV_IA64_IntR28, INTT19}, { CV_IA64_IntR29, INTT20}, { CV_IA64_IntR30, INTT21}, { CV_IA64_IntR31, INTT22},
// Register Stack
{ CV_IA64_IntR32, INTR32}, { CV_IA64_IntR33, INTR33}, { CV_IA64_IntR34, INTR34}, { CV_IA64_IntR35, INTR35}, { CV_IA64_IntR36, INTR36}, { CV_IA64_IntR37, INTR37}, { CV_IA64_IntR38, INTR38}, { CV_IA64_IntR39, INTR39}, { CV_IA64_IntR40, INTR40}, { CV_IA64_IntR41, INTR41}, { CV_IA64_IntR42, INTR42}, { CV_IA64_IntR43, INTR43}, { CV_IA64_IntR44, INTR44}, { CV_IA64_IntR45, INTR45}, { CV_IA64_IntR46, INTR46}, { CV_IA64_IntR47, INTR47}, { CV_IA64_IntR48, INTR48}, { CV_IA64_IntR49, INTR49}, { CV_IA64_IntR50, INTR50}, { CV_IA64_IntR51, INTR51}, { CV_IA64_IntR52, INTR52}, { CV_IA64_IntR53, INTR53}, { CV_IA64_IntR54, INTR54}, { CV_IA64_IntR55, INTR55}, { CV_IA64_IntR56, INTR56}, { CV_IA64_IntR57, INTR57}, { CV_IA64_IntR58, INTR58}, { CV_IA64_IntR59, INTR59}, { CV_IA64_IntR60, INTR60}, { CV_IA64_IntR61, INTR61}, { CV_IA64_IntR62, INTR62}, { CV_IA64_IntR63, INTR63}, { CV_IA64_IntR64, INTR64}, { CV_IA64_IntR65, INTR65}, { CV_IA64_IntR66, INTR66}, { CV_IA64_IntR67, INTR67}, { CV_IA64_IntR68, INTR68}, { CV_IA64_IntR69, INTR69}, { CV_IA64_IntR70, INTR70}, { CV_IA64_IntR71, INTR71}, { CV_IA64_IntR72, INTR72}, { CV_IA64_IntR73, INTR73}, { CV_IA64_IntR74, INTR74}, { CV_IA64_IntR75, INTR75}, { CV_IA64_IntR76, INTR76}, { CV_IA64_IntR77, INTR77}, { CV_IA64_IntR78, INTR78}, { CV_IA64_IntR79, INTR79}, { CV_IA64_IntR80, INTR80}, { CV_IA64_IntR81, INTR81}, { CV_IA64_IntR82, INTR82}, { CV_IA64_IntR83, INTR83}, { CV_IA64_IntR84, INTR84}, { CV_IA64_IntR85, INTR85}, { CV_IA64_IntR86, INTR86}, { CV_IA64_IntR87, INTR87}, { CV_IA64_IntR88, INTR88}, { CV_IA64_IntR89, INTR89}, { CV_IA64_IntR90, INTR90}, { CV_IA64_IntR91, INTR91}, { CV_IA64_IntR92, INTR92}, { CV_IA64_IntR93, INTR93}, { CV_IA64_IntR94, INTR94}, { CV_IA64_IntR95, INTR95}, { CV_IA64_IntR96, INTR96}, { CV_IA64_IntR97, INTR97}, { CV_IA64_IntR98, INTR98}, { CV_IA64_IntR99, INTR99}, { CV_IA64_IntR100, INTR100}, { CV_IA64_IntR101, INTR101}, { CV_IA64_IntR102, INTR102}, { CV_IA64_IntR103, INTR103}, { CV_IA64_IntR104, INTR104}, { CV_IA64_IntR105, INTR105}, { CV_IA64_IntR106, INTR106}, { CV_IA64_IntR107, INTR107}, { CV_IA64_IntR108, INTR108}, { CV_IA64_IntR109, INTR109}, { CV_IA64_IntR110, INTR110}, { CV_IA64_IntR111, INTR111}, { CV_IA64_IntR112, INTR112}, { CV_IA64_IntR113, INTR113}, { CV_IA64_IntR114, INTR114}, { CV_IA64_IntR115, INTR115}, { CV_IA64_IntR116, INTR116}, { CV_IA64_IntR117, INTR117}, { CV_IA64_IntR118, INTR118}, { CV_IA64_IntR119, INTR119}, { CV_IA64_IntR120, INTR120}, { CV_IA64_IntR121, INTR121}, { CV_IA64_IntR122, INTR122}, { CV_IA64_IntR123, INTR123}, { CV_IA64_IntR124, INTR124}, { CV_IA64_IntR125, INTR125}, { CV_IA64_IntR126, INTR126}, { CV_IA64_IntR127, INTR127},
// Floating-Point Registers
// Low Floating Point Registers
// { CV_IA64_FltF0, FltZero},
// { CV_IA64_FltF1, FltOne},
{ CV_IA64_FltF2, FLTS0}, { CV_IA64_FltF3, FLTS1}, { CV_IA64_FltF4, FLTS2}, { CV_IA64_FltF5, FLTS3}, { CV_IA64_FltF6, FLTT0}, { CV_IA64_FltF7, FLTT1}, { CV_IA64_FltF8, FLTT2}, { CV_IA64_FltF9, FLTT3}, { CV_IA64_FltF10, FLTT4}, { CV_IA64_FltF11, FLTT5}, { CV_IA64_FltF12, FLTT6}, { CV_IA64_FltF13, FLTT7}, { CV_IA64_FltF14, FLTT8}, { CV_IA64_FltF15, FLTT9}, { CV_IA64_FltF16, FLTS4}, { CV_IA64_FltF17, FLTS5}, { CV_IA64_FltF18, FLTS6}, { CV_IA64_FltF19, FLTS7}, { CV_IA64_FltF20, FLTS8}, { CV_IA64_FltF21, FLTS9}, { CV_IA64_FltF22, FLTS10}, { CV_IA64_FltF23, FLTS11}, { CV_IA64_FltF24, FLTS12}, { CV_IA64_FltF25, FLTS13}, { CV_IA64_FltF26, FLTS14}, { CV_IA64_FltF27, FLTS15}, { CV_IA64_FltF28, FLTS16}, { CV_IA64_FltF29, FLTS17}, { CV_IA64_FltF30, FLTS18}, { CV_IA64_FltF31, FLTS19},
// High Floating POINT REGISters
{ CV_IA64_FltF32, FLTF32}, { CV_IA64_FltF33, FLTF33}, { CV_IA64_FltF34, FLTF34}, { CV_IA64_FltF35, FLTF35}, { CV_IA64_FltF36, FLTF36}, { CV_IA64_FltF37, FLTF37}, { CV_IA64_FltF38, FLTF38}, { CV_IA64_FltF39, FLTF39}, { CV_IA64_FltF40, FLTF40}, { CV_IA64_FltF41, FLTF41}, { CV_IA64_FltF42, FLTF42}, { CV_IA64_FltF43, FLTF43}, { CV_IA64_FltF44, FLTF44}, { CV_IA64_FltF45, FLTF45}, { CV_IA64_FltF46, FLTF46}, { CV_IA64_FltF47, FLTF47}, { CV_IA64_FltF48, FLTF48}, { CV_IA64_FltF49, FLTF49}, { CV_IA64_FltF50, FLTF50}, { CV_IA64_FltF51, FLTF51}, { CV_IA64_FltF52, FLTF52}, { CV_IA64_FltF53, FLTF53}, { CV_IA64_FltF54, FLTF54}, { CV_IA64_FltF55, FLTF55}, { CV_IA64_FltF56, FLTF56}, { CV_IA64_FltF57, FLTF57}, { CV_IA64_FltF58, FLTF58}, { CV_IA64_FltF59, FLTF59}, { CV_IA64_FltF60, FLTF60}, { CV_IA64_FltF61, FLTF61}, { CV_IA64_FltF62, FLTF62}, { CV_IA64_FltF63, FLTF63}, { CV_IA64_FltF64, FLTF64}, { CV_IA64_FltF65, FLTF65}, { CV_IA64_FltF66, FLTF66}, { CV_IA64_FltF67, FLTF67}, { CV_IA64_FltF68, FLTF68}, { CV_IA64_FltF69, FLTF69}, { CV_IA64_FltF70, FLTF70}, { CV_IA64_FltF71, FLTF71}, { CV_IA64_FltF72, FLTF72}, { CV_IA64_FltF73, FLTF73}, { CV_IA64_FltF74, FLTF74}, { CV_IA64_FltF75, FLTF75}, { CV_IA64_FltF76, FLTF76}, { CV_IA64_FltF77, FLTF77}, { CV_IA64_FltF78, FLTF78}, { CV_IA64_FltF79, FLTF79}, { CV_IA64_FltF80, FLTF80}, { CV_IA64_FltF81, FLTF81}, { CV_IA64_FltF82, FLTF82}, { CV_IA64_FltF83, FLTF83}, { CV_IA64_FltF84, FLTF84}, { CV_IA64_FltF85, FLTF85}, { CV_IA64_FltF86, FLTF86}, { CV_IA64_FltF87, FLTF87}, { CV_IA64_FltF88, FLTF88}, { CV_IA64_FltF89, FLTF89}, { CV_IA64_FltF90, FLTF90}, { CV_IA64_FltF91, FLTF91}, { CV_IA64_FltF92, FLTF92}, { CV_IA64_FltF93, FLTF93}, { CV_IA64_FltF94, FLTF94}, { CV_IA64_FltF95, FLTF95}, { CV_IA64_FltF96, FLTF96}, { CV_IA64_FltF97, FLTF97}, { CV_IA64_FltF98, FLTF98}, { CV_IA64_FltF99, FLTF99}, { CV_IA64_FltF100, FLTF100}, { CV_IA64_FltF101, FLTF101}, { CV_IA64_FltF102, FLTF102}, { CV_IA64_FltF103, FLTF103}, { CV_IA64_FltF104, FLTF104}, { CV_IA64_FltF105, FLTF105}, { CV_IA64_FltF106, FLTF106}, { CV_IA64_FltF107, FLTF107}, { CV_IA64_FltF108, FLTF108}, { CV_IA64_FltF109, FLTF109}, { CV_IA64_FltF110, FLTF110}, { CV_IA64_FltF111, FLTF111}, { CV_IA64_FltF112, FLTF112}, { CV_IA64_FltF113, FLTF113}, { CV_IA64_FltF114, FLTF114}, { CV_IA64_FltF115, FLTF115}, { CV_IA64_FltF116, FLTF116}, { CV_IA64_FltF117, FLTF117}, { CV_IA64_FltF118, FLTF118}, { CV_IA64_FltF119, FLTF119}, { CV_IA64_FltF120, FLTF120}, { CV_IA64_FltF121, FLTF121}, { CV_IA64_FltF122, FLTF122}, { CV_IA64_FltF123, FLTF123}, { CV_IA64_FltF124, FLTF124}, { CV_IA64_FltF125, FLTF125}, { CV_IA64_FltF126, FLTF126}, { CV_IA64_FltF127, FLTF127},
// Application Registers
{ CV_IA64_ApKR0, APKR0}, { CV_IA64_ApKR1, APKR1}, { CV_IA64_ApKR2, APKR2}, { CV_IA64_ApKR3, APKR3}, { CV_IA64_ApKR4, APKR4}, { CV_IA64_ApKR5, APKR5}, { CV_IA64_ApKR6, APKR6}, { CV_IA64_ApKR7, APKR7},/* { CV_IA64_AR8, AR8},
{ CV_IA64_AR9, AR9}, { CV_IA64_AR10, AR10}, { CV_IA64_AR11, AR11}, { CV_IA64_AR12, AR12}, { CV_IA64_AR13, AR13}, { CV_IA64_AR14, AR14}, { CV_IA64_AR15, AR15},*/ { CV_IA64_RsRSC, RSRSC}, { CV_IA64_RsBSP, RSBSP}, { CV_IA64_RsBSPSTORE, RSBSPSTORE}, { CV_IA64_RsRNAT, RSRNAT},// { CV_IA64_AR20, AR20},
{ CV_IA64_StFCR, StFCR},// { CV_IA64_AR22, AR22},
// { CV_IA64_AR23, AR23},
{ CV_IA64_EFLAG, Eflag}, { CV_IA64_CSD, SegCSD}, { CV_IA64_SSD, SegSSD}, { CV_IA64_CFLG, Cflag}, { CV_IA64_StFSR, STFSR}, { CV_IA64_StFIR, STFIR}, { CV_IA64_StFDR, STFDR},// { CV_IA64_AR31, AR31},
{ CV_IA64_ApCCV, APCCV},// { CV_IA64_AR33, AR33},
// { CV_IA64_AR34, AR34},
// { CV_IA64_AR35, AR35},
{ CV_IA64_ApUNAT, APUNAT},// { CV_IA64_AR37, AR37},
// { CV_IA64_AR38, AR38},
// { CV_IA64_AR39, AR39},
{ CV_IA64_StFPSR, STFPSR},// { CV_IA64_AR41, AR41},
// { CV_IA64_AR42, AR42},
// { CV_IA64_AR43, AR43},
{ CV_IA64_ApITC, APITC},/* { CV_IA64_AR45, AR45},
{ CV_IA64_AR46, AR46}, { CV_IA64_AR47, AR47}, { CV_IA64_AR48, AR48}, { CV_IA64_AR49, AR49}, { CV_IA64_AR50, AR50}, { CV_IA64_AR51, AR51}, { CV_IA64_AR52, AR52}, { CV_IA64_AR53, AR53}, { CV_IA64_AR54, AR54}, { CV_IA64_AR55, AR55}, { CV_IA64_AR56, AR56}, { CV_IA64_AR57, AR57}, { CV_IA64_AR58, AR58}, { CV_IA64_AR59, AR59}, { CV_IA64_AR60, AR60}, { CV_IA64_AR61, AR61}, { CV_IA64_AR62, AR62}, { CV_IA64_AR63, AR63},*/ { CV_IA64_RsPFS, RSPFS}, { CV_IA64_ApLC, APLC}, { CV_IA64_ApEC, APEC},/* { CV_IA64_AR67, AR67},
{ CV_IA64_AR68, AR68}, { CV_IA64_AR69, AR69}, { CV_IA64_AR70, AR70}, { CV_IA64_AR71, AR71}, { CV_IA64_AR72, AR72}, { CV_IA64_AR73, AR73}, { CV_IA64_AR74, AR74}, { CV_IA64_AR75, AR75}, { CV_IA64_AR76, AR76}, { CV_IA64_AR77, AR77}, { CV_IA64_AR78, AR78}, { CV_IA64_AR79, AR79}, { CV_IA64_AR80, AR80}, { CV_IA64_AR81, AR81}, { CV_IA64_AR82, AR82}, { CV_IA64_AR83, AR83}, { CV_IA64_AR84, AR84}, { CV_IA64_AR85, AR85}, { CV_IA64_AR86, AR86}, { CV_IA64_AR87, AR87}, { CV_IA64_AR88, AR88}, { CV_IA64_AR89, AR89}, { CV_IA64_AR90, AR90}, { CV_IA64_AR91, AR91}, { CV_IA64_AR92, AR92}, { CV_IA64_AR93, AR93}, { CV_IA64_AR94, AR94}, { CV_IA64_AR95, AR95}, { CV_IA64_AR96, AR96}, { CV_IA64_AR97, AR97}, { CV_IA64_AR98, AR98}, { CV_IA64_AR99, AR99}, { CV_IA64_AR100, AR100}, { CV_IA64_AR101, AR101}, { CV_IA64_AR102, AR102}, { CV_IA64_AR103, AR103}, { CV_IA64_AR104, AR104}, { CV_IA64_AR105, AR105}, { CV_IA64_AR106, AR106}, { CV_IA64_AR107, AR107}, { CV_IA64_AR108, AR108}, { CV_IA64_AR109, AR109}, { CV_IA64_AR110, AR110}, { CV_IA64_AR111, AR111}, { CV_IA64_AR112, AR112}, { CV_IA64_AR113, AR113}, { CV_IA64_AR114, AR114}, { CV_IA64_AR115, AR115}, { CV_IA64_AR116, AR116}, { CV_IA64_AR117, AR117}, { CV_IA64_AR118, AR118}, { CV_IA64_AR119, AR119}, { CV_IA64_AR120, AR120}, { CV_IA64_AR121, AR121}, { CV_IA64_AR122, AR122}, { CV_IA64_AR123, AR123}, { CV_IA64_AR124, AR124}, { CV_IA64_AR125, AR125}, { CV_IA64_AR126, AR126}, { CV_IA64_AR127, AR127},*/ // Control RegisteRS
{ CV_IA64_ApDCR, APDCR}, { CV_IA64_ApITM, APITM}, { CV_IA64_ApIVA, APIVA},// { CV_IA64_CR3, CR3},
// { CV_IA64_CR4, CR4},
// { CV_IA64_CR5, CR5},
// { CV_IA64_CR6, CR6},
// { CV_IA64_CR7, CR7},
{ CV_IA64_ApPTA, APPTA},// { CV_IA64_CR9, CR9},
// { CV_IA64_CR10, CR10},
// { CV_IA64_CR11, CR11},
// { CV_IA64_CR12, CR12},
// { CV_IA64_CR13, CR13},
// { CV_IA64_CR14, CR14},
// { CV_IA64_CR15, CR15},
{ CV_IA64_StIPSR, STIPSR}, { CV_IA64_StISR, STISR}, { CV_IA64_CR18, STIDA}, { CV_IA64_StIIP, STIIP},// { CV_IA64_StIDTR, STIDTR},
{ CV_IA64_StIFA, STIITR}, { CV_IA64_StIIPA, STIIPA}, { CV_IA64_StIFS, STIFS}, { CV_IA64_StIIM, STIIM}, { CV_IA64_StIHA, STIHA},/* { CV_IA64_CR26, CR26},
{ CV_IA64_CR27, CR27}, { CV_IA64_CR28, CR28}, { CV_IA64_CR29, CR29}, { CV_IA64_CR30, CR30}, { CV_IA64_CR31, CR31}, { CV_IA64_CR32, CR32}, { CV_IA64_CR33, CR33}, { CV_IA64_CR34, CR34}, { CV_IA64_CR35, CR35}, { CV_IA64_CR36, CR36}, { CV_IA64_CR37, CR37}, { CV_IA64_CR38, CR38}, { CV_IA64_CR39, CR39}, { CV_IA64_CR40, CR40}, { CV_IA64_CR41, CR41}, { CV_IA64_CR42, CR42}, { CV_IA64_CR43, CR43}, { CV_IA64_CR44, CR44}, { CV_IA64_CR45, CR45}, { CV_IA64_CR46, CR46}, { CV_IA64_CR47, CR47}, { CV_IA64_CR48, CR48}, { CV_IA64_CR49, CR49}, { CV_IA64_CR50, CR50}, { CV_IA64_CR51, CR51}, { CV_IA64_CR52, CR52}, { CV_IA64_CR53, CR53}, { CV_IA64_CR54, CR54}, { CV_IA64_CR55, CR55}, { CV_IA64_CR56, CR56}, { CV_IA64_CR57, CR57}, { CV_IA64_CR58, CR58}, { CV_IA64_CR59, CR59}, { CV_IA64_CR60, CR60}, { CV_IA64_CR61, CR61}, { CV_IA64_CR62, CR62}, { CV_IA64_CR63, CR63}, { CV_IA64_CR64, CR64}, { CV_IA64_CR65, CR65},*/ { CV_IA64_SaLID, SALID},// { CV_IA64_CR67, CR67},
// { CV_IA64_CR68, CR68},
// { CV_IA64_CR69, CR69},
// { CV_IA64_CR70, CR70},
{ CV_IA64_SaIVR, SAIVR}, { CV_IA64_SaTPR, SATPR},// { CV_IA64_CR73, CR73},
// { CV_IA64_CR74, CR74},
{ CV_IA64_SaEOI, SAEOI},/* { CV_IA64_CR76, CR76},
{ CV_IA64_CR77, CR77}, { CV_IA64_CR78, CR78}, { CV_IA64_CR79, CR79}, { CV_IA64_CR80, CR80}, { CV_IA64_CR81, CR81}, { CV_IA64_CR82, CR82}, { CV_IA64_CR83, CR83}, { CV_IA64_CR84, CR84}, { CV_IA64_CR85, CR85}, { CV_IA64_CR86, CR86}, { CV_IA64_CR87, CR87}, { CV_IA64_CR88, CR88}, { CV_IA64_CR89, CR89}, { CV_IA64_CR90, CR90}, { CV_IA64_CR91, CR91}, { CV_IA64_CR92, CR92}, { CV_IA64_CR93, CR93}, { CV_IA64_CR94, CR94}, { CV_IA64_CR95, CR95},*/ { CV_IA64_SaIRR0, SAIRR0},// { CV_IA64_CR97, CR97},
{ CV_IA64_SaIRR1, SAIRR1},// { CV_IA64_CR99, CR99},
{ CV_IA64_SaIRR2, SAIRR2},// { CV_IA64_CR101, CR101},
{ CV_IA64_SaIRR3, SAIRR3},/* { CV_IA64_CR103, CR103},
{ CV_IA64_CR104, CR104}, { CV_IA64_CR105, CR105}, { CV_IA64_CR106, CR106}, { CV_IA64_CR107, CR107}, { CV_IA64_CR108, CR108}, { CV_IA64_CR109, CR109}, { CV_IA64_CR110, CR110}, { CV_IA64_CR111, CR111}, { CV_IA64_CR112, CR112}, { CV_IA64_CR113, CR113},*/ { CV_IA64_SaITV, SAITV},// { CV_IA64_CR115, CR115},
{ CV_IA64_SaPMV, SAPMV}, { CV_IA64_SaLRR0, SALRR0}, { CV_IA64_SaLRR1, SALRR1}, { CV_IA64_SaCMCV, SACMCV},// { CV_IA64_CR120, CR120},
// { CV_IA64_CR121, CR121},
// { CV_IA64_CR122, CR122},
// { CV_IA64_CR123, CR123},
// { CV_IA64_CR124, CR124},
// { CV_IA64_CR125, CR125},
// { CV_IA64_CR126, CR126},
// { CV_IA64_CR127, CR127},
// Protection Key Registers
{ CV_IA64_Pkr0, SRPKR0}, { CV_IA64_Pkr1, SRPKR1}, { CV_IA64_Pkr2, SRPKR2}, { CV_IA64_Pkr3, SRPKR3}, { CV_IA64_Pkr4, SRPKR4}, { CV_IA64_Pkr5, SRPKR5}, { CV_IA64_Pkr6, SRPKR6}, { CV_IA64_Pkr7, SRPKR7}, { CV_IA64_Pkr8, SRPKR8}, { CV_IA64_Pkr9, SRPKR9}, { CV_IA64_Pkr10, SRPKR10}, { CV_IA64_Pkr11, SRPKR11}, { CV_IA64_Pkr12, SRPKR12}, { CV_IA64_Pkr13, SRPKR13}, { CV_IA64_Pkr14, SRPKR14}, { CV_IA64_Pkr15, SRPKR15},
// REGION REGISTERS
{ CV_IA64_Rr0, SRRR0}, { CV_IA64_Rr1, SRRR1}, { CV_IA64_Rr2, SRRR2}, { CV_IA64_Rr3, SRRR3}, { CV_IA64_Rr4, SRRR4}, { CV_IA64_Rr5, SRRR5}, { CV_IA64_Rr6, SRRR6}, { CV_IA64_Rr7, SRRR7},
// PERFORMANCE MONITOR DATA REGISTERS
{ CV_IA64_PFD0, KRPFD0}, { CV_IA64_PFD1, KRPFD1}, { CV_IA64_PFD2, KRPFD2}, { CV_IA64_PFD3, KRPFD3}, { CV_IA64_PFD4, KRPFD4}, { CV_IA64_PFD5, KRPFD5}, { CV_IA64_PFD6, KRPFD6}, { CV_IA64_PFD7, KRPFD7},
// PERFORMANCE MONITOR CONFIG REGISTERS
{ CV_IA64_PFC0, KRPFC0}, { CV_IA64_PFC1, KRPFC1}, { CV_IA64_PFC2, KRPFC2}, { CV_IA64_PFC3, KRPFC3}, { CV_IA64_PFC4, KRPFC4}, { CV_IA64_PFC5, KRPFC5}, { CV_IA64_PFC6, KRPFC6}, { CV_IA64_PFC7, KRPFC7},
// INSTRUCTION TRANSLATION REGISTERS
{ CV_IA64_TrI0, SRTRI0}, { CV_IA64_TrI1, SRTRI1}, { CV_IA64_TrI2, SRTRI2}, { CV_IA64_TrI3, SRTRI3}, { CV_IA64_TrI4, SRTRI4}, { CV_IA64_TrI5, SRTRI5}, { CV_IA64_TrI6, SRTRI6}, { CV_IA64_TrI7, SRTRI7},
// DATA TRANSLATION REGISTERS
{ CV_IA64_TrD0, SRTRD0}, { CV_IA64_TrD1, SRTRD1}, { CV_IA64_TrD2, SRTRD2}, { CV_IA64_TrD3, SRTRD3}, { CV_IA64_TrD4, SRTRD4}, { CV_IA64_TrD5, SRTRD5}, { CV_IA64_TrD6, SRTRD6}, { CV_IA64_TrD7, SRTRD7},
// INSTRUCTION BREAKPOINT REGISTERS
{ CV_IA64_DbI0, KRDBI0}, { CV_IA64_DbI1, KRDBI1}, { CV_IA64_DbI2, KRDBI2}, { CV_IA64_DbI3, KRDBI3}, { CV_IA64_DbI4, KRDBI4}, { CV_IA64_DbI5, KRDBI5}, { CV_IA64_DbI6, KRDBI6}, { CV_IA64_DbI7, KRDBI7},
// DATA BREAKPOINT REGISTERS
{ CV_IA64_DbD0, KRDBD0}, { CV_IA64_DbD1, KRDBD1}, { CV_IA64_DbD2, KRDBD2}, { CV_IA64_DbD3, KRDBD3}, { CV_IA64_DbD4, KRDBD4}, { CV_IA64_DbD5, KRDBD5}, { CV_IA64_DbD6, KRDBD6}, { CV_IA64_DbD7, KRDBD7},};
REGISTER_LOOKUP gRegLookupAlpha[] = {
{CV_ALPHA_FltF0, ALPHA_F0}, {CV_ALPHA_FltF1, ALPHA_F1}, {CV_ALPHA_FltF2, ALPHA_F2}, {CV_ALPHA_FltF3, ALPHA_F3}, {CV_ALPHA_FltF4, ALPHA_F4}, {CV_ALPHA_FltF5, ALPHA_F5}, {CV_ALPHA_FltF6, ALPHA_F6}, {CV_ALPHA_FltF7, ALPHA_F7}, {CV_ALPHA_FltF8, ALPHA_F8}, {CV_ALPHA_FltF9, ALPHA_F9}, {CV_ALPHA_FltF10, ALPHA_F10}, {CV_ALPHA_FltF11, ALPHA_F11}, {CV_ALPHA_FltF12, ALPHA_F12}, {CV_ALPHA_FltF13, ALPHA_F13}, {CV_ALPHA_FltF14, ALPHA_F14}, {CV_ALPHA_FltF15, ALPHA_F15}, {CV_ALPHA_FltF16, ALPHA_F16}, {CV_ALPHA_FltF17, ALPHA_F17}, {CV_ALPHA_FltF18, ALPHA_F18}, {CV_ALPHA_FltF19, ALPHA_F19}, {CV_ALPHA_FltF20, ALPHA_F20}, {CV_ALPHA_FltF21, ALPHA_F21}, {CV_ALPHA_FltF22, ALPHA_F22}, {CV_ALPHA_FltF23, ALPHA_F23}, {CV_ALPHA_FltF24, ALPHA_F24}, {CV_ALPHA_FltF25, ALPHA_F25}, {CV_ALPHA_FltF26, ALPHA_F26}, {CV_ALPHA_FltF27, ALPHA_F27}, {CV_ALPHA_FltF28, ALPHA_F28}, {CV_ALPHA_FltF29, ALPHA_F29}, {CV_ALPHA_FltF30, ALPHA_F30}, {CV_ALPHA_FltF31, ALPHA_F31},
{CV_ALPHA_IntV0, ALPHA_V0}, {CV_ALPHA_IntT0, ALPHA_T0}, {CV_ALPHA_IntT1, ALPHA_T1}, {CV_ALPHA_IntT2, ALPHA_T2}, {CV_ALPHA_IntT3, ALPHA_T3}, {CV_ALPHA_IntT4, ALPHA_T4}, {CV_ALPHA_IntT5, ALPHA_T5}, {CV_ALPHA_IntT6, ALPHA_T6}, {CV_ALPHA_IntT7, ALPHA_T7}, {CV_ALPHA_IntS0, ALPHA_S0}, {CV_ALPHA_IntS1, ALPHA_S1}, {CV_ALPHA_IntS2, ALPHA_S2}, {CV_ALPHA_IntS3, ALPHA_S3}, {CV_ALPHA_IntS4, ALPHA_S4}, {CV_ALPHA_IntS5, ALPHA_S5}, {CV_ALPHA_IntFP, ALPHA_FP}, {CV_ALPHA_IntA0, ALPHA_A0}, {CV_ALPHA_IntA1, ALPHA_A1}, {CV_ALPHA_IntA2, ALPHA_A2}, {CV_ALPHA_IntA3, ALPHA_A3}, {CV_ALPHA_IntA4, ALPHA_A4}, {CV_ALPHA_IntA5, ALPHA_A5}, {CV_ALPHA_IntT8, ALPHA_T8}, {CV_ALPHA_IntT9, ALPHA_T9}, {CV_ALPHA_IntT10, ALPHA_T10}, {CV_ALPHA_IntT11, ALPHA_T11}, {CV_ALPHA_IntRA, ALPHA_RA}, {CV_ALPHA_IntT12, ALPHA_T12}, {CV_ALPHA_IntAT, ALPHA_AT}, {CV_ALPHA_IntGP, ALPHA_GP}, {CV_ALPHA_IntSP, ALPHA_SP}, {CV_ALPHA_IntZERO, ALPHA_ZERO},
{CV_ALPHA_Fpcr, ALPHA_FPCR}, {CV_ALPHA_Fir, ALPHA_FIR}, {CV_ALPHA_Psr, ALPHA_PSR},// {CV_ALPHA_FltFsr, REGFSR},
{CV_ALPHA_SoftFpcr, ALPHA_SFTFPCR},};
BOOLLookupRegID ( IN ULONG CVReg, IN ULONG MachineType, OUT PULONG pDbgReg){ ULONG low, high, mid, Max; BOOL Found=FALSE; PREGISTER_LOOKUP ToLookup=&gRegLookupX86[0];
if (MachineType == IMAGE_FILE_MACHINE_I386) { Max = sizeof (gRegLookupX86) / sizeof(REGISTER_LOOKUP); ToLookup = &gRegLookupX86[0]; } else if (MachineType == IMAGE_FILE_MACHINE_IA64) { Max = sizeof (gRegLookupIa64) / sizeof(REGISTER_LOOKUP); ToLookup = &gRegLookupIa64[0]; } else if (MachineType == IMAGE_FILE_MACHINE_AXP64 || MachineType == IMAGE_FILE_MACHINE_ALPHA) { Max = sizeof (gRegLookupAlpha) / sizeof(REGISTER_LOOKUP); ToLookup = &gRegLookupAlpha[0]; } else { return FALSE; }
low = 0; high=Max; while (low <= high && !Found) { mid = (low + high)/2; if (ToLookup[mid].CVReg == CVReg) { *pDbgReg = ToLookup[mid].DbgReg; Found = TRUE; } else if (ToLookup[mid].CVReg < CVReg) { low = mid+1; } else { high = mid-1; } } return Found;}
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