Source code of Windows XP (NT5)
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  1. /*++
  2. Copyright (c) 1999 Microsoft Corporation
  3. Module Name:
  4. i386.h
  5. Abstract:
  6. This file contains definitions which are specific to i386 platforms.
  7. Author:
  8. Kshitiz K. Sharma (kksharma)
  9. Revision History:
  10. --*/
  11. //
  12. // Define the page size for the Intel 386 as 4096 (0x1000).
  13. //
  14. #define MM_SESSION_SPACE_DEFAULT_X86 (0xA0000000)
  15. //
  16. // Define the number of trailing zeroes in a page aligned virtual address.
  17. // This is used as the shift count when shifting virtual addresses to
  18. // virtual page numbers.
  19. //
  20. #define PAGE_SHIFT_X86 12L
  21. #define MM_KSEG0_BASE_X86 ((ULONG64)0xFFFFFFFF80000000UI64)
  22. #define MM_KSEG2_BASE_X86 ((ULONG64)0xFFFFFFFFA0000000UI64)
  23. //
  24. // Define the number of bits to shift to right justify the Page Directory Index
  25. // field of a PTE.
  26. //
  27. #define PDI_SHIFT_X86 22
  28. #define PDI_SHIFT_X86PAE 21
  29. #define PPI_SHIFT_X86 30
  30. //
  31. // Define the number of bits to shift to right justify the Page Table Index
  32. // field of a PTE.
  33. //
  34. #define PTI_SHIFT_X86 12
  35. //
  36. // Define page directory and page base addresses.
  37. //
  38. #define PDE_BASE_X86 ((ULONG64) (LONG64) (LONG) (PaeEnabled? 0xc0600000 : 0xc0300000))
  39. #define PTE_BASE_X86 0xFFFFFFFFc0000000
  40. #define MM_PTE_PROTECTION_MASK_X86 0x3e0
  41. #define MM_PTE_PAGEFILE_MASK_X86 0x01e
  42. #define PTE_TOP_PAE_X86 0xffffffffC07FFFFFUI64
  43. #define PTE_TOP_X86 (PaeEnabled ? PTE_TOP_PAE_X86 : 0xFFFFFFFFC03FFFFFUI64)
  44. #define PDE_TOP_X86 (PaeEnabled ? 0xFFFFFFFFC0603FFF : 0xFFFFFFFFC03FFFFFUI64)
  45. #define MM_PTE_VALID_MASK_X86 0x1
  46. #if defined(NT_UP)
  47. #define MM_PTE_WRITE_MASK_X86 0x2
  48. #else
  49. #define MM_PTE_WRITE_MASK_X86 0x800
  50. #endif
  51. #define MM_PTE_OWNER_MASK_X86 0x4
  52. #define MM_PTE_WRITE_THROUGH_MASK_X86 0x8
  53. #define MM_PTE_CACHE_DISABLE_MASK_X86 0x10
  54. #define MM_PTE_ACCESS_MASK_X86 0x20
  55. #if defined(NT_UP)
  56. #define MM_PTE_DIRTY_MASK_X86 0x40
  57. #else
  58. #define MM_PTE_DIRTY_MASK_X86 0x42
  59. #endif
  60. #define MM_PTE_LARGE_PAGE_MASK_X86 0x80
  61. #define MM_PTE_GLOBAL_MASK_X86 0x100
  62. #define MM_PTE_COPY_ON_WRITE_MASK_X86 0x200
  63. #define MM_PTE_PROTOTYPE_MASK_X86 0x400
  64. #define MM_PTE_TRANSITION_MASK_X86 0x800
  65. #define MI_PTE_LOOKUP_NEEDED_X86 (PaeEnabled ? 0xFFFFFFFF : 0xFFFFF)
  66. #define MODE_MASK_I386 1
  67. #define RPL_MASK_I386 3
  68. #define EFLAGS_DF_MASK_I386 0x00000400L
  69. #define EFLAGS_INTERRUPT_MASK_I386 0x00000200L
  70. #define EFLAGS_V86_MASK_I386 0x00020000L
  71. #define EFLAGS_ALIGN_CHECK_I386 0x00040000L
  72. #define EFLAGS_IOPL_MASK_I386 0x00003000L
  73. #define EFLAGS_VIF_I386 0x00080000L
  74. #define EFLAGS_VIP_I386 0x00100000L
  75. #define EFLAGS_USER_SANITIZE_I386 0x003e0dd7L
  76. #define KGDT_NULL_I386 0
  77. #define KGDT_R0_CODE_I386 8
  78. #define KGDT_R0_DATA_I386 16
  79. #define KGDT_R3_CODE_I386 24
  80. #define KGDT_R3_DATA_I386 32
  81. #define KGDT_TSS_I386 40
  82. #define KGDT_R0_PCR_I386 48
  83. #define KGDT_R3_TEB_I386 56
  84. #define KGDT_VDM_TILE_I386 64
  85. #define KGDT_LDT_I386 72
  86. #define KGDT_DF_TSS_I386 80
  87. #define KGDT_NMI_TSS_I386 88
  88. #define FRAME_EDITED_I386 0xfff8
  89. //
  90. // CR4 bits; These only apply to Pentium
  91. //
  92. #define CR4_VME_X86 0x00000001 // V86 mode extensions
  93. #define CR4_PVI_X86 0x00000002 // Protected mode virtual interrupts
  94. #define CR4_TSD_X86 0x00000004 // Time stamp disable
  95. #define CR4_DE_X86 0x00000008 // Debugging Extensions
  96. #define CR4_PSE_X86 0x00000010 // Page size extensions
  97. #define CR4_PAE_X86 0x00000020 // Physical address extensions
  98. #define CR4_MCE_X86 0x00000040 // Machine check enable
  99. #define CR4_PGE_X86 0x00000080 // Page global enable
  100. #define CR4_FXSR_X86 0x00000200 // FXSR used by OS
  101. #define CR4_XMMEXCPT_X86 0x00000400 // XMMI used by OS
  102. //
  103. // i386 Feature bit definitions
  104. //
  105. #define KF_V86_VIS_X86 0x00000001
  106. #define KF_RDTSC_X86 0x00000002
  107. #define KF_CR4_X86 0x00000004
  108. #define KF_CMOV_X86 0x00000008
  109. #define KF_GLOBAL_PAGE_X86 0x00000010
  110. #define KF_LARGE_PAGE_X86 0x00000020
  111. #define KF_MTRR_X86 0x00000040
  112. #define KF_CMPXCHG8B_X86 0x00000080
  113. #define KF_MMX_X86 0x00000100
  114. #define KF_WORKING_PTE_X86 0x00000200
  115. #define KF_PAT_X86 0x00000400
  116. #define KF_FXSR_X86 0x00000800
  117. #define KF_FAST_SYSCALL_X86 0x00001000
  118. #define KF_XMMI_X86 0x00002000
  119. #define KF_3DNOW_X86 0x00004000
  120. #define KF_AMDK6MTRR_X86 0x00008000
  121. #define CONTEXT_X86 0x00010000 // X86 have identical context records
  122. #ifdef CONTEXT86_CONTROL
  123. #undef CONTEXT86_CONTROL
  124. #endif
  125. #define CONTEXT86_CONTROL (CONTEXT_X86 | 0x00000001L) // SS:SP, CS:IP, FLAGS, BP
  126. #ifdef CONTEXT86_INTEGER
  127. #undef CONTEXT86_INTEGER
  128. #endif
  129. #define CONTEXT86_INTEGER (CONTEXT_X86 | 0x00000002L) // AX, BX, CX, DX, SI, DI
  130. #ifdef CONTEXT86_SEGMENTS
  131. #undef CONTEXT86_SEGMENTS
  132. #endif
  133. #define CONTEXT86_SEGMENTS (CONTEXT_X86 | 0x00000004L) // DS, ES, FS, GS
  134. #ifdef CONTEXT86_FLOATING_POINT
  135. #undef CONTEXT86_FLOATING_POINT
  136. #endif
  137. #define CONTEXT86_FLOATING_POINT (CONTEXT_X86 | 0x00000008L) // 387 state
  138. #ifdef CONTEXT86_DEBUG_REGISTERS
  139. #undef CONTEXT86_DEBUG_REGISTERS
  140. #endif
  141. #define CONTEXT86_DEBUG_REGISTERS (CONTEXT_X86 | 0x00000010L) // DB 0-3,6,7
  142. #define CONTEXT86_FULL (CONTEXT86_CONTROL | CONTEXT86_INTEGER |\
  143. CONTEXT86_SEGMENTS) // context corresponding to set flags will be returned.