Source code of Windows XP (NT5)
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6.7 KiB

  1. /*++
  2. Copyright (c) 1992 Microsoft Corporation
  3. Module Name:
  4. Mode543x.h
  5. Abstract:
  6. This module contains all the global data used by the Cirrus Logic
  7. CL-542x driver.
  8. Environment:
  9. Kernel mode
  10. Revision History:
  11. --*/
  12. //
  13. // The next set of tables are for the CL543x
  14. // Note: all resolutions supported
  15. //
  16. //
  17. // 640x480 16-color mode (BIOS mode 12) set command string for CL 543x.
  18. //
  19. USHORT CL543x_640x480_16[] = {
  20. OWM, // begin setmode
  21. SEQ_ADDRESS_PORT,
  22. 2, // count
  23. 0x1206, // enable extensions
  24. 0x0012,
  25. OWM,
  26. GRAPH_ADDRESS_PORT,
  27. 3,
  28. 0x0009, 0x000a, 0x000b, // no banking in 640x480 mode
  29. EOD
  30. };
  31. //
  32. // 800x600 16-color (60Hz refresh) mode set command string for CL 543x.
  33. //
  34. USHORT CL543x_800x600_16[] = {
  35. OWM, // begin setmode
  36. SEQ_ADDRESS_PORT,
  37. 2, // count
  38. 0x1206, // enable extensions
  39. 0x0012,
  40. OWM,
  41. GRAPH_ADDRESS_PORT,
  42. 3,
  43. 0x0009, 0x000a, 0x000b, // no banking in 800x600 mode
  44. EOD
  45. };
  46. //
  47. // 1024x768 16-color (60Hz refresh) mode set command string for CL 543x.
  48. //
  49. USHORT CL543x_1024x768_16[] = {
  50. OWM, // begin setmode
  51. SEQ_ADDRESS_PORT,
  52. 2, // count
  53. 0x1206, // enable extensions
  54. 0x0012,
  55. OWM,
  56. GRAPH_ADDRESS_PORT,
  57. 3,
  58. #if ONE_64K_BANK
  59. 0x0009, 0x000a, 0x200b,
  60. #endif
  61. #if TWO_32K_BANKS
  62. 0x0009, 0x000a, 0x210b,
  63. #endif
  64. OB,
  65. DAC_PIXEL_MASK_PORT,
  66. 0xFF,
  67. EOD
  68. };
  69. //-----------------------------
  70. // standard VGA text modes here
  71. // 80x25 at 640x350
  72. //
  73. //-----------------------------
  74. //
  75. // 80x25 text mode set command string for CL 543x.
  76. // (720x400 pixel resolution; 9x16 character cell.)
  77. //
  78. USHORT CL543x_80x25Text[] = {
  79. OWM, // begin setmode
  80. SEQ_ADDRESS_PORT,
  81. 2, // count
  82. 0x1206, // enable extensions
  83. 0x0012,
  84. OWM,
  85. GRAPH_ADDRESS_PORT,
  86. 3,
  87. 0x0009, 0x000a, 0x000b, // no banking in text mode
  88. EOD
  89. };
  90. //
  91. // 80x25 text mode set command string for CL 543x.
  92. // (640x350 pixel resolution; 8x14 character cell.)
  93. //
  94. USHORT CL543x_80x25_14_Text[] = {
  95. OWM, // begin setmode
  96. SEQ_ADDRESS_PORT,
  97. 2, // count
  98. 0x1206, // enable extensions
  99. 0x0012,
  100. OWM,
  101. GRAPH_ADDRESS_PORT,
  102. 3,
  103. 0x0009, 0x000a, 0x000b, // no banking in text mode
  104. EOD
  105. };
  106. //
  107. // 1280x1024 16-color mode (BIOS mode 0x6C) set command string for CL 543x.
  108. //
  109. USHORT CL543x_1280x1024_16[] = {
  110. OWM, // begin setmode
  111. SEQ_ADDRESS_PORT,
  112. 2, // count
  113. 0x1206, // enable extensions
  114. 0x0012,
  115. OWM,
  116. GRAPH_ADDRESS_PORT,
  117. 3,
  118. #if ONE_64K_BANK
  119. 0x0009, 0x000a, 0x200b,
  120. #endif
  121. #if TWO_32K_BANKS
  122. 0x0009, 0x000a, 0x210b,
  123. #endif
  124. EOD
  125. };
  126. //
  127. // 640x480 256-color mode (BIOS mode 0x5F) set command string for CL 543x.
  128. //
  129. USHORT CL543x_640x480_256[] = {
  130. OWM, // begin setmode
  131. SEQ_ADDRESS_PORT,
  132. 2, // count
  133. 0x1206, // enable extensions
  134. 0x0012,
  135. OWM,
  136. GRAPH_ADDRESS_PORT,
  137. 3,
  138. #if ONE_64K_BANK
  139. 0x0009, 0x000a, 0x200b,
  140. #endif
  141. #if TWO_32K_BANKS
  142. 0x0009, 0x000a, 0x210b,
  143. #endif
  144. EOD
  145. };
  146. //
  147. // 800x600 256-color mode (BIOS mode 0x5C) set command string for CL 543x.
  148. //
  149. USHORT CL543x_800x600_256[] = {
  150. OWM, // begin setmode
  151. SEQ_ADDRESS_PORT,
  152. 2, // count
  153. 0x1206, // enable extensions
  154. 0x0012,
  155. OWM,
  156. GRAPH_ADDRESS_PORT,
  157. 3,
  158. #if ONE_64K_BANK
  159. 0x0009, 0x000a, 0x200b,
  160. #endif
  161. #if TWO_32K_BANKS
  162. 0x0009, 0x000a, 0x210b,
  163. #endif
  164. EOD
  165. };
  166. //
  167. // 640x480 64k-color mode (BIOS mode 0x64) set command string for CL 543x.
  168. //
  169. USHORT CL543x_640x480_64k[] = {
  170. OWM, // begin setmode
  171. SEQ_ADDRESS_PORT,
  172. 2, // count
  173. 0x1206, // enable extensions
  174. 0x0012,
  175. OWM,
  176. GRAPH_ADDRESS_PORT,
  177. 4,
  178. 0x0506, // Some BIOS's set Chain Odd maps bit
  179. #if ONE_64K_BANK
  180. 0x0009, 0x000a, 0x200b,
  181. #endif
  182. #if TWO_32K_BANKS
  183. 0x0009, 0x000a, 0x210b,
  184. #endif
  185. EOD
  186. };
  187. //
  188. // 800x600 64k-color mode (BIOS mode 0x65) set command string for CL 543x.
  189. //
  190. USHORT CL543x_800x600_64k[] = {
  191. OWM, // begin setmode
  192. SEQ_ADDRESS_PORT,
  193. 2, // count
  194. 0x1206, // enable extensions
  195. 0x0012,
  196. OWM,
  197. GRAPH_ADDRESS_PORT,
  198. 4,
  199. 0x0506, // Some BIOS's set Chain Odd maps bit
  200. #if ONE_64K_BANK
  201. 0x0009, 0x000a, 0x200b,
  202. #endif
  203. #if TWO_32K_BANKS
  204. 0x0009, 0x000a, 0x210b,
  205. #endif
  206. EOD
  207. };
  208. //
  209. // 1024x768 64k-color mode set command string for CL 543x.
  210. //
  211. USHORT CL543x_1024x768_64k[] = {
  212. OWM, // begin setmode
  213. SEQ_ADDRESS_PORT,
  214. 2, // count
  215. 0x1206, // enable extensions
  216. 0x0012,
  217. OWM,
  218. GRAPH_ADDRESS_PORT,
  219. 4,
  220. 0x0506, // some BIOS's set Chain Odd Maps bit
  221. #if ONE_64K_BANK
  222. 0x0009, 0x000a, 0x200b,
  223. #endif
  224. #if TWO_32K_BANKS
  225. 0x0009, 0x000a, 0x210b,
  226. #endif
  227. OB,
  228. DAC_PIXEL_MASK_PORT,
  229. 0xFF,
  230. EOD
  231. };
  232. //
  233. // 640x480 16M-color mode (BIOS mode 0x64) set command string for CL 543x.
  234. //
  235. USHORT CL543x_640x480_16M[] = {
  236. OWM, // begin setmode
  237. SEQ_ADDRESS_PORT,
  238. 2, // count
  239. 0x1206, // enable extensions
  240. 0x0012,
  241. OWM,
  242. GRAPH_ADDRESS_PORT,
  243. 3,
  244. 0x0009, 0x000a, 0x200b,
  245. EOD
  246. };
  247. //
  248. // 800x600 16M-color mode (BIOS mode 0x65) set command string for CL 543x.
  249. //
  250. USHORT CL543x_800x600_16M[] = {
  251. OWM, // begin setmode
  252. SEQ_ADDRESS_PORT,
  253. 2, // count
  254. 0x1206, // enable extensions
  255. 0x0012,
  256. OWM,
  257. GRAPH_ADDRESS_PORT,
  258. 3,
  259. 0x0009, 0x000a, 0x200b,
  260. EOD
  261. };
  262. //
  263. // 1024x768 16M-color mode set command string for CL 543x.
  264. //
  265. USHORT CL543x_1024x768_16M[] = {
  266. OWM, // begin setmode
  267. SEQ_ADDRESS_PORT,
  268. 2, // count
  269. 0x1206, // enable extensions
  270. 0x0012,
  271. OWM,
  272. GRAPH_ADDRESS_PORT,
  273. 3,
  274. 0x0009, 0x000a, 0x200b,
  275. OB,
  276. DAC_PIXEL_MASK_PORT,
  277. 0xFF,
  278. EOD
  279. };