Source code of Windows XP (NT5)
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  1. /*++
  2. Copyright (c) 1989 Microsoft Corporation
  3. Module Name:
  4. ixpciint.c
  5. Abstract:
  6. All PCI bus interrupt mapping is in this module, so that a real
  7. system which doesn't have all the limitations which PC PCI
  8. systems have can replaced this code easly.
  9. (bus memory & i/o address mappings can also be fix here)
  10. Author:
  11. Ken Reneris
  12. Environment:
  13. Kernel mode
  14. Revision History:
  15. --*/
  16. #include "halp.h"
  17. #include "pci.h"
  18. #include "pcip.h"
  19. ULONG PciIsaIrq;
  20. ULONG HalpEisaELCR;
  21. BOOLEAN HalpDoingCrashDump;
  22. BOOLEAN HalpPciLockSettings;
  23. #ifdef ALLOC_PRAGMA
  24. #pragma alloc_text(PAGE,HalpGetPCIIntOnISABus)
  25. #pragma alloc_text(PAGE,HalpAdjustPCIResourceList)
  26. #pragma alloc_text(PAGE,HalpGetISAFixedPCIIrq)
  27. #endif
  28. VOID
  29. HalpPCIPin2ISALine (
  30. IN PBUS_HANDLER BusHandler,
  31. IN PBUS_HANDLER RootHandler,
  32. IN PCI_SLOT_NUMBER SlotNumber,
  33. IN PPCI_COMMON_CONFIG PciData
  34. )
  35. /*++
  36. This function maps the device's InterruptPin to an InterruptLine
  37. value.
  38. On the current PC implementations, the bios has already filled in
  39. InterruptLine as it's ISA value and there's no portable way to
  40. change it.
  41. On a DBG build we adjust InterruptLine just to ensure driver's
  42. don't connect to it without translating it on the PCI bus.
  43. --*/
  44. {
  45. if (!PciData->u.type0.InterruptPin) {
  46. return ;
  47. }
  48. //
  49. // Set vector as a level vector. (note: this code assumes the
  50. // irq is static and does not move).
  51. //
  52. if (PciData->u.type0.InterruptLine >= 1 &&
  53. PciData->u.type0.InterruptLine <= 15) {
  54. //
  55. // If this bit was on the in the PIC ELCR register,
  56. // then mark it in PciIsaIrq. (for use in hal.dll,
  57. // such that we can assume the interrupt controller
  58. // has been properly marked as a level interrupt for
  59. // this IRQ. Other hals probabily don't care.)
  60. //
  61. PciIsaIrq |= HalpEisaELCR & (1 << PciData->u.type0.InterruptLine);
  62. }
  63. }
  64. VOID
  65. HalpPCIISALine2Pin (
  66. IN PBUS_HANDLER BusHandler,
  67. IN PBUS_HANDLER RootHandler,
  68. IN PCI_SLOT_NUMBER SlotNumber,
  69. IN PPCI_COMMON_CONFIG PciNewData,
  70. IN PPCI_COMMON_CONFIG PciOldData
  71. )
  72. /*++
  73. This functions maps the device's InterruptLine to it's
  74. device specific InterruptPin value.
  75. On the current PC implementations, this information is
  76. fixed by the BIOS. Just make sure the value isn't being
  77. editted since PCI doesn't tell us how to dynically
  78. connect the interrupt.
  79. --*/
  80. {
  81. if (!PciNewData->u.type0.InterruptPin) {
  82. return ;
  83. }
  84. }
  85. #if !defined(SUBCLASSPCI)
  86. VOID
  87. HalpPCIAcquireType2Lock (
  88. PKSPIN_LOCK SpinLock,
  89. PKIRQL Irql
  90. )
  91. {
  92. if (!HalpDoingCrashDump) {
  93. *Irql = KfRaiseIrql (HIGH_LEVEL);
  94. KiAcquireSpinLock (SpinLock);
  95. } else {
  96. *Irql = HIGH_LEVEL;
  97. }
  98. }
  99. VOID
  100. HalpPCIReleaseType2Lock (
  101. PKSPIN_LOCK SpinLock,
  102. KIRQL Irql
  103. )
  104. {
  105. if (!HalpDoingCrashDump) {
  106. KiReleaseSpinLock (SpinLock);
  107. KfLowerIrql (Irql);
  108. }
  109. }
  110. #endif