Source code of Windows XP (NT5)
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369 lines
8.1 KiB

  1. // ******************************
  2. // Intel Confidential
  3. // ******************************
  4. #include <stdarg.h>
  5. #include "ki.h"
  6. #include "fedefs.h"
  7. // MACH
  8. #ifndef IN_KERNEL
  9. extern void RaiseException ();
  10. #endif
  11. #include <assert.h>
  12. #include <stdarg.h>
  13. #include <stddef.h>
  14. #ifndef unix
  15. #include <string.h>
  16. #endif
  17. // MACH #ifdef WIN32_OR_WIN64
  18. // MACH #include <process.h>
  19. // MACH #endif
  20. #include "fepublic.h"
  21. #include "fehelper.h"
  22. #include "fesupprt.h"
  23. void fp82_default_fp_exception_fault(void *ps, EM_uint_t isrcode);
  24. void fp82_default_fp_exception_trap(void *ps, EM_uint_t isr_code);
  25. #define RESTORE_CONSTANTS { \
  26. FR[0] = FP_ZERO; \
  27. FR[1] = FP_ONE; \
  28. PR[0] = 1; \
  29. GR[0].value = 0; \
  30. GR[0].nat = 0; \
  31. }
  32. // ***************************************************************
  33. // GET/PUT F1
  34. // ***************************************************************
  35. void
  36. GETSTATE_F1(
  37. EM_pred_reg_specifier Pr0,
  38. EM_fp_reg_specifier Fr1,
  39. EM_fp_reg_specifier Fr3,
  40. EM_fp_reg_specifier Fr4,
  41. EM_fp_reg_specifier Fr2) {
  42. }
  43. void
  44. PUTSTATE_F1(
  45. EM_fp_reg_specifier Fr1) {
  46. RESTORE_CONSTANTS;
  47. }
  48. // ***************************************************************
  49. // GET/PUT F4
  50. // ***************************************************************
  51. void
  52. GETSTATE_F4(
  53. EM_pred_reg_specifier Pr0,
  54. EM_pred_reg_specifier Pr1,
  55. EM_pred_reg_specifier Pr2,
  56. EM_fp_reg_specifier Fr2,
  57. EM_fp_reg_specifier Fr3) {
  58. }
  59. void
  60. PUTSTATE_F4(
  61. EM_pred_reg_specifier Pr1,
  62. EM_pred_reg_specifier Pr2) {
  63. RESTORE_CONSTANTS;
  64. }
  65. // ***************************************************************
  66. // GET/PUT F6
  67. // ***************************************************************
  68. void
  69. GETSTATE_F6(
  70. EM_pred_reg_specifier Pr0,
  71. EM_fp_reg_specifier Fr1,
  72. EM_pred_reg_specifier Pr2,
  73. EM_fp_reg_specifier Fr2,
  74. EM_fp_reg_specifier Fr3) {
  75. }
  76. void
  77. PUTSTATE_F6(
  78. EM_fp_reg_specifier Fr1,
  79. EM_pred_reg_specifier Pr2) {
  80. RESTORE_CONSTANTS;
  81. }
  82. // ***************************************************************
  83. // GET/PUT F7
  84. // ***************************************************************
  85. void
  86. GETSTATE_F7(
  87. EM_pred_reg_specifier Pr0,
  88. EM_fp_reg_specifier Fr1,
  89. EM_pred_reg_specifier Pr2,
  90. EM_fp_reg_specifier Fr3) {
  91. }
  92. void
  93. PUTSTATE_F7(
  94. EM_fp_reg_specifier Fr1,
  95. EM_pred_reg_specifier Pr2) {
  96. RESTORE_CONSTANTS;
  97. }
  98. // ***************************************************************
  99. // GET/PUT F8
  100. // ***************************************************************
  101. void
  102. GETSTATE_F8(
  103. EM_pred_reg_specifier Pr0,
  104. EM_fp_reg_specifier Fr1,
  105. EM_fp_reg_specifier Fr2,
  106. EM_fp_reg_specifier Fr3) {
  107. }
  108. void
  109. PUTSTATE_F8(
  110. EM_fp_reg_specifier Fr1) {
  111. RESTORE_CONSTANTS;
  112. }
  113. // ***************************************************************
  114. // GET/PUT F10
  115. // ***************************************************************
  116. void
  117. GETSTATE_F10(
  118. EM_pred_reg_specifier Pr0,
  119. EM_fp_reg_specifier Fr1,
  120. EM_fp_reg_specifier Fr2) {
  121. SIGNED_FORM = 0;
  122. TRUNC_FORM = 0;
  123. UNSIGNED_FORM = 0;
  124. }
  125. void
  126. PUTSTATE_F10(
  127. EM_fp_reg_specifier Fr1) {
  128. RESTORE_CONSTANTS;
  129. }
  130. void fp82_default_fp_exception_fault(void *vps, EM_uint_t isr_code) {
  131. EM_state_type *ps;
  132. ps = (EM_state_type *)vps;
  133. ps->state_MERCED_RTL &= ~0xffff0000;
  134. ps->state_MERCED_RTL |= (isr_code << 16);
  135. ps->trap_type = 1; // fault
  136. }
  137. void fp82_default_fp_exception_trap(void *vps, EM_uint_t isr_code) {
  138. EM_state_type *ps;
  139. ps = (EM_state_type *)vps;
  140. ps->state_MERCED_RTL &= ~0xffff0000;
  141. ps->state_MERCED_RTL |= (isr_code << 16);
  142. ps->trap_type = 0; // trap
  143. }
  144. /*************************************************************
  145. fp82_EM_initialize_state()
  146. *************************************************************/
  147. void
  148. fp82_EM_initialize_state(EM_state_type *ps) {
  149. EM_int_t i;
  150. PSR.be = 0;
  151. PSR.dfl = 0;
  152. PSR.dfh = 0;
  153. PSR.mfl = 0;
  154. PSR.mfh = 0;
  155. FPSR.traps_vd = 1;
  156. FPSR.traps_dd = 1;
  157. FPSR.traps_zd = 1;
  158. FPSR.traps_od = 1;
  159. FPSR.traps_ud = 1;
  160. FPSR.traps_id = 1;
  161. FPSR.sf0_controls_ftz = 0;
  162. FPSR.sf0_controls_wre = 1;
  163. FPSR.sf0_controls_pc = sf_double_extended;
  164. FPSR.sf0_controls_rc = rc_rn;
  165. FPSR.sf0_controls_td = 0;
  166. FPSR.sf0_flags_v = 0;
  167. FPSR.sf0_flags_d = 0;
  168. FPSR.sf0_flags_z = 0;
  169. FPSR.sf0_flags_o = 0;
  170. FPSR.sf0_flags_u = 0;
  171. FPSR.sf0_flags_i = 0;
  172. FPSR.sf1_controls_ftz = 0;
  173. FPSR.sf1_controls_wre = 1;
  174. FPSR.sf1_controls_pc = sf_double_extended;
  175. FPSR.sf1_controls_rc = rc_rn;
  176. FPSR.sf1_controls_td = 0;
  177. FPSR.sf1_flags_v = 0;
  178. FPSR.sf1_flags_d = 0;
  179. FPSR.sf1_flags_z = 0;
  180. FPSR.sf1_flags_o = 0;
  181. FPSR.sf1_flags_u = 0;
  182. FPSR.sf1_flags_i = 0;
  183. FPSR.sf2_controls_ftz = 0;
  184. FPSR.sf2_controls_wre = 1;
  185. FPSR.sf2_controls_pc = sf_double_extended;
  186. FPSR.sf2_controls_rc = rc_rn;
  187. FPSR.sf2_controls_td = 0;
  188. FPSR.sf2_flags_v = 0;
  189. FPSR.sf2_flags_d = 0;
  190. FPSR.sf2_flags_z = 0;
  191. FPSR.sf2_flags_o = 0;
  192. FPSR.sf2_flags_u = 0;
  193. FPSR.sf2_flags_i = 0;
  194. FPSR.sf3_controls_ftz = 0;
  195. FPSR.sf3_controls_wre = 1;
  196. FPSR.sf3_controls_pc = sf_double_extended;
  197. FPSR.sf3_controls_rc = rc_rn;
  198. FPSR.sf3_controls_td = 0;
  199. FPSR.sf3_flags_v = 0;
  200. FPSR.sf3_flags_d = 0;
  201. FPSR.sf3_flags_z = 0;
  202. FPSR.sf3_flags_o = 0;
  203. FPSR.sf3_flags_u = 0;
  204. FPSR.sf3_flags_i = 0;
  205. FPSR.reserved = 0;
  206. PR[0] = 1;
  207. for (i=1;i<EM_NUM_PR;i++)
  208. PR[i] = 0;
  209. ps->state_MERCED_RTL = 0;
  210. FR[0] = FP_ZERO;
  211. FR[1] = FP_ONE;
  212. for (i=2;i<MAX_REAL_FR_INDEX;i++)
  213. FR[i] = FP_ZERO;
  214. for (i=0;i<MAX_REAL_GR_INDEX;i++) {
  215. GR[i].value = 0;
  216. GR[i].nat = 0;
  217. }
  218. ps->state_fp82_fp_exception_fault = fp82_default_fp_exception_fault;
  219. ps->state_fp82_fp_exception_trap = fp82_default_fp_exception_trap;
  220. }
  221. /* Other EM ISA helper functions */
  222. EM_boolean_t
  223. fp82_fp_software_assistance_required(EM_state_type *ps,
  224. EM_opcode_type calling_instruction, ...)
  225. {
  226. return(0);
  227. }
  228. INLINE void
  229. disabled_fp_register_fault(EM_uint_t isr_code, EM_uint_t itype)
  230. {
  231. #ifdef IN_KERNEL
  232. FP_EMULATION_ERROR0 ("disabled_fp_register_fault () Internal Error\n");
  233. #else
  234. printf ("disabled_fp_register_fault () Internal Error\n");
  235. exit (1);
  236. #endif
  237. }
  238. INLINE void
  239. fp_exception_fault(EM_uint_t isr_code)
  240. {
  241. PR[0] = 1;
  242. GR[0].value = 0;
  243. GR[0].nat = 0;
  244. FR[0] = FP_ZERO;
  245. FR[1] = FP_ONE;
  246. ps->state_fp82_fp_exception_fault((EM_state_type *)ps, isr_code);
  247. }
  248. INLINE void
  249. fp_exception_trap(EM_uint_t isr_code)
  250. {
  251. isr_code |= 0x00000001;
  252. ps->state_fp82_fp_exception_trap((EM_state_type *)ps, isr_code);
  253. }
  254. INLINE void
  255. illegal_operation_fault(EM_uint_t non_rs)
  256. {
  257. #ifdef IN_KERNEL
  258. FP_EMULATION_ERROR0 ("illegal_operation_fault () Internal Error\n");
  259. #else
  260. printf ("illegal_operation_fault () Internal Error\n");
  261. exit (1);
  262. #endif
  263. }
  264. INLINE void
  265. check_target_register(EM_uint_t reg_specifier, EM_uint_t itype)
  266. {
  267. if(reg_specifier == 0) {
  268. #ifdef IN_KERNEL
  269. FP_EMULATION_ERROR0 ("fp_check_target_register () Internal Error\n");
  270. #else
  271. printf ("fp_check_target_register () Internal Error\n");
  272. exit (1);
  273. #endif
  274. }
  275. }
  276. void
  277. fp_check_target_register(EM_uint_t reg_specifier)
  278. {
  279. if( (reg_specifier == 0) || (reg_specifier == 1) ){
  280. #ifdef IN_KERNEL
  281. FP_EMULATION_ERROR0 ("fp_check_target_register () Internal Error\n")
  282. #else
  283. printf ("fp_check_target_register () Internal Error\n");
  284. exit (1);
  285. #endif
  286. }
  287. }
  288. INLINE void
  289. reserved_register_field_fault(EM_uint_t val)
  290. {
  291. #ifdef IN_KERNEL
  292. FP_EMULATION_ERROR0 ("reserved_register_field_fault () Internal Error\n")
  293. #else
  294. printf ("reserved_register_field_fault () Internal Error\n");
  295. exit (1);
  296. #endif
  297. }