Source code of Windows XP (NT5)
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

557 lines
13 KiB

  1. /*++
  2. Copyright (c) 1990-1998 Microsoft Corporation, All Rights Reserved
  3. Module Name:
  4. ne2000hw.h
  5. Abstract:
  6. Hardware definitions.
  7. Author:
  8. Sean Selitrennikoff
  9. Environment:
  10. Notes:
  11. optional-notes
  12. Revision History:
  13. --*/
  14. #ifndef _NE2000HARDWARE_
  15. #define _NE2000HARDWARE_
  16. //
  17. // Definitions for supporting clone adapters.
  18. //
  19. //
  20. // Valid value ranges for the IoBaseAddress.
  21. //
  22. #ifdef NE1000
  23. #define MIN_IOBASEADDR 0x0200
  24. #else
  25. #define MIN_IOBASEADDR 0x0120
  26. #endif
  27. #define MAX_IOBASEADDR 0xc3d0
  28. //
  29. // Valid value ranges for the InterruptNumber.
  30. //
  31. #define MIN_IRQ 2
  32. #ifdef NE1000
  33. #define MAX_IRQ 9
  34. #else
  35. #define MAX_IRQ 15
  36. #endif
  37. //
  38. // Types of Ne2000 cards.
  39. //
  40. #define NE2000_ISA 0
  41. #define NE2000_PCMCIA 1
  42. //
  43. // ID for MCA Ne2000 clone cards
  44. //
  45. #define AE2_ADAPTER_ID 0x67b0
  46. #define UB_ADAPTER_ID 0x611f
  47. #define NE2_ADAPTER_ID 0x7154
  48. //
  49. // Microchannel IRQ POS register mask and shift count
  50. //
  51. #define MC_IRQ_MASK 0x60
  52. #define MC_IRQ_MASK_UB 0x0E
  53. //
  54. // Microchannel I/O base address mask and shift count
  55. //
  56. #define MC_IO_BASE_MASK 0x0E
  57. #define MC_IO_BASE_MASK_UB 0xE0
  58. //
  59. // Default value for Adapter->IoBaseAddr
  60. //
  61. #define DEFAULT_IOBASEADDR (PVOID)0x300
  62. #define CIS_NET_ADDR_OFFSET 0xff0
  63. //
  64. // Default value for Adapter->InterruptNumber
  65. //
  66. #define DEFAULT_INTERRUPTNUMBER 3
  67. //
  68. // Default value for Adapter->MulticastListMax
  69. //
  70. #define DEFAULT_MULTICASTLISTMAX 8
  71. //
  72. // Offsets from Adapter->IoPAddr of the ports used to access
  73. // the 8390 NIC registers.
  74. //
  75. // The names in parenthesis are the abbreviations by which
  76. // the registers are referred to in the 8390 data sheet.
  77. //
  78. // Some of the offsets appear more than once
  79. // because they have have relevant page 0 and page 1 values,
  80. // or they are different registers when read than they are
  81. // when written. The notation MSB indicates that only the
  82. // MSB can be set for this register, the LSB is assumed 0.
  83. //
  84. #define NIC_COMMAND 0x0 // (CR)
  85. #define NIC_PAGE_START 0x1 // (PSTART) MSB, write-only
  86. #define NIC_PHYS_ADDR 0x1 // (PAR0) page 1
  87. #define NIC_PAGE_STOP 0x2 // (PSTOP) MSB, write-only
  88. #define NIC_BOUNDARY 0x3 // (BNRY) MSB
  89. #define NIC_XMIT_START 0x4 // (TPSR) MSB, write-only
  90. #define NIC_XMIT_STATUS 0x4 // (TSR) read-only
  91. #define NIC_XMIT_COUNT_LSB 0x5 // (TBCR0) write-only
  92. #define NIC_XMIT_COUNT_MSB 0x6 // (TBCR1) write-only
  93. #define NIC_FIFO 0x6 // (FIFO) read-only
  94. #define NIC_INTR_STATUS 0x7 // (ISR)
  95. #define NIC_CURRENT 0x7 // (CURR) page 1
  96. #define NIC_MC_ADDR 0x8 // (MAR0) page 1
  97. #define NIC_CRDA_LSB 0x8 // (CRDA0)
  98. #define NIC_RMT_ADDR_LSB 0x8 // (RSAR0)
  99. #define NIC_CRDA_MSB 0x9 // (CRDA1)
  100. #define NIC_RMT_ADDR_MSB 0x9 // (RSAR1)
  101. #define NIC_RMT_COUNT_LSB 0xa // (RBCR0) write-only
  102. #define NIC_RMT_COUNT_MSB 0xb // (RBCR1) write-only
  103. #define NIC_RCV_CONFIG 0xc // (RCR) write-only
  104. #define NIC_RCV_STATUS 0xc // (RSR) read-only
  105. #define NIC_XMIT_CONFIG 0xd // (TCR) write-only
  106. #define NIC_FAE_ERR_CNTR 0xd // (CNTR0) read-only
  107. #define NIC_DATA_CONFIG 0xe // (DCR) write-only
  108. #define NIC_CRC_ERR_CNTR 0xe // (CNTR1) read-only
  109. #define NIC_INTR_MASK 0xf // (IMR) write-only
  110. #define NIC_MISSED_CNTR 0xf // (CNTR2) read-only
  111. #define NIC_RACK_NIC 0x10 // Byte to read or write
  112. #define NIC_RESET 0x1f // (RESET)
  113. //
  114. // Constants for the NIC_COMMAND register.
  115. //
  116. // Start/stop the card, start transmissions, and select
  117. // which page of registers was seen through the ports.
  118. //
  119. #define CR_STOP (UCHAR)0x01 // reset the card
  120. #define CR_START (UCHAR)0x02 // start the card
  121. #define CR_XMIT (UCHAR)0x04 // begin transmission
  122. #define CR_NO_DMA (UCHAR)0x20 // stop remote DMA
  123. #define CR_PS0 (UCHAR)0x40 // low bit of page number
  124. #define CR_PS1 (UCHAR)0x80 // high bit of page number
  125. #define CR_PAGE0 (UCHAR)0x00 // select page 0
  126. #define CR_PAGE1 CR_PS0 // select page 1
  127. #define CR_PAGE2 CR_PS1 // select page 2
  128. #define CR_DMA_WRITE (UCHAR)0x10 // Write
  129. #define CR_DMA_READ (UCHAR)0x08 // Read
  130. #define CR_SEND (UCHAR)0x18 // send
  131. //
  132. // Constants for the NIC_XMIT_STATUS register.
  133. //
  134. // Indicate the result of a packet transmission.
  135. //
  136. #define TSR_XMIT_OK (UCHAR)0x01 // transmit with no errors
  137. #define TSR_COLLISION (UCHAR)0x04 // collided at least once
  138. #define TSR_ABORTED (UCHAR)0x08 // too many collisions
  139. #define TSR_NO_CARRIER (UCHAR)0x10 // carrier lost
  140. #define TSR_NO_CDH (UCHAR)0x40 // no collision detect heartbeat
  141. //
  142. // Constants for the NIC_INTR_STATUS register.
  143. //
  144. // Indicate the cause of an interrupt.
  145. //
  146. #define ISR_EMPTY (UCHAR)0x00 // no bits set in ISR
  147. #define ISR_RCV (UCHAR)0x01 // packet received with no errors
  148. #define ISR_XMIT (UCHAR)0x02 // packet transmitted with no errors
  149. #define ISR_RCV_ERR (UCHAR)0x04 // error on packet reception
  150. #define ISR_XMIT_ERR (UCHAR)0x08 // error on packet transmission
  151. #define ISR_OVERFLOW (UCHAR)0x10 // receive buffer overflow
  152. #define ISR_COUNTER (UCHAR)0x20 // MSB set on tally counter
  153. #define ISR_DMA_DONE (UCHAR)0x40 // RDC
  154. #define ISR_RESET (UCHAR)0x80 // (not an interrupt) card is reset
  155. //
  156. // Constants for the NIC_RCV_CONFIG register.
  157. //
  158. // Configure what type of packets are received.
  159. //
  160. #define RCR_REJECT_ERR (UCHAR)0x00 // reject error packets
  161. #define RCR_BROADCAST (UCHAR)0x04 // receive broadcast packets
  162. #define RCR_MULTICAST (UCHAR)0x08 // receive multicast packets
  163. #define RCR_ALL_PHYS (UCHAR)0x10 // receive ALL directed packets
  164. #define RCR_MONITOR (UCHAR)0x20 // don't collect packets
  165. //
  166. // Constants for the NIC_RCV_STATUS register.
  167. //
  168. // Indicate the status of a received packet.
  169. //
  170. // These are also used to interpret the status byte in the
  171. // packet header of a received packet.
  172. //
  173. #define RSR_PACKET_OK (UCHAR)0x01 // packet received with no errors
  174. #define RSR_CRC_ERROR (UCHAR)0x02 // packet received with CRC error
  175. #define RSR_MULTICAST (UCHAR)0x20 // packet received was multicast
  176. #define RSR_DISABLED (UCHAR)0x40 // received is disabled
  177. #define RSR_DEFERRING (UCHAR)0x80 // receiver is deferring
  178. //
  179. // Constants for the NIC_XMIT_CONFIG register.
  180. //
  181. // Configures how packets are transmitted.
  182. //
  183. #define TCR_NO_LOOPBACK (UCHAR)0x00 // normal operation
  184. #define TCR_LOOPBACK (UCHAR)0x02 // loopback (set when NIC is stopped)
  185. #define TCR_INHIBIT_CRC (UCHAR)0x01 // inhibit appending of CRC
  186. #define TCR_NIC_LBK (UCHAR)0x02 // loopback through the NIC
  187. #define TCR_SNI_LBK (UCHAR)0x04 // loopback through the SNI
  188. #define TCR_COAX_LBK (UCHAR)0x06 // loopback to the coax
  189. //
  190. // Constants for the NIC_DATA_CONFIG register.
  191. //
  192. // Set data transfer sizes.
  193. //
  194. #define DCR_BYTE_WIDE (UCHAR)0x00 // byte-wide DMA transfers
  195. #define DCR_WORD_WIDE (UCHAR)0x01 // word-wide DMA transfers
  196. #define DCR_LOOPBACK (UCHAR)0x00 // loopback mode (TCR must be set)
  197. #define DCR_NORMAL (UCHAR)0x08 // normal operation
  198. #define DCR_FIFO_2_BYTE (UCHAR)0x00 // 2-byte FIFO threshhold
  199. #define DCR_FIFO_4_BYTE (UCHAR)0x20 // 4-byte FIFO threshhold
  200. #define DCR_FIFO_8_BYTE (UCHAR)0x40 // 8-byte FIFO threshhold
  201. #define DCR_FIFO_12_BYTE (UCHAR)0x60 // 12-byte FIFO threshhold
  202. #define DCR_AUTO_INIT (UCHAR)0x10 // Auto-init to remove packets from ring
  203. //
  204. // Constants for the NIC_INTR_MASK register.
  205. //
  206. // Configure which ISR settings actually cause interrupts.
  207. //
  208. #define IMR_RCV (UCHAR)0x01 // packet received with no errors
  209. #define IMR_XMIT (UCHAR)0x02 // packet transmitted with no errors
  210. #define IMR_RCV_ERR (UCHAR)0x04 // error on packet reception
  211. #define IMR_XMIT_ERR (UCHAR)0x08 // error on packet transmission
  212. #define IMR_OVERFLOW (UCHAR)0x10 // receive buffer overflow
  213. #define IMR_COUNTER (UCHAR)0x20 // MSB set on tally counter
  214. //++
  215. //
  216. // VOID
  217. // CardStart(
  218. // IN PNE2000_ADAPTER Adapter
  219. // )
  220. //
  221. //
  222. // Routine Description:
  223. //
  224. // Starts the card.
  225. //
  226. // Arguments:
  227. //
  228. // Adapter - pointer to the adapter block
  229. //
  230. // Return Value:
  231. //
  232. // None.
  233. //
  234. //--
  235. //
  236. // Assume that the card has been stopped as in CardStop.
  237. //
  238. #define CardStart(Adapter) \
  239. NdisRawWritePortUchar(((Adapter->IoPAddr)+NIC_XMIT_CONFIG), TCR_NO_LOOPBACK)
  240. //++
  241. //
  242. // VOID
  243. // CardSetAllMulticast(
  244. // IN PNE2000_ADAPTER Adapter
  245. // )
  246. //
  247. // Routine Description:
  248. //
  249. // Enables every bit in the card multicast bit mask.
  250. // Calls SyncCardSetAllMulticast.
  251. //
  252. // Arguments:
  253. //
  254. // Adapter - The adapter block.
  255. //
  256. // Return Value:
  257. //
  258. // None.
  259. //
  260. //--
  261. #define CardSetAllMulticast(Adapter) \
  262. NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
  263. SyncCardSetAllMulticast, (PVOID)(Adapter))
  264. //++
  265. //
  266. // VOID
  267. // CardCopyMulticastRegs(
  268. // IN PNE2000_ADAPTER Adapter
  269. // )
  270. //
  271. // Routine Description:
  272. //
  273. // Writes out the entire multicast bit mask to the card from
  274. // Adapter->NicMulticastRegs. Calls SyncCardCopyMulticastRegs.
  275. //
  276. // Arguments:
  277. //
  278. // Adapter - The adapter block.
  279. //
  280. // Return Value:
  281. //
  282. // None.
  283. //
  284. //--
  285. #define CardCopyMulticastRegs(Adapter) \
  286. NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
  287. SyncCardCopyMulticastRegs, (PVOID)(Adapter))
  288. //++
  289. //
  290. // VOID
  291. // CardGetInterruptStatus(
  292. // IN PNE2000_ADAPTER Adapter,
  293. // OUT PUCHAR InterrupStatus
  294. // )
  295. //
  296. // Routine Description:
  297. //
  298. // Reads the interrupt status (ISR) register from the card. Only
  299. // called at IRQL INTERRUPT_LEVEL.
  300. //
  301. // Arguments:
  302. //
  303. // Adapter - The adapter block.
  304. //
  305. // InterruptStatus - Returns the value of ISR.
  306. //
  307. // Return Value:
  308. //
  309. //--
  310. #define CardGetInterruptStatus(_Adapter,_InterruptStatus) \
  311. NdisRawReadPortUchar(((_Adapter)->IoPAddr+NIC_INTR_STATUS), (_InterruptStatus))
  312. //++
  313. //
  314. // VOID
  315. // CardSetReceiveConfig(
  316. // IN PNE2000_ADAPTER Adapter
  317. // )
  318. //
  319. // Routine Description:
  320. //
  321. // Sets the receive configuration (RCR) register on the card.
  322. // The value used is Adapter->NicReceiveConfig. Calls
  323. // SyncCardSetReceiveConfig.
  324. //
  325. // Arguments:
  326. //
  327. // Adapter - The adapter block.
  328. //
  329. // Return Value:
  330. //
  331. // None.
  332. //
  333. //--
  334. #define CardSetReceiveConfig(Adapter) \
  335. NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
  336. SyncCardSetReceiveConfig, (PVOID)(Adapter))
  337. //++
  338. //
  339. // VOID
  340. // CardBlockInterrupts(
  341. // IN PNE2000_ADAPTER Adapter
  342. // )
  343. //
  344. // Routine Description:
  345. //
  346. // Blocks all interrupts from the card by clearing the
  347. // interrupt mask (IMR) register. Only called from
  348. // IRQL INTERRUPT_LEVEL.
  349. //
  350. // Arguments:
  351. //
  352. // Adapter - The adapter block.
  353. //
  354. // Return Value:
  355. //
  356. // None.
  357. //
  358. //--
  359. #define CardBlockInterrupts(Adapter) \
  360. NdisRawWritePortUchar(((Adapter)->IoPAddr+NIC_INTR_MASK), 0)
  361. //++
  362. //
  363. // VOID
  364. // CardUnblockInterrupts(
  365. // IN PNE2000_ADAPTER Adapter
  366. // )
  367. //
  368. // Routine Description:
  369. //
  370. // Unblocks all interrupts from the card by setting the
  371. // interrupt mask (IMR) register. Only called from IRQL
  372. // INTERRUPT_LEVEL.
  373. //
  374. // Arguments:
  375. //
  376. // Adapter - The adapter block.
  377. //
  378. // Return Value:
  379. //
  380. // None.
  381. //
  382. //--
  383. #define CardUnblockInterrupts(Adapter) \
  384. NdisRawWritePortUchar(\
  385. ((Adapter)->IoPAddr+NIC_INTR_MASK), \
  386. (Adapter)->NicInterruptMask)
  387. //++
  388. //
  389. // VOID
  390. // CardAcknowledgeOverflowInterrupt(
  391. // IN PNE2000_ADAPTER Adapter
  392. // )
  393. //
  394. // Routine Description:
  395. //
  396. // Acknowledges an overflow interrupt by setting the bit in
  397. // the interrupt status (ISR) register. Calls
  398. // SyncCardAcknowledgeOverflow.
  399. //
  400. // Arguments:
  401. //
  402. // Adapter - The adapter block.
  403. //
  404. // Return Value:
  405. //
  406. // None.
  407. //
  408. //--
  409. #define CardAcknowledgeOverflowInterrupt(Adapter) \
  410. SyncCardAcknowledgeOverflow(Adapter)
  411. //++
  412. //
  413. // VOID
  414. // CardAcknowledgeCounterInterrupt(
  415. // IN PNE2000_ADAPTER Adapter
  416. // )
  417. //
  418. // Routine Description:
  419. //
  420. // Acknowledges a counter interrupt by setting the bit in
  421. // the interrupt status (ISR) register.
  422. //
  423. // Arguments:
  424. //
  425. // Adapter - The adapter block.
  426. //
  427. // Return Value:
  428. //
  429. // None.
  430. //
  431. //--
  432. #define CardAcknowledgeCounterInterrupt(Adapter) \
  433. NdisRawWritePortUchar(((Adapter)->IoPAddr+NIC_INTR_STATUS), ISR_COUNTER)
  434. //++
  435. //
  436. // VOID
  437. // CardUpdateCounters(
  438. // IN PNE2000_ADAPTER Adapter
  439. // )
  440. //
  441. // Routine Description:
  442. //
  443. // Updates the values of the three counters (frame alignment
  444. // errors, CRC errors, and missed packets) by reading in their
  445. // current values from the card and adding them to the ones
  446. // stored in the Adapter structure. Calls SyncCardUpdateCounters.
  447. //
  448. // Arguments:
  449. //
  450. // Adapter - The adapter block.
  451. //
  452. // Return Value:
  453. //
  454. // None.
  455. //
  456. //--
  457. #define CardUpdateCounters(Adapter) \
  458. NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
  459. SyncCardUpdateCounters, (PVOID)(Adapter))
  460. #endif // _NE2000HARDWARE_