Source code of Windows XP (NT5)
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  1. /*/****************************************************************************
  2. * name: mtxinit.c
  3. *
  4. * description: Routines to initialise MGA board
  5. *
  6. * designed: Benoit Leblanc
  7. * last modified: $Author: ctoutant $, $Date: 94/09/28 13:22:46 $
  8. *
  9. * version: $Id: MTXINIT.C 1.91 94/09/28 13:22:46 ctoutant Exp $
  10. *
  11. *
  12. * HwData * mtxCheckHwAll(void)
  13. * bool mtxSelectHw(HwData *pHardware)
  14. * HwModeData * mtxGetHwModes(void)
  15. * bool mtxSelectHwMode(HwModeData *pHwModeSelect)
  16. * bool mtxSetDisplayMode(HwModeData *pDisplayModeSelect, dword Zoom)
  17. *
  18. * dword mtxGetMgaSel(void)
  19. * void mtxGetInfo(HwModeData *pCurHwMode, HwModeData *pCurDispMode,
  20. * byte *InitBuffer, byte *VideoBuffer)
  21. * bool mtxSetLUT(word index, mtxRGB color)
  22. * void mtxClose(void)
  23. *
  24. ******************************************************************************/
  25. #include "switches.h"
  26. #ifdef WINDOWS_NT
  27. #if defined(ALLOC_PRAGMA)
  28. #pragma alloc_text(PAGE,mtxCheckHwAll)
  29. #pragma alloc_text(PAGE,mtxSelectHw)
  30. #pragma alloc_text(PAGE,mtxGetHwModes)
  31. #pragma alloc_text(PAGE,mtxSelectHwMode)
  32. #pragma alloc_text(PAGE,mtxSetDisplayMode)
  33. #pragma alloc_text(PAGE,overScan)
  34. #pragma alloc_text(PAGE,mapPciVl)
  35. #pragma alloc_text(PAGE,MapBoard)
  36. #pragma alloc_text(PAGE,adjustDefaultVidset)
  37. #pragma alloc_text(PAGE,selectMgaInfoBoard)
  38. #pragma alloc_text(PAGE,UpdateHwModeTable)
  39. // #pragma alloc_text(PAGE,mtxGetMgaSel)
  40. #pragma alloc_text(PAGE,mtxGetInfo)
  41. #pragma alloc_text(PAGE,InitHwStruct)
  42. #pragma alloc_text(PAGE,mtxSetLUT)
  43. #pragma alloc_text(PAGE,mtxClose)
  44. #endif
  45. //Not to be paged out:
  46. // Hw
  47. // pMgaBaseAddr
  48. // iBoard
  49. // mtxVideoMode
  50. // pMgaDeviceExtension
  51. //#if defined(ALLOC_PRAGMA)
  52. //#pragma data_seg("PAGE")
  53. //#endif
  54. #else /* #ifdef WINDOWS_NT */
  55. #include <stdlib.h>
  56. #include <string.h>
  57. #include <stdio.h>
  58. #include <dos.h>
  59. #include <time.h>
  60. #endif /* #ifdef WINDOWS_NT */
  61. #ifdef OS2
  62. #include <os2.h>
  63. #pragma intrinsic(strcat, strcpy)
  64. #endif
  65. #ifdef WINDOWS
  66. #include "windows.h"
  67. #endif
  68. #include "bind.h"
  69. #include "defbind.h"
  70. #include "sxci.h"
  71. #include "def.h"
  72. #include "mga.h"
  73. #include "mgai_c.h"
  74. #include "mgai.h"
  75. #include "caddi.h"
  76. #include "mtxpci.h"
  77. #include "mtxvpro.h"
  78. #include "vidfile.h"
  79. #if ((!defined (WINDOWS_NT)) || (USE_DDC_CODE))
  80. /*********** DDC CODE ****************/
  81. #include "edid.h"
  82. /*********** DDC CODE ****************/
  83. #endif
  84. /* Externals from mgainfo.c (which used to be mgainfo.h) */
  85. /* #include "mgainfo.h" */ /* Default video parameters */
  86. #ifdef WINDOWS_NT
  87. extern UCHAR DefaultVidset[];
  88. extern word configSpace;
  89. #else
  90. extern char DefaultVidset[];
  91. #endif
  92. /* Externals from tables.c (which used to be tables.h) */
  93. /* #include "tables.h" */
  94. extern OffScrData OffScrFBM_000_A[];
  95. extern OffScrData iOffScrFBM_000_A[];
  96. extern OffScrData OffScrFBM_010_A[];
  97. extern OffScrData iOffScrFBM_010_A[];
  98. extern OffScrData OffScrFBM_010_B[];
  99. extern OffScrData iOffScrFBM_010_B[];
  100. extern OffScrData OffScrFBM_011_A[];
  101. extern OffScrData iOffScrFBM_011_A[];
  102. extern OffScrData OffScrFBM_101_B[];
  103. extern OffScrData iOffScrFBM_101_B[];
  104. extern OffScrData OffScrFBM_111_A[];
  105. extern OffScrData iOffScrFBM_111_A[];
  106. extern OffScrData OffAth2[];
  107. extern OffScrData iOffAth2[];
  108. extern OffScrData OffAth4[];
  109. extern OffScrData iOffAth4[];
  110. extern HwModeData HwModesFBM_000_A[21];
  111. extern HwModeInterlace iHwModesFBM_000_A[21];
  112. extern HwModeData HwModesFBM_010_A[34];
  113. extern HwModeInterlace iHwModesFBM_010_A[34];
  114. extern HwModeData HwModesFBM_010_B[48];
  115. extern HwModeInterlace iHwModesFBM_010_B[48];
  116. extern HwModeData HwModesFBM_011_A[55];
  117. extern HwModeInterlace iHwModesFBM_011_A[55];
  118. extern HwModeData HwModesFBM_101_B[8];
  119. extern HwModeInterlace iHwModesFBM_101_B[8];
  120. extern HwModeData HwModesFBM_111_A[15];
  121. extern HwModeInterlace iHwModesFBM_111_A[15];
  122. extern HwModeData ModesAth2[63];
  123. extern HwModeInterlace iModesAth2[63];
  124. extern HwModeData ModesAth4[98];
  125. extern HwModeInterlace iModesAth4[98];
  126. #ifdef _WINDOWS_DLL16
  127. /*** Definition for pool memory ***/
  128. #define PAN_X 0
  129. #define PAN_Y 1
  130. #define PAN_DISP_WIDTH 2
  131. #define PAN_DISP_HEIGHT 3
  132. #define DB_SCALE 4
  133. #define PAN_BOUND_LEFT 5
  134. #define PAN_BOUND_TOP 6
  135. #define PAN_BOUND_RIGHT 7
  136. #define PAN_BOUND_BOTTOM 8
  137. HINSTANCE hsxci=0;
  138. HINSTANCE huser=0;
  139. typedef long (FAR PASCAL *FARPROC2)();
  140. static FARPROC2 fp1;
  141. word NbSxciLoaded=0;
  142. word FAR *pDllMem;
  143. #endif
  144. #ifdef PRINT_DEBUG
  145. extern int debug_printf( char *fmt, ... );
  146. extern void openDebugfFile(char *s);
  147. extern void reOpenDebugfFile();
  148. extern void closeDebugfFile(char *s);
  149. extern void imprimeBuffer(byte *InitBuf, byte *VideoBuf);
  150. #endif
  151. dword MgaSel;
  152. #ifdef WINDOWS_NT
  153. extern INTERFACE_TYPE NtInterfaceType;
  154. extern UCHAR MgaBusType[];
  155. #define MGA_BUS_INVALID 0
  156. #define MGA_BUS_PCI 1
  157. #define MGA_BUS_ISA 2
  158. ULONG PciSlot;
  159. PVOID pMgaDeviceExtension;
  160. PUCHAR pMgaBaseAddr;
  161. PUCHAR pciBiosRoutine;
  162. PUCHAR pMgaPciIo, pMgaPciConfigSpace;
  163. #define PCI_LEN 0x00000004
  164. #define CONFIG_SPACE 0x0000c000
  165. #define CONFIG_LEN 0x00000100
  166. VIDEO_ACCESS_RANGE MgaPciCseAccessRange =
  167. {PCI_CSE, 0x00000000, PCI_LEN, 1, 0, 1};
  168. VIDEO_ACCESS_RANGE MgaPciConfigAccessRange =
  169. {CONFIG_SPACE, 0x00000000, CONFIG_LEN, 1, 0, 1};
  170. VIDEO_ACCESS_RANGE VideoProAccessRange =
  171. {0x00000240, 0x00000000, 0x20, 1, 1, 1};
  172. typedef struct _MULTI_MODE
  173. {
  174. ULONG MulModeNumber; // unique mode Id
  175. ULONG MulWidth; // total width of mode
  176. ULONG MulHeight; // total height of mode
  177. ULONG MulPixWidth; // pixel depth of mode
  178. ULONG MulRefreshRate; // refresh rate of mode
  179. USHORT MulArrayWidth; // number of boards arrayed along X
  180. USHORT MulArrayHeight; // number of boards arrayed along Y
  181. UCHAR MulBoardNb[NB_BOARD_MAX]; // board numbers of required boards
  182. USHORT MulBoardMode[NB_BOARD_MAX]; // mode required from each board
  183. HwModeData *MulHwModes[NB_BOARD_MAX]; // pointers to required HwModeData
  184. } MULTI_MODE, *PMULTI_MODE;
  185. /*--------------------------------------------------------------------------*\
  186. | HW_DEVICE_EXTENSION
  187. |
  188. | Define device extension structure. This is device dependant/private
  189. | information.
  190. |
  191. \*--------------------------------------------------------------------------*/
  192. typedef struct _MGA_DEVICE_EXTENSION {
  193. ULONG SuperModeNumber; // Current mode number
  194. ULONG NumberOfSuperModes; // Total number of modes
  195. PMULTI_MODE pSuperModes; // Array of super-modes structures
  196. // For each board:
  197. ULONG NumberOfModes[NB_BOARD_MAX]; // Number of available modes
  198. ULONG NumberOfValidModes[NB_BOARD_MAX];
  199. // Number of valid modes
  200. ULONG ModeFlags2D[NB_BOARD_MAX]; // 2D modes supported by each board
  201. ULONG ModeFlags3D[NB_BOARD_MAX]; // 3D modes supported by each board
  202. USHORT ModeFreqs[NB_BOARD_MAX][64]; // Refresh rates bit fields
  203. UCHAR ModeList[NB_BOARD_MAX][64]; // Valid hardware modes list
  204. HwModeData *pMgaHwModes[NB_BOARD_MAX]; // Array of mode information structs.
  205. BOOLEAN bUsingInt10; // May need this later
  206. PVOID KernelModeMappedBaseAddress[NB_BOARD_MAX];
  207. // Kern-mode virt addr base of MGA regs
  208. PVOID UserModeMappedBaseAddress[NB_BOARD_MAX];
  209. // User-mode virt addr base of MGA regs
  210. PVOID MappedAddress[]; // NUM_MGA_COMMON_ACCESS_RANGES elements
  211. } MGA_DEVICE_EXTENSION, *PMGA_DEVICE_EXTENSION;
  212. //#define ADDR_46E8_PORT (PVOID) ((ULONG)(((PMGA_DEVICE_EXTENSION)pMgaDeviceExtension)->MappedAddress[5]) + (0x46e8 - 0x46e8))
  213. #define ADDR_46E8_PORT 0x46e8
  214. #else /* #ifdef WINDOWS_NT */
  215. volatile byte _Far *pMgaBaseAddr;
  216. #endif /* #ifdef WINDOWS_NT */
  217. /* Global parameters */
  218. byte iBoard=0; /* index of current selected board */
  219. byte NbBoard=0; /* total board detected */
  220. bool CheckHwAllDone=FALSE;
  221. bool SpecialModeOn = FALSE;
  222. /*VIDEOPRO*/
  223. bool VAFCconnector;
  224. extern bool initVideoMode(word mode, byte pwidth);
  225. extern bool initVideoPro(byte mode, byte dactype);
  226. #ifdef OS2
  227. word mtxVideoMode = mtxPASSTHRU;
  228. #else
  229. word mtxVideoMode;
  230. #endif
  231. long setTVP3026Freq ( volatile byte _Far *pDeviceParam, long fout, long reg, byte pWidth );
  232. #ifndef __DDK_SRC__
  233. extern dword BindingRC[NB_BOARD_MAX];
  234. extern dword BindingCL[NB_BOARD_MAX];
  235. #endif
  236. #if( !defined(_WINDOWS_DLL16) && !defined(INIT_ONLY))
  237. #ifndef OS2
  238. dword _Far *BufBind;
  239. SYSPARMS *sp;
  240. #ifndef __DDK_SRC__
  241. byte* CaddiInit(byte *InitBuf, byte *VideoBuf);
  242. #else
  243. byte* InitDDK(byte *InitBuf, byte *VideoBuf);
  244. byte* ReInitDDK(byte *InitBuf, byte *VideoBuf);
  245. #endif
  246. void setTVP3026(volatile byte _Far *pDevice, long fout_voulue, long reg, word pWidth);
  247. #endif
  248. #endif
  249. HwData Hw[NB_BOARD_MAX+1];
  250. dword presentMclk[NB_BOARD_MAX+1] = {0}; /* MCLK currently in use */
  251. dword Dst0, Dst1;
  252. dword ProductMGA[NB_BOARD_MAX];
  253. HwModeData *FirstMode[NB_BOARD_MAX];
  254. byte InitBuf[NB_BOARD_MAX][INITBUF_S] = {0};
  255. byte VideoBuf[NB_BOARD_MAX][VIDEOBUF_S] = {0};
  256. extern dword crtcTab[NB_CRTC_PARAM];
  257. extern vid vidtab[24];
  258. char *mgainf = (char *)0;
  259. /*** PROTOTYPES ***/
  260. bool MapBoard(void);
  261. static void overScan(void);
  262. void UpdateHwModeTable (char *,HwModeData *,HwModeInterlace *,bool);
  263. bool ProgrammeClock(byte Chip, dword Dst1, dword InfoDac);
  264. extern dword getmgasel(void);
  265. extern programme_reg_icd ( volatile byte _Far *pDevice, short reg, dword data );
  266. #if 0
  267. extern word detectVideoBoard(void);
  268. #endif
  269. void mtxMapVLBSpace();
  270. bool mtxSetVLB(dword sel);
  271. bool mtxIsVLBBios ();
  272. void delay_us(dword delai);
  273. #ifndef WINDOWS_NT
  274. void setPciOptionReg();
  275. #endif
  276. #ifdef WINDOWS_NT
  277. extern PUCHAR setmgasel(dword MgaSel, dword phyadr, dword limit);
  278. extern PVOID AllocateSystemMemory(ULONG NumberOfBytes);
  279. extern BOOLEAN bConflictDetected(ULONG ulAddressToVerify);
  280. extern PUCHAR pciBiosCallAddr();
  281. #else /* #ifdef WINDOWS_NT */
  282. #ifdef OS2
  283. extern volatile byte _Far *setmgasel(dword MgaSel, dword phyadr, word limit);
  284. extern HWIsSelected(dword, dword , dword, dword, byte);
  285. #else
  286. extern volatile byte _Far *setmgasel(dword MgaSel, dword phyadr, dword limit);
  287. #endif
  288. #endif /* #ifdef WINDOWS_NT */
  289. extern void GetMGAConfiguration(volatile byte _Far *pMgaBaseAddr,
  290. dword *Dst0, dword *Dst1, dword *InfoHardware);
  291. extern void MGASysInit(byte *);
  292. #ifdef OS2
  293. extern char *selectMgaInfoBoard();
  294. #else
  295. char *selectMgaInfoBoard();
  296. #endif
  297. extern bool loadVidPar(dword Zoom, HwModeData *HwMode, HwModeData *DisplayMode);
  298. extern void calculCrtcParam(void);
  299. extern void MoveToVideoBuffer(byte *vidtab, byte *crtcTab, byte *VideoBuf);
  300. extern void MGAVidInit(byte *, byte *);
  301. dword mtxGetMgaSel(void);
  302. bool mtxLectureMgaInf(void);
  303. bool InitHwStruct(byte CurBoard, HwModeData *pHwModeData, word sizeArray,
  304. dword VramAvailable, dword DramAvailable);
  305. extern char *mtxConvertMgaInf( char * );
  306. #ifdef _WINDOWS_DLL16
  307. extern void FAR *memalloc(dword size);
  308. extern dword memfree(void FAR **mem);
  309. extern void AdjustDBWindow(void);
  310. #endif
  311. #ifdef WINDOWS
  312. dword ValMSec;
  313. int _Far pascal LibMain(HANDLE hInstance, WORD wDataSeg, WORD wHeapSize, LPSTR lpszCmdLine)
  314. {
  315. if (wHeapSize > 0)
  316. UnlockData(0);
  317. return 1;
  318. }
  319. #endif
  320. /*-----------------------------------------------------
  321. * mtxCheckHwAll
  322. *
  323. * This function returns the pointer to an array of MGA
  324. * hardware devices found in the system
  325. *
  326. * Return value:
  327. * >0 = Pointer to HwData structure
  328. * 0 = Error ; No MGA device found
  329. *-----------------------------------------------------*/
  330. HwData * mtxCheckHwAll(void)
  331. {
  332. dword TmpDword;
  333. byte Board, TmpByte, DUB_SEL, ChipSet;
  334. dword PcbRev, TitanRev, DubRev;
  335. dword RamBanks;
  336. dword InfoHardware;
  337. void *pMgaInfo;
  338. bool dacSupportHires;
  339. #ifndef WINDOWS_NT
  340. byte i;
  341. // Modified for Windows NT:
  342. // Since we can't open files in the kernel-mode driver, MGA.INF
  343. // is read in the user-mode driver instead; so, prior to calling
  344. // _mtxCheckHwAll, mgainf already points to MGA.INF data and
  345. // all the MGA boards have been mapped already...so we don't have
  346. // to call MapBoard or mtxLectureMgaInf here.
  347. if (! CheckHwAllDone)
  348. {
  349. /*** Figure number of iteration in one tick (55 millisecond) ***/
  350. #ifdef WINDOWS
  351. {
  352. dword _Far *tick = MAKELP(0x40, 0x6c);
  353. dword t;
  354. _asm{ pushf
  355. sti } /* enable the interrupt because of a hang bug */
  356. ValMSec = 0;
  357. t = *tick + 1;
  358. while(t > *tick);
  359. t++;
  360. while(t > *tick)
  361. ValMSec++;
  362. _asm popf
  363. }
  364. #endif
  365. #ifdef PRINT_DEBUG
  366. openDebugfFile("\\SXCIEXT.LOG");
  367. debug_printf(" ---- Premier appel CheckHwAll\n");
  368. #endif
  369. if (! MapBoard())
  370. {
  371. #ifdef PRINT_DEBUG
  372. debug_printf("MapBoard Fail\n");
  373. #endif
  374. return(mtxFAIL);
  375. }
  376. }
  377. #ifdef PRINT_DEBUG
  378. else
  379. {
  380. reOpenDebugfFile();
  381. debug_printf(" ---- appel (pas le premier) CheckHwAll\n");
  382. }
  383. #endif
  384. if (! mtxLectureMgaInf())
  385. {
  386. #ifdef PRINT_DEBUG
  387. closeDebugfFile("mtxLectureMgaInf Fail");
  388. #endif
  389. return(mtxFAIL);
  390. }
  391. #endif /* #ifndef WINDOWS_NT */
  392. /* Initialize Hw[] structure for each board */
  393. for (Board=0; Board<NbBoard; Board++)
  394. {
  395. #if ((!defined (WINDOWS_NT)) || (USE_DDC_CODE))
  396. /*********** DDC COMPAQ CODE ****************/
  397. if (NbBoard == 1)
  398. if (ReportDDCcapabilities())
  399. SupportDDC = (byte)ReadEdid();
  400. /*********** DDC COMPAQ CODE ****************/
  401. #endif
  402. #ifdef PRINT_DEBUG
  403. {
  404. debug_printf("BOARD No %d\n", Board);
  405. }
  406. #endif
  407. if (! mtxSelectHw(&Hw[Board]))
  408. {
  409. #ifdef PRINT_DEBUG
  410. closeDebugfFile("mtxSelectHw Fail");
  411. #endif
  412. return(mtxFAIL);
  413. }
  414. mtxMapVLBSpace();
  415. pMgaInfo = selectMgaInfoBoard();
  416. if (! pMgaInfo)
  417. {
  418. #ifdef PRINT_DEBUG
  419. closeDebugfFile("selectMgaInfoBoard Fail");
  420. #endif
  421. return(mtxFAIL);
  422. }
  423. /* Initialize according to Vgaen switch (strapping conf.) */
  424. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_CONFIG),TmpDword);
  425. if (TmpDword&TITAN_VGAEN_M)
  426. Hw[Board].VGAEnable = 1;
  427. else
  428. {
  429. Hw[Board].VGAEnable = 0;
  430. if (! CheckHwAllDone)
  431. {
  432. /*----- SoftReset (need for PCI IMPRSESSION+ with high freq --*/
  433. mgaWriteDWORD(*(pMgaBaseAddr + TITAN_OFFSET + TITAN_RST), TITAN_SOFTRESET_SET);
  434. delay_us(2);
  435. mgaWriteDWORD(*(pMgaBaseAddr + TITAN_OFFSET + TITAN_RST), TITAN_SOFTRESET_CLR);
  436. delay_us(2);
  437. }
  438. }
  439. #if ((!defined (WINDOWS_NT)) || (USE_DDC_CODE))
  440. /*********** DDC COMPAQ CODE ****************/
  441. if (SupportDDC && Hw[0].VGAEnable)
  442. Hw[0].PortCfg = 0x01;
  443. if (SupportDDC && (!Hw[0].VGAEnable || mgainf != DefaultVidset))
  444. SupportDDC = FALSE;
  445. /*********** DDC COMPAQ CODE ****************/
  446. #endif
  447. if (TmpDword&0x00000001)
  448. Hw[Board].Device8_16 = 1; /* mode 16-bit */
  449. else
  450. Hw[Board].Device8_16 = 0; /* mode 8-bit */
  451. #ifdef WINDOWS_NT
  452. if ((Hw[iBoard].pHwMode != NULL) &&
  453. (NbBoard > 1))
  454. {
  455. // pHwMode has been initialized to NULL in MgaFindAdapter.
  456. // If it's not NULL here, it means we've been here before.
  457. // If we have more than one board, then InitHwStruct has allocated
  458. // memory for pHwMode, and we'll release it here.
  459. VideoPortReleaseBuffer(pMgaDeviceExtension, Hw[iBoard].pHwMode);
  460. Hw[iBoard].pHwMode = NULL;
  461. }
  462. #endif
  463. Hw[iBoard].pCurrentHwMode = NULL;
  464. Hw[iBoard].pCurrentDisplayMode = NULL;
  465. Hw[iBoard].CurrentZoomFactor = 0;
  466. Hw[iBoard].CurrentXStart = 0;
  467. Hw[iBoard].CurrentYStart = 0;
  468. mtxSetVideoMode(mtxADV_MODE);
  469. GetMGAConfiguration(pMgaBaseAddr, &Dst0, &Dst1, &InfoHardware);
  470. #ifdef PRINT_DEBUG
  471. {
  472. debug_printf("DST0 = 0x%08lx, DST1 = 0x%08lx InfoHardware = 0x%x\n", Dst0, Dst1, InfoHardware);
  473. }
  474. #endif
  475. /* Verify if DAC support resolution above 1280 */
  476. dacSupportHires = !(Dst1 & TITAN_DST1_ABOVE1280_M); /* Test bit Above1280 */
  477. Hw[Board].ProductType = (Dst0 & TITAN_DST0_PRODUCT_M) >> TITAN_DST0_PRODUCT_A;
  478. PcbRev = (Dst0 & TITAN_DST0_PCBREV_M) >> TITAN_DST0_PCBREV_A;
  479. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_REV), TitanRev);
  480. TitanRev = (TitanRev & 0x000000ff) << 4;
  481. DubRev = 0 << 8;
  482. if( ((TitanRev >> 4) & 0x0000000f) < ATHENA_CHIP)
  483. PcbRev = 0xf - (PcbRev & 0xf); /* 4 bits for TITAN and ATLAS */
  484. else
  485. PcbRev = 7 - (PcbRev & 0x7); /* 3 bits for ATHENA */
  486. Hw[Board].ProductRev = PcbRev+TitanRev+DubRev;
  487. #if 0
  488. /*** status presence of the VideoPro board ***/
  489. if( detectVideoBoard() )
  490. Hw[Board].ProductRev |= 0x1000; /* Set bit 12 to 1 */
  491. else
  492. Hw[Board].ProductRev &= 0xffffefff; /* Set bit 12 to 0 */
  493. #endif
  494. if( ((Hw[iBoard].ProductRev >> 4) & 0x0000000f) == ATHENA_CHIP)
  495. {
  496. /*------ Strap added for ATHENA ------------------------------*/
  497. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), TmpDword);
  498. /** BEN we add this condition to fix bug shift left **/
  499. /* For Impression Lite we force regular operation */
  500. if ((Dst1 & TITAN_DST1_ABOVE1280_M) && (Dst1 & TITAN_DST1_200MHZ_M) &&
  501. ((Hw[iBoard].ProductRev >> 4) & 0x0000000f) == ATHENA_CHIP )
  502. {
  503. TmpDword = TmpDword & 0xfffffffb; /* bit 2=0: Board supports regular (135MHz/170MHz) operation */
  504. }
  505. else
  506. {
  507. if((Dst1 & TITAN_DST1_200MHZ_M) >> TITAN_DST1_200MHZ_A)
  508. TmpDword = TmpDword & 0xfffffffb; /* bit 2=0: Board supports regular (135MHz/170MHz) operation */
  509. else
  510. TmpDword = TmpDword | 0x00000004; /* bit 2=1: Board supports 200MHz operation */
  511. }
  512. mgaWriteDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), TmpDword);
  513. if (
  514. ( (InfoHardware == Info_Dac_ViewPoint) ||
  515. (InfoHardware == Info_Dac_TVP3026)
  516. ) &&
  517. (TmpDword & 0x00000004)
  518. ) /* support 200MHz */
  519. dacSupportHires = 1;
  520. else
  521. dacSupportHires = 0;
  522. /*------ Strap added for ATHENA ------------------------------*/
  523. /*** BEN I add this condition to prevent to program NOMUX for
  524. board MGA-PCI/2+ and MGA-VLB/2+ because the bit NOMUX
  525. is used to set the clock ***/
  526. if (
  527. (InfoHardware == Info_Dac_BT485) ||
  528. (InfoHardware == Info_Dac_ATT2050) ||
  529. (InfoHardware == Info_Dac_PX2085)
  530. )
  531. {
  532. /*------ Strap added for ATHENA --------------------------*/
  533. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), TmpDword);
  534. if((Dst1 & TITAN_DST1_NOMUXES_M) >> TITAN_DST1_NOMUXES_A)
  535. TmpDword = TmpDword & 0xffffffdf; /* bit 5=0: */
  536. else
  537. TmpDword = TmpDword | 0x00000020; /* bit 5=1: */
  538. mgaWriteDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), TmpDword);
  539. /*------ Strap added for ATHENA --------------------------*/
  540. }
  541. }
  542. /*** BEN open issue */
  543. Hw[Board].ShellRev = 0;
  544. Hw[Board].BindingRev = BINDING_REV;
  545. /*** ----- DUBIC PATCH Disable mouse IRQ and proceed ------ ***/
  546. mgaWriteBYTE(*(pMgaBaseAddr + DUBIC_OFFSET + DUBIC_NDX_PTR), 0x08);
  547. mgaReadBYTE(*(pMgaBaseAddr + DUBIC_OFFSET + DUBIC_DUB_SEL), DUB_SEL);
  548. mgaWriteBYTE(*(pMgaBaseAddr + DUBIC_OFFSET + DUBIC_DUB_SEL), 0x00);
  549. /*** ------------------------------------------------------ ***/
  550. mgaWriteBYTE(*(pMgaBaseAddr+DUBIC_OFFSET + DUBIC_NDX_PTR), DUBIC_DUB_CTL2);
  551. mgaReadBYTE(*(pMgaBaseAddr+DUBIC_OFFSET + DUBIC_DATA), TmpByte);
  552. /*** ----- DUBIC PATCH ReEnable mouse IRQ ----------------- ***/
  553. mgaWriteBYTE(*(pMgaBaseAddr + DUBIC_OFFSET + DUBIC_NDX_PTR), 0x08);
  554. mgaWriteBYTE(*(pMgaBaseAddr + DUBIC_OFFSET + DUBIC_DUB_SEL), DUB_SEL);
  555. /*** ------------------------------------------------------ ***/
  556. Hw[Board].Sync = TmpByte & 0x1;
  557. #if 0
  558. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_OPMODE), TmpDword);
  559. if (TmpDword & 0x00000100)
  560. Hw[Board].PortCfg = 1; /* Mouse enable */
  561. else if (TmpByte & 0x04)
  562. Hw[Board].PortCfg = 2; /* Laser enable */
  563. else
  564. Hw[Board].PortCfg = 0; /* Port disable */
  565. #endif
  566. /* Interrupt number for the mouse or the laser port */
  567. mgaReadBYTE(*(pMgaBaseAddr+DUBIC_OFFSET + DUBIC_DUB_SEL), TmpByte);
  568. TmpByte = (TmpByte & 0x18) >> 3;
  569. switch (TmpByte)
  570. {
  571. case 0:
  572. Hw[Board].PortIRQ = (byte)-1;
  573. break;
  574. case 1:
  575. Hw[Board].PortIRQ = 3;
  576. break;
  577. case 2:
  578. Hw[Board].PortIRQ = 4;
  579. break;
  580. case 3:
  581. Hw[Board].PortIRQ = 5;
  582. break;
  583. }
  584. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_OPMODE),TmpDword);
  585. if (TmpDword & TITAN_MOUSEMAP_M)
  586. Hw[Board].MouseMap = 0x238;
  587. else
  588. Hw[Board].MouseMap = 0x23c;
  589. mgaReadBYTE(*(pMgaBaseAddr+DUBIC_OFFSET + DUBIC_DUB_SEL), TmpByte);
  590. TmpByte = (TmpByte & 0x70) >> 5;
  591. switch (TmpByte)
  592. {
  593. case 0:
  594. Hw[Board].MouseIRate = 0;
  595. break;
  596. case 1:
  597. Hw[Board].MouseIRate = 25;
  598. break;
  599. case 2:
  600. Hw[Board].MouseIRate = 50;
  601. break;
  602. case 3:
  603. Hw[Board].MouseIRate = 100;
  604. break;
  605. case 4:
  606. Hw[Board].MouseIRate = 200;
  607. break;
  608. }
  609. /*Hw[Board].DacType = InfoHardware & 0x00000003; */
  610. /*** BEN Temporary translate code ***/
  611. #if 0
  612. /*VIDEOPRO*/
  613. VAFCconnector = 0;
  614. #endif
  615. switch(InfoHardware)
  616. {
  617. case Info_Dac_BT481:
  618. case Info_Dac_BT482:
  619. Hw[Board].DacType = BT482;
  620. break;
  621. case Info_Dac_Sierra:
  622. Hw[Board].DacType = SIERRA;
  623. break;
  624. case Info_Dac_ViewPoint:
  625. Hw[Board].DacType = VIEWPOINT;
  626. break;
  627. case Info_Dac_TVP3026:
  628. Hw[Board].DacType = TVP3026;
  629. break;
  630. case Info_Dac_BT484:
  631. Hw[Board].DacType = BT484;
  632. break;
  633. case Info_Dac_BT485:
  634. case Info_Dac_ATT2050:
  635. Hw[Board].DacType = BT485;
  636. break;
  637. case Info_Dac_Chameleon:
  638. Hw[Board].DacType = CHAMELEON;
  639. break;
  640. case Info_Dac_PX2085:
  641. #if 0
  642. /*VIDEOPRO*/
  643. VAFCconnector = 1;
  644. #endif
  645. #ifndef WINDOWS_NT
  646. Hw[Board].DacType = BT485;
  647. #else
  648. Hw[Board].DacType = PX2085;
  649. #endif /* #ifndef WINDOWS_NT */
  650. break;
  651. default:
  652. return(mtxFAIL);
  653. }
  654. #ifdef PRINT_DEBUG
  655. {
  656. debug_printf("Dactype[%d] = %x\n", Board, Hw[Board].DacType);
  657. }
  658. #endif
  659. /*** Cursor info init ***/
  660. switch(Hw[Board].DacType)
  661. {
  662. case BT482:
  663. Hw[Board].cursorInfo.MaxWidth = 32;
  664. Hw[Board].cursorInfo.MaxHeight = 32;
  665. Hw[Board].cursorInfo.MaxDepth = 2;
  666. Hw[Board].cursorInfo.MaxColors = 2;
  667. break;
  668. case BT485:
  669. case PX2085:
  670. case VIEWPOINT:
  671. Hw[Board].cursorInfo.MaxWidth = 64;
  672. Hw[Board].cursorInfo.MaxHeight = 64;
  673. Hw[Board].cursorInfo.MaxDepth = 2;
  674. Hw[Board].cursorInfo.MaxColors = 2;
  675. break;
  676. case TVP3026:
  677. Hw[Board].cursorInfo.MaxWidth = 64;
  678. Hw[Board].cursorInfo.MaxHeight = 64;
  679. Hw[Board].cursorInfo.MaxDepth = 2;
  680. Hw[Board].cursorInfo.MaxColors = 3;
  681. break;
  682. default:
  683. Hw[Board].cursorInfo.MaxWidth = 0;
  684. Hw[Board].cursorInfo.MaxHeight = 0;
  685. Hw[Board].cursorInfo.MaxDepth = 0;
  686. Hw[Board].cursorInfo.MaxColors = 0;
  687. break;
  688. }
  689. Hw[Board].cursorInfo.CurWidth = 0;
  690. Hw[Board].cursorInfo.CurHeight = 0;
  691. Hw[Board].cursorInfo.HotSX = 0;
  692. Hw[Board].cursorInfo.HotSY = 0;
  693. /* Form Rambank value */
  694. RamBanks = ((Dst1 & TITAN_DST1_RAMBANK_M) << 8L) |
  695. ((Dst0 & 0xfe000000) >> 24L) |
  696. ((Dst1 & TITAN_DST1_RAMBANK0_M) >> TITAN_DST1_RAMBANK0_A);
  697. /*** Check the ZTAG bit ***/
  698. if (RamBanks & (dword)0x40)
  699. *((byte*) (InitBuf[Board] + INITBUF_ZTagFlag)) = TRUE;
  700. else
  701. *((byte*) (InitBuf[Board] + INITBUF_ZTagFlag)) = FALSE;
  702. RamBanks = RamBanks & 0x1bf; /* Mask le ZTAG et bits dont care */
  703. #ifdef PRINT_DEBUG
  704. {
  705. debug_printf("RamBank = %x\n", RamBanks);
  706. }
  707. #endif
  708. switch((Hw[iBoard].ProductRev >> 4) & 0x0000000f)
  709. {
  710. case TITAN_CHIP:
  711. ChipSet = TITAN_CHIP;
  712. break;
  713. case ATLAS_CHIP:
  714. ChipSet = ATLAS_CHIP;
  715. /* Check if VLB2 board */
  716. mgaReadDWORD(*(pMgaBaseAddr+0x2000),TmpDword);
  717. if (TmpDword == (dword)0x0518102b) /* ID Matrox */
  718. mgaWriteBYTE(*(pMgaBaseAddr+0x2040),0x01); /* Program option reg */
  719. #ifndef WINDOWS_NT
  720. else /* PCI bus */
  721. /* If PCI disable PCI posted write feature
  722. if system use Ares chipset */
  723. disPostedWFeature();
  724. break;
  725. #endif /* #ifndef WINDOWS_NT */
  726. case ATHENA_CHIP:
  727. ChipSet = ATHENA_CHIP;
  728. /*** BEN se programme maintenant par le clock synthetiser ***/
  729. /* Check if VLB2 board */
  730. mgaReadDWORD(*(pMgaBaseAddr+0x2000),TmpDword);
  731. if (TmpDword == (dword)0x0518102b) /* ID Matrox */
  732. mgaWriteBYTE(*(pMgaBaseAddr+0x2040),0x01); /* Program option reg */
  733. break;
  734. }
  735. /*** Define ProductMGA ***/
  736. if (RamBanks == (dword)0x001 && ChipSet == TITAN_CHIP)
  737. ProductMGA[Board] = MGA_ULT_1M;
  738. else if (RamBanks == (dword)0x004 && ChipSet == TITAN_CHIP)
  739. ProductMGA[Board] = MGA_ULT_2M;
  740. else if (RamBanks == (dword)0x005 && ChipSet == TITAN_CHIP)
  741. ProductMGA[Board] = MGA_IMP_3M;
  742. else if (RamBanks == (dword)0x025 && ChipSet == TITAN_CHIP)
  743. ProductMGA[Board] = MGA_IMP_3M_Z;
  744. else if (RamBanks == (dword)0x09C && ChipSet == TITAN_CHIP)
  745. ProductMGA[Board] = MGA_PRO_4M5;
  746. else if (RamBanks == (dword)0x13C && ChipSet == TITAN_CHIP)
  747. ProductMGA[Board] = MGA_PRO_4M5_Z;
  748. else if (RamBanks == (dword)0x004 && (ChipSet == ATLAS_CHIP || ChipSet == ATHENA_CHIP))
  749. ProductMGA[Board] = MGA_PCI_2M;
  750. else if (RamBanks == (dword)0x005 && (ChipSet == ATLAS_CHIP || ChipSet == ATHENA_CHIP))
  751. ProductMGA[Board] = MGA_PCI_4M;
  752. else
  753. {
  754. #ifdef PRINT_DEBUG
  755. closeDebugfFile("RamBanks Inconnue");
  756. #endif
  757. return(mtxFAIL);
  758. }
  759. /*** Define Product type for external use ***/
  760. if( ChipSet == TITAN_CHIP )
  761. {
  762. if( ProductMGA[Board]==MGA_ULT_1M || ProductMGA[Board]==MGA_ULT_2M )
  763. Hw[Board].ProductType |= (dword)MGA_ULTIMA<<16;
  764. else if( ProductMGA[Board]==MGA_PRO_4M5 || ProductMGA[Board]==MGA_PRO_4M5_Z )
  765. Hw[Board].ProductType |= (dword)MGA_IMPRESSION_PRO<<16;
  766. else
  767. Hw[Board].ProductType |= (dword)MGA_IMPRESSION<<16;
  768. }
  769. else if( ChipSet == ATLAS_CHIP )
  770. {
  771. if( InfoHardware == Info_Dac_PX2085 )
  772. Hw[Board].ProductType |= (dword)MGA_ULTIMA_VAFC<<16;
  773. else if( (Dst1 & TITAN_DST1_200MHZ_M) && !(Dst1 & TITAN_DST1_ABOVE1280_M))
  774. Hw[Board].ProductType |= (dword)MGA_ULTIMA_PLUS_200<<16;
  775. else if( InfoHardware == Info_Dac_ViewPoint )
  776. Hw[Board].ProductType |= (dword)MGA_ULTIMA_PLUS<<16;
  777. else
  778. Hw[Board].ProductType |= (dword)MGA_ULTIMA<<16;
  779. }
  780. else /* Athena */
  781. {
  782. if ((Dst1 & TITAN_DST1_ABOVE1280_M) && (Dst1 & TITAN_DST1_200MHZ_M))
  783. Hw[Board].ProductType |= (dword)MGA_IMPRESSION_LTE<<16;
  784. else if( InfoHardware == Info_Dac_TVP3026)
  785. Hw[Board].ProductType |= (dword)MGA_IMPRESSION_PLUS<<16;
  786. else if( InfoHardware == Info_Dac_ViewPoint )
  787. Hw[Board].ProductType |= (dword)MGA_ULTIMA_PLUS<<16;
  788. else
  789. Hw[Board].ProductType |= (dword)MGA_ULTIMA<<16;
  790. }
  791. #ifdef PRINT_DEBUG
  792. {
  793. debug_printf("ProductMGA[%d] = %x\n", Board, ProductMGA[Board]);
  794. }
  795. #endif
  796. if(! ProgrammeClock(ChipSet, Dst1, InfoHardware))
  797. return(mtxFAIL);
  798. switch (ProductMGA[Board])
  799. {
  800. case MGA_ULT_1M:
  801. if(!(InitHwStruct(Board, HwModesFBM_000_A,
  802. sizeof(HwModesFBM_000_A), 1048576, 0)))
  803. {
  804. #ifdef PRINT_DEBUG
  805. closeDebugfFile("MGA_ULT_1M : InitHwStruct Fail");
  806. #endif
  807. return(mtxFAIL);
  808. }
  809. UpdateHwModeTable (pMgaInfo, FirstMode[Board],
  810. iHwModesFBM_000_A, dacSupportHires);
  811. break;
  812. case MGA_ULT_2M:
  813. if(!(InitHwStruct(Board, HwModesFBM_010_A,
  814. sizeof(HwModesFBM_010_A), 2097152, 0)))
  815. {
  816. #ifdef PRINT_DEBUG
  817. closeDebugfFile("MGA_ULT_2M : InitHwStruct Fail");
  818. #endif
  819. return(mtxFAIL);
  820. }
  821. UpdateHwModeTable (pMgaInfo, FirstMode[Board],
  822. iHwModesFBM_010_A, dacSupportHires);
  823. break;
  824. case MGA_IMP_3M:
  825. if(!(InitHwStruct(Board, HwModesFBM_010_B,
  826. sizeof(HwModesFBM_010_B), 3145728, 0)))
  827. {
  828. #ifdef PRINT_DEBUG
  829. closeDebugfFile("MGA_IMP_3M : InitHwStruct Fail");
  830. #endif
  831. return(mtxFAIL);
  832. }
  833. UpdateHwModeTable (pMgaInfo, FirstMode[Board],
  834. iHwModesFBM_010_B, dacSupportHires);
  835. break;
  836. case MGA_IMP_3M_Z:
  837. if(!(InitHwStruct(Board, HwModesFBM_011_A,
  838. sizeof(HwModesFBM_011_A), 3145728, 2097152)))
  839. {
  840. #ifdef PRINT_DEBUG
  841. closeDebugfFile("MGA_IMP_3M_Z : InitHwStruct Fail");
  842. #endif
  843. return(mtxFAIL);
  844. }
  845. UpdateHwModeTable (pMgaInfo, FirstMode[Board],
  846. iHwModesFBM_011_A, dacSupportHires);
  847. break;
  848. case MGA_PRO_4M5:
  849. if(!(InitHwStruct(Board, HwModesFBM_101_B,
  850. sizeof(HwModesFBM_101_B), 4718592, 0)))
  851. {
  852. #ifdef PRINT_DEBUG
  853. closeDebugfFile("MGA_PRO_4M5 : InitHwStruct Fail");
  854. #endif
  855. return(mtxFAIL);
  856. }
  857. UpdateHwModeTable (pMgaInfo, FirstMode[Board],
  858. iHwModesFBM_101_B, dacSupportHires);
  859. break;
  860. case MGA_PRO_4M5_Z:
  861. if(!(InitHwStruct(Board, HwModesFBM_111_A,
  862. sizeof(HwModesFBM_111_A), 4718592, 4194304)))
  863. {
  864. #ifdef PRINT_DEBUG
  865. closeDebugfFile("MGA_PRO_4M5_Z : InitHwStruct Fail");
  866. #endif
  867. return(mtxFAIL);
  868. }
  869. UpdateHwModeTable (pMgaInfo, FirstMode[Board],
  870. iHwModesFBM_111_A, dacSupportHires);
  871. break;
  872. case MGA_PCI_2M:
  873. if(!(InitHwStruct(Board, ModesAth2,
  874. sizeof(ModesAth2), 2097152, 0)))
  875. return(mtxFAIL);
  876. UpdateHwModeTable (pMgaInfo, FirstMode[Board], iModesAth2,
  877. dacSupportHires);
  878. break;
  879. case MGA_PCI_4M:
  880. if(!(InitHwStruct(Board, ModesAth4,
  881. sizeof(ModesAth4), 4194304, 0)))
  882. return(mtxFAIL);
  883. UpdateHwModeTable (pMgaInfo, FirstMode[Board], iModesAth4,
  884. dacSupportHires);
  885. break;
  886. default:
  887. {
  888. #ifdef PRINT_DEBUG
  889. closeDebugfFile("Produit Inconnue");
  890. #endif
  891. return(mtxFAIL);
  892. }
  893. }
  894. if (Hw[Board].VGAEnable == 1)
  895. mtxSetVideoMode(mtxVGA);
  896. #ifdef WINDOWS_NT
  897. // Do not free this now, since we do not use setmgasel in mtxSelectHw.
  898. // VideoPortFreeDeviceBase(pMgaDeviceExtension, pMgaBaseAddr);
  899. #endif
  900. } /*** for loop Board... ***/
  901. /* Set the OPTION register for ATLAS PCI */
  902. #ifndef WINDOWS_NT
  903. setPciOptionReg();
  904. #endif
  905. /* Indicates end of array */
  906. Hw[Board].MapAddress = (dword)-1;
  907. /* Default initialisation */
  908. Hw[iBoard].pCurrentDisplayMode = Hw[iBoard].pCurrentHwMode;
  909. #if( !defined( _WINDOWS_DLL16) && !defined(OS2) && !defined(INIT_ONLY))
  910. #ifndef WINDOWS_NT
  911. if (! CheckHwAllDone)
  912. {
  913. /* Allocate a static buffer for the command (C-Binding -> CADDI) */
  914. #ifndef __DDK_SRC__
  915. BufBind = mtxAllocBuffer(BUF_BIND_SIZE);
  916. #endif
  917. /* Allocate a static RC and a clip list for each MGA device */
  918. for (i=0; Hw[i].MapAddress != (dword)-1 ; i++)
  919. {
  920. if (! mtxSelectHw(&Hw[i]))
  921. {
  922. #ifdef PRINT_DEBUG
  923. closeDebugfFile("mtxSelectHw(&Hw[]) == 0\n");
  924. #endif
  925. return(mtxFAIL);
  926. }
  927. #ifndef __DDK_SRC__
  928. BindingRC[i] = (dword)NULL;
  929. /***
  930. *** _tDDK_STATE needs to be NULL'ed here if you want the DDK
  931. *** to behave exactly like the SDK
  932. ***/
  933. #endif
  934. if (!mtxSelectHwMode(Hw[iBoard].pCurrentHwMode))
  935. {
  936. #ifdef PRINT_DEBUG
  937. closeDebugfFile("mtxSelectHwMode(Hw[].pCurrentHwMode == 0");
  938. #endif
  939. return(mtxFAIL);
  940. }
  941. #ifndef __DDK_SRC__
  942. BindingRC[i] = (dword)mtxAllocRC(NULL);
  943. BindingCL[i] = (dword)mtxAllocCL(1);
  944. #endif
  945. mtxSetVideoMode(mtxVGA);
  946. }
  947. }
  948. #endif /* #ifndef WINDOWS_NT */
  949. #endif /* #if( !defined( _WINDOWS_DLL16) && !defined(OS2))... */
  950. CheckHwAllDone = TRUE;
  951. #ifdef PRINT_DEBUG
  952. closeDebugfFile("Sortie Ok CheckHwAll");
  953. #endif
  954. return(&Hw[0]);
  955. }
  956. /*------------------------------------------------
  957. * mtxSelectHw
  958. *
  959. * Select the MGA device to be used for subsequent
  960. * drawing operations
  961. *
  962. * Return:
  963. * mtxOK : Hardware select successful
  964. * mtxFAIL : Hardware select failure
  965. *------------------------------------------------*/
  966. bool mtxSelectHw(HwData *pHardware)
  967. {
  968. HwData *pScanHwData;
  969. bool FlagFoundHwData;
  970. /*** VALIDATE pHardware and set iBoard ***/
  971. FlagFoundHwData = FALSE;
  972. iBoard = 0;
  973. for (pScanHwData = &Hw[0]; pScanHwData->MapAddress != (dword)-1;
  974. pScanHwData++, iBoard++)
  975. {
  976. if (pScanHwData == pHardware)
  977. {
  978. FlagFoundHwData = TRUE;
  979. break;
  980. }
  981. }
  982. if (! FlagFoundHwData)
  983. return(mtxFAIL);
  984. #ifdef WINDOWS_NT
  985. pMgaBaseAddr = Hw[iBoard].BaseAddress;
  986. #else
  987. pMgaBaseAddr = setmgasel(MgaSel, Hw[iBoard].MapAddress, 4);
  988. #endif
  989. #ifdef OS2
  990. HWIsSelected(ProductMGA[iBoard], Hw[iBoard].ProductType,
  991. Hw[iBoard].ProductRev, Hw[iBoard].MapAddress, Hw[iBoard].DacType);
  992. #endif
  993. #if( !defined(WINDOWS) && !defined(OS2) && !defined(WINDOWS_NT) && !defined(INIT_ONLY))
  994. #ifndef __DDK_SRC__
  995. CaddiReInit(InitBuf[iBoard], VideoBuf[iBoard]);
  996. #else
  997. ReInitDDK(InitBuf[iBoard], VideoBuf[iBoard]);
  998. #endif
  999. #endif
  1000. return(mtxOK);
  1001. }
  1002. /*------------------------------------------------------
  1003. * mtxGetHwModes
  1004. *
  1005. * This function returns a pointer to a list of hardware
  1006. * modes available for the current MGA device
  1007. * as selected by mtxSelectHw()
  1008. *
  1009. * Return:
  1010. * HwModes = 0 : MGA device not found
  1011. * HwModes != 0 : Pointer to HwModes array
  1012. *------------------------------------------------------*/
  1013. HwModeData *mtxGetHwModes(void)
  1014. {
  1015. if (NbBoard == 0)
  1016. return(0);
  1017. return(FirstMode[iBoard]);
  1018. }
  1019. /*------------------------------------------------------
  1020. * mtxGetRefreshRates
  1021. *
  1022. * This function returns a word that contains a bit field
  1023. * of possible frequency for a specific resolution and
  1024. * pixel depth.
  1025. *
  1026. * Return:
  1027. *------------------------------------------------------*/
  1028. word mtxGetRefreshRates(HwModeData *pHwModeSelect)
  1029. {
  1030. word FreqRes,i;
  1031. for (FreqRes = 0,i = 0; ResParam[i].DispWidth != (word) -1; i++)
  1032. {
  1033. if ((ResParam[i].DispWidth == pHwModeSelect->DispWidth) && (ResParam[i].PixDepth == pHwModeSelect->PixWidth))
  1034. {
  1035. switch (ResParam[i].RefreshRate)
  1036. {
  1037. // bit 0: 43 Hz interlaced
  1038. // bit 1: 56 Hz
  1039. // bit 2: 60 Hz
  1040. // bit 3: 66 Hz
  1041. // bit 4: 70 Hz
  1042. // bit 5: 72 Hz
  1043. // bit 6: 75 Hz
  1044. // bit 7: 76 Hz
  1045. // bit 8: 80 Hz
  1046. // bit 9: 85 Hz
  1047. // bit 10: 90 Hz
  1048. // bit 11: 100 Hz
  1049. // bit 12: 120 Hz
  1050. case 43:
  1051. FreqRes |= 0x0001;
  1052. break;
  1053. case 56:
  1054. FreqRes |= 0x0002;
  1055. break;
  1056. case 60:
  1057. FreqRes |= 0x0004;
  1058. break;
  1059. case 66:
  1060. FreqRes |= 0x0008;
  1061. break;
  1062. case 70:
  1063. FreqRes |= 0x0010;
  1064. break;
  1065. case 72:
  1066. FreqRes |= 0x0020;
  1067. break;
  1068. case 75:
  1069. FreqRes |= 0x0040;
  1070. break;
  1071. case 76:
  1072. FreqRes |= 0x0080;
  1073. break;
  1074. case 80:
  1075. FreqRes |= 0x0100;
  1076. break;
  1077. case 85:
  1078. FreqRes |= 0x0200;
  1079. break;
  1080. case 90:
  1081. FreqRes |= 0x0400;
  1082. break;
  1083. case 100:
  1084. FreqRes |= 0x0800;
  1085. break;
  1086. case 120:
  1087. FreqRes |= 0x1000;
  1088. break;
  1089. }
  1090. }
  1091. }
  1092. return(FreqRes);
  1093. }
  1094. /*----------------------------------------------------------
  1095. * mtxSelectHwMode
  1096. *
  1097. * Select from the list of available hardware modes returned
  1098. * by mtxGetHwModes()
  1099. *
  1100. * Return:
  1101. * mtxOK : HwMode select successfull
  1102. * mtxFAIL : HwMode select failure
  1103. *
  1104. *----------------------------------------------------------*/
  1105. bool mtxSelectHwMode(HwModeData *pHwModeSelect)
  1106. {
  1107. bool FlagFindMode;
  1108. byte TmpByte;
  1109. HwModeData *pScanHwMode;
  1110. general_info *generalInfo;
  1111. dword DST0, DST1, Info;
  1112. generalInfo = (general_info *)selectMgaInfoBoard();
  1113. FlagFindMode = FALSE;
  1114. for ( pScanHwMode = FirstMode[iBoard]; pScanHwMode->DispWidth != (word)-1;
  1115. pScanHwMode++)
  1116. {
  1117. if (pScanHwMode == pHwModeSelect)
  1118. {
  1119. FlagFindMode = TRUE;
  1120. break;
  1121. }
  1122. }
  1123. if (NbBoard == 0 || FlagFindMode == FALSE)
  1124. return(mtxFAIL);
  1125. Hw[iBoard].pCurrentHwMode = NULL;
  1126. Hw[iBoard].pCurrentDisplayMode = NULL;
  1127. mtxSetVideoMode(mtxADV_MODE);
  1128. Hw[iBoard].pCurrentHwMode = pHwModeSelect;
  1129. if(pHwModeSelect->DispType & 0x04) /* LUT mode */
  1130. {
  1131. *((byte*) (InitBuf[iBoard] + INITBUF_LUTMode)) = TRUE;
  1132. }
  1133. else
  1134. {
  1135. *((byte*) (InitBuf[iBoard] + INITBUF_LUTMode)) = FALSE;
  1136. }
  1137. /* Initialize a init buffer for CADDI */
  1138. if (pHwModeSelect->PixWidth == 24) /* PACK PIXEL */
  1139. *((byte*) (InitBuf[iBoard] + INITBUF_PWidth)) = 0x12;
  1140. else
  1141. *((byte*) (InitBuf[iBoard] + INITBUF_PWidth)) =
  1142. pHwModeSelect->PixWidth >> 4;
  1143. *((word*) (InitBuf[iBoard] + INITBUF_ScreenWidth)) =
  1144. pHwModeSelect->FbPitch;
  1145. *((word*) (InitBuf[iBoard] + INITBUF_ScreenHeight)) =
  1146. pHwModeSelect->DispHeight;
  1147. #ifdef WINDOWS_NT
  1148. *((UINT_PTR*)(InitBuf[iBoard] + INITBUF_MgaOffset)) = (UINT_PTR)pMgaBaseAddr;
  1149. #else
  1150. #ifdef __WATCOMC__
  1151. #ifdef __WATCOM_PHAR__ /* Watcom & Phar Lap */
  1152. *((dword*)(InitBuf[iBoard] + INITBUF_MgaOffset)) = 0;
  1153. #else /* Watcom & Rational */
  1154. *((dword*)(InitBuf[iBoard] + INITBUF_MgaOffset)) = (dword)pMgaBaseAddr;;
  1155. #endif
  1156. #elif __MICROSOFTC600__
  1157. *((dword*)(InitBuf[iBoard] + INITBUF_MgaOffset)) = (dword)pMgaBaseAddr;;
  1158. #else /* High C & Phar Lap */
  1159. *((dword*)(InitBuf[iBoard] + INITBUF_MgaOffset)) = 0;
  1160. #endif
  1161. *((word*) (InitBuf[iBoard] + INITBUF_MgaSegment)) = MgaSel >> 16;
  1162. #endif /* #ifdef WINDOWS_NT */
  1163. /* Default setting */
  1164. *((byte*) (InitBuf[iBoard] + INITBUF_ZBufferFlag)) = FALSE;
  1165. *((byte*) (InitBuf[iBoard] + INITBUF_ZinDRAMFlag)) = FALSE;
  1166. *((dword*)(InitBuf[iBoard] + INITBUF_ZBufferHwAddr)) = 0;
  1167. switch(generalInfo->BitOperation8_16)
  1168. {
  1169. case BIT8:
  1170. *((byte*)(InitBuf[iBoard] + INITBUF_16)) = 2;
  1171. break;
  1172. case BIT16:
  1173. *((byte*)(InitBuf[iBoard] + INITBUF_16)) = 1;
  1174. break;
  1175. case BITNARROW16:
  1176. *((byte*)(InitBuf[iBoard] + INITBUF_16)) = 3;
  1177. break;
  1178. default:
  1179. *((byte*)(InitBuf[iBoard] + INITBUF_16)) = 0;
  1180. break;
  1181. }
  1182. /* If on top of VGA, we must program in 16bit narrow absolutely */
  1183. if ((Hw[iBoard].ProductType & BOARD_MGA_VL_M) == BOARD_MGA_VL)
  1184. {
  1185. *((byte*)(InitBuf[iBoard] + INITBUF_16)) = 2; /* 8-bit mode */
  1186. }
  1187. else
  1188. {
  1189. if (Hw[iBoard].MapAddress == MGA_ISA_BASE_1)
  1190. *((byte*)(InitBuf[iBoard] + INITBUF_16)) = 1;
  1191. }
  1192. /* Transfer DMA informations from mga.inf */
  1193. *((byte*) (InitBuf[iBoard] + INITBUF_DMAEnable)) = (byte)generalInfo->DmaEnable;
  1194. *((byte*) (InitBuf[iBoard] + INITBUF_DMAChannel)) = (byte)generalInfo->DmaChannel;
  1195. *((byte*) (InitBuf[iBoard] + INITBUF_DMAType)) = (byte)generalInfo->DmaType;
  1196. *((byte*) (InitBuf[iBoard] + INITBUF_DMAXferWidth)) = (byte)generalInfo->DmaXferWidth;
  1197. /* Special case for MGA_IMP_3M_Z at 1024x768x32: we act like an MGA_IMP_3M */
  1198. if (ProductMGA[iBoard] == MGA_IMP_3M_Z &&
  1199. pHwModeSelect->DispWidth == 1024 &&
  1200. pHwModeSelect->PixWidth == 32)
  1201. {
  1202. ProductMGA[iBoard] = MGA_IMP_3M;
  1203. SpecialModeOn = TRUE;
  1204. }
  1205. /* Reset to the real value of FBM when the flag is on and this is not the
  1206. special mode */
  1207. if (SpecialModeOn == TRUE && (pHwModeSelect->DispWidth != 1024 ||
  1208. pHwModeSelect->PixWidth != 32))
  1209. {
  1210. ProductMGA[iBoard] = MGA_IMP_3M_Z;
  1211. SpecialModeOn = FALSE;
  1212. }
  1213. switch (ProductMGA[iBoard])
  1214. {
  1215. case MGA_ULT_1M:
  1216. *((byte*) (InitBuf[iBoard] + INITBUF_FBM)) = 0;
  1217. break;
  1218. case MGA_ULT_2M:
  1219. case MGA_IMP_3M:
  1220. case MGA_PCI_4M:
  1221. *((byte*) (InitBuf[iBoard] + INITBUF_FBM)) = 2;
  1222. break;
  1223. case MGA_IMP_3M_Z:
  1224. *((byte*) (InitBuf[iBoard] + INITBUF_FBM)) = 3;
  1225. break;
  1226. case MGA_PRO_4M5:
  1227. *((byte*) (InitBuf[iBoard] + INITBUF_FBM)) = 5;
  1228. break;
  1229. case MGA_PRO_4M5_Z:
  1230. *((byte*) (InitBuf[iBoard] + INITBUF_FBM)) = 7;
  1231. break;
  1232. case MGA_PCI_2M:
  1233. if (pHwModeSelect->ZBuffer)
  1234. *((byte*) (InitBuf[iBoard] + INITBUF_FBM)) = 10;
  1235. else
  1236. *((byte*) (InitBuf[iBoard] + INITBUF_FBM)) = 2;
  1237. break;
  1238. default:
  1239. return(mtxFAIL);
  1240. }
  1241. if (pHwModeSelect->ZBuffer)
  1242. {
  1243. switch (ProductMGA[iBoard])
  1244. {
  1245. case MGA_IMP_3M: /* We can do Z-buffer in VRAM */
  1246. *((byte*) (InitBuf[iBoard] + INITBUF_ZBufferFlag)) = TRUE;
  1247. *((byte*) (InitBuf[iBoard] + INITBUF_ZinDRAMFlag)) = FALSE;
  1248. *((dword*)(InitBuf[iBoard] + INITBUF_ZBufferHwAddr)) =
  1249. 0x200000;
  1250. break;
  1251. case MGA_IMP_3M_Z:
  1252. *((byte*) (InitBuf[iBoard] + INITBUF_ZBufferFlag)) = TRUE;
  1253. *((byte*) (InitBuf[iBoard] + INITBUF_ZinDRAMFlag)) = TRUE;
  1254. *((dword*)(InitBuf[iBoard] + INITBUF_ZBufferHwAddr)) =
  1255. 0x400000;
  1256. break;
  1257. case MGA_PRO_4M5_Z:
  1258. *((byte*) (InitBuf[iBoard] + INITBUF_ZBufferFlag)) = TRUE;
  1259. *((byte*) (InitBuf[iBoard] + INITBUF_ZinDRAMFlag)) = TRUE;
  1260. *((dword*)(InitBuf[iBoard] + INITBUF_ZBufferHwAddr)) =
  1261. 0x600000;
  1262. break;
  1263. case MGA_PCI_4M:
  1264. *((byte*) (InitBuf[iBoard] + INITBUF_ZBufferFlag)) = TRUE;
  1265. *((byte*) (InitBuf[iBoard] + INITBUF_ZinDRAMFlag)) = FALSE;
  1266. *((dword*)(InitBuf[iBoard] + INITBUF_ZBufferHwAddr)) =
  1267. 0x200000;
  1268. break;
  1269. case MGA_PCI_2M:
  1270. *((byte*) (InitBuf[iBoard] + INITBUF_ZBufferFlag)) = TRUE;
  1271. *((byte*) (InitBuf[iBoard] + INITBUF_ZinDRAMFlag)) = FALSE;
  1272. *((dword*)(InitBuf[iBoard] + INITBUF_ZBufferHwAddr)) =
  1273. 0x100000;
  1274. break;
  1275. }
  1276. }
  1277. /* This blank is used before setting TITAN_FBM bit */
  1278. /* (done in GetMGAConfiguration and MGASysInit) */
  1279. /* Blank the screen */
  1280. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_ADDR), 0x01);
  1281. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), TmpByte);
  1282. TmpByte |= 0x20; /* screen off */
  1283. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), TmpByte);
  1284. GetMGAConfiguration(pMgaBaseAddr, &DST0, &DST1, &Info);
  1285. *((dword*) (InitBuf[iBoard] + INITBUF_DST0)) = DST0;
  1286. *((dword*) (InitBuf[iBoard] + INITBUF_DST1)) = DST1;
  1287. *((dword*) (InitBuf[iBoard] + INITBUF_DACType)) = Info;
  1288. /** Default setting **/
  1289. *((byte*) (InitBuf[iBoard] + INITBUF_DB_SideSide)) = FALSE;
  1290. *((byte*) (InitBuf[iBoard] + INITBUF_DB_FrontBack)) = FALSE;
  1291. /*** CALCULATION OF YDSTORG FOR MGA_PCI_4M ***/
  1292. if (ProductMGA[iBoard] == MGA_PCI_4M)
  1293. {
  1294. {
  1295. dword NbBytes, PixelTransit, lines, offset;
  1296. dword Width, Height, PixelWidth, FbPitch;
  1297. if (pHwModeSelect->PixWidth == 24) /* PACK PIXEL */
  1298. {
  1299. Width = (dword)((pHwModeSelect->DispWidth * 3) >> 2);
  1300. FbPitch = (dword)(pHwModeSelect->FbPitch * 3) >> 2;
  1301. PixelWidth = 4;
  1302. }
  1303. else
  1304. {
  1305. Width = (dword)pHwModeSelect->DispWidth;
  1306. PixelWidth = (dword)((pHwModeSelect->PixWidth)/8);
  1307. FbPitch = (dword)pHwModeSelect->FbPitch;
  1308. }
  1309. Height = (dword)pHwModeSelect->DispHeight;
  1310. NbBytes = Width * Height * PixelWidth;
  1311. if (NbBytes > (dword)2097152)
  1312. {
  1313. PixelTransit = (dword)2097152 / PixelWidth;
  1314. lines = (dword)(PixelTransit / FbPitch);
  1315. offset = (PixelTransit - (FbPitch * lines)) * PixelWidth;
  1316. if (pHwModeSelect->PixWidth == 24) /* PACK PIXEL */
  1317. *((dword*) (InitBuf[iBoard] + INITBUF_YDSTORG)) = offset;
  1318. else
  1319. *((dword*) (InitBuf[iBoard] + INITBUF_YDSTORG)) =
  1320. offset / PixelWidth;
  1321. }
  1322. else
  1323. {
  1324. *((dword*) (InitBuf[iBoard] + INITBUF_YDSTORG)) = 0;
  1325. }
  1326. }
  1327. }
  1328. else
  1329. {
  1330. *((dword*) (InitBuf[iBoard] + INITBUF_YDSTORG)) = 0;
  1331. }
  1332. /*--------------------------------------------------------------*/
  1333. /** If Double Buffering mode (software) **/
  1334. if((pHwModeSelect->DispType & 0x10) && /* DB mode */
  1335. !(pHwModeSelect->DispType & 0x04) ) /* not LUT mode */
  1336. {
  1337. /* Check for exception case: DB mode 16 bit with Z for PCI/2M */
  1338. if( (ProductMGA[iBoard]==MGA_PCI_2M) &&
  1339. pHwModeSelect->ZBuffer &&
  1340. pHwModeSelect->PixWidth == 8 &&
  1341. Hw[iBoard].DacType == TVP3026)
  1342. {
  1343. *((dword*) (InitBuf[iBoard] + INITBUF_DB_YDSTORG)) =
  1344. *((dword*) (InitBuf[iBoard] + INITBUF_YDSTORG));
  1345. *((byte*) (InitBuf[iBoard] + INITBUF_DB_FrontBack)) = TRUE;
  1346. /** Caddi has to work in 16-bit **/
  1347. *((byte*) (InitBuf[iBoard] + INITBUF_PWidth)) = 16 >> 4;
  1348. }
  1349. else
  1350. {
  1351. if(ProductMGA[iBoard]==MGA_PCI_2M)
  1352. {
  1353. *((dword*) (InitBuf[iBoard] + INITBUF_DB_YDSTORG)) =
  1354. (dword)((dword)pHwModeSelect->DispWidth *
  1355. (dword)pHwModeSelect->DispHeight);
  1356. }
  1357. else
  1358. {
  1359. if (pHwModeSelect->ZBuffer && pHwModeSelect->PixWidth==8)
  1360. {
  1361. /*** Must start on a boundary of 1M (for Z buffer alignment) ***/
  1362. *((dword*) (InitBuf[iBoard] + INITBUF_DB_YDSTORG)) =
  1363. 0x100000 / (pHwModeSelect->PixWidth / 8);
  1364. }
  1365. else
  1366. {
  1367. *((dword*) (InitBuf[iBoard] + INITBUF_DB_YDSTORG)) =
  1368. (dword)((dword)pHwModeSelect->DispWidth *
  1369. (dword)pHwModeSelect->DispHeight);
  1370. }
  1371. }
  1372. *((byte*) (InitBuf[iBoard] + INITBUF_DB_SideSide)) = TRUE;
  1373. }
  1374. }
  1375. else
  1376. {
  1377. *((dword*) (InitBuf[iBoard] + INITBUF_DB_YDSTORG)) =
  1378. *((dword*) (InitBuf[iBoard] + INITBUF_YDSTORG));
  1379. }
  1380. /*--------------------------------------------------------------*/
  1381. /* To communicate the information to WINDOWS */
  1382. Hw[iBoard].YDstOrg = *((dword*) (InitBuf[iBoard] + INITBUF_YDSTORG));
  1383. /*** Program YDSTORG ***/
  1384. mgaWriteDWORD(*(pMgaBaseAddr + TITAN_OFFSET + TITAN_YDSTORG), Hw[iBoard].YDstOrg );
  1385. switch((Hw[iBoard].ProductRev >> 4) & 0x0000000f)
  1386. {
  1387. case TITAN_CHIP:
  1388. *((byte*) (InitBuf[iBoard] + INITBUF_ChipSet)) = TITAN_CHIP;
  1389. *((byte*) (InitBuf[iBoard] + INITBUF_DubicPresent)) = 1;
  1390. break;
  1391. case ATLAS_CHIP:
  1392. *((byte*) (InitBuf[iBoard] + INITBUF_ChipSet)) = ATLAS_CHIP;
  1393. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), TmpByte);
  1394. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), TmpByte | TITAN_NODUBIC_M);
  1395. *((byte*) (InitBuf[iBoard] + INITBUF_DubicPresent)) = 0;
  1396. break;
  1397. case ATHENA_CHIP:
  1398. default:
  1399. *((byte*) (InitBuf[iBoard] + INITBUF_ChipSet)) = ATHENA_CHIP;
  1400. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), TmpByte);
  1401. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), TmpByte | TITAN_NODUBIC_M);
  1402. *((byte*) (InitBuf[iBoard] + INITBUF_DubicPresent)) = 0;
  1403. break;
  1404. }
  1405. MGASysInit(InitBuf[iBoard]);
  1406. /* Unblank the screen */
  1407. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_ADDR), 0x01);
  1408. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), TmpByte);
  1409. TmpByte &= 0xdf; /* screen on */
  1410. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), TmpByte);
  1411. #if( !defined(_WINDOWS_DLL16) && !defined(OS2) && !defined(INIT_ONLY))
  1412. #ifndef WINDOWS_NT
  1413. #ifndef __DDK_SRC__
  1414. sp = (SYSPARMS *)CaddiInit(InitBuf[iBoard], VideoBuf[iBoard]);
  1415. if(BindingRC[iBoard] != (dword)NULL)
  1416. {
  1417. dword _Far *pBufBind;
  1418. pBufBind = BufBind;
  1419. *pBufBind++ = INITRC;
  1420. *pBufBind++ = (dword)BindingRC[iBoard];
  1421. *pBufBind++ = SETENDPOINT + (0x1 << 16);
  1422. *pBufBind++ = (dword)BindingRC[iBoard];
  1423. *pBufBind++ = DONE;
  1424. if (!mtxPostBuffer (BufBind, DONT_CARE, DONT_CARE))
  1425. return(mtxFAIL);
  1426. }
  1427. #else
  1428. sp = (SYSPARMS *)InitDDK(InitBuf[iBoard], VideoBuf[iBoard]);
  1429. /***
  1430. *** _tDDK_STATE needs to be re-initialized here if you want the DDK
  1431. *** to behave exactly like the SDK
  1432. ***/
  1433. #endif /* __DDK_SRC__ */
  1434. #endif /* #ifndef WINDOWS_NT */
  1435. #endif /* #if( !defined(_WINDOWS_DLL16) && !defined(OS2))... */
  1436. return(mtxOK);
  1437. }
  1438. /*----------------------------------------------------------
  1439. * blkModeSupported
  1440. *
  1441. * Check if board support 8-bit block mode.
  1442. * Condition: i) chip set ATHENA
  1443. * ii) IMP+ PCB rev 2 or more
  1444. * iii)
  1445. *
  1446. * Return:
  1447. * mtxOK : 8-bit block mode supported
  1448. * mtxFAIL : 8-bit block mode not supported
  1449. *
  1450. *----------------------------------------------------------*/
  1451. bool blkModeSupported()
  1452. {
  1453. dword TramDword;
  1454. /* Test if ATHENA chip */
  1455. if( ((Hw[iBoard].ProductRev >> 4) & 0x0000000f) < ATHENA_CHIP)
  1456. return mtxFAIL;
  1457. /* Special case */
  1458. if( ((Hw[iBoard].ProductType & 0x0f) == BOARD_MGA_RESERVED) &&
  1459. (Hw[iBoard].DacType != TVP3026 )
  1460. ) return mtxFAIL;
  1461. /* Test IMP+ with PCB rev < 2, we read TramDword to find IMP+ /p4 */
  1462. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_OPMODE),TramDword);
  1463. TramDword &= TITAN_TRAM_M;
  1464. /* PCB rev < 2 and not a /p4 */
  1465. if( (((Hw[iBoard].ProductRev & 0xf) < 2) && !TramDword))
  1466. return mtxFAIL;
  1467. return mtxOK;
  1468. }
  1469. /*----------------------------------------------------------
  1470. * mtxSetDisplayMode
  1471. *
  1472. * Select the display mode
  1473. *
  1474. * Return:
  1475. * ptr != 0 : Start address of the vidset buffer
  1476. * ptr = 0 : SetDisplayMode select failure
  1477. *
  1478. *----------------------------------------------------------*/
  1479. bool mtxSetDisplayMode(HwModeData *pDisplayModeSelect, dword Zoom)
  1480. {
  1481. byte TmpByte, vsyncPresent;
  1482. dword TmpDword;
  1483. dword Dst0, Dst1, i;
  1484. dword InfoHardware;
  1485. /*-----------------------------------------------------------*/
  1486. #ifdef PRINT_DEBUG
  1487. {
  1488. reOpenDebugfFile();
  1489. debug_printf("****** SetDisplayMode\n");
  1490. }
  1491. #endif
  1492. if (Hw[iBoard].pCurrentHwMode == NULL)
  1493. {
  1494. #ifdef PRINT_DEBUG
  1495. closeDebugfFile("Hw[iBoard].pCurrentHwMode == NULL Fail\n");
  1496. #endif
  1497. return(mtxFAIL);
  1498. }
  1499. /* Validate Display mode to see if it is <= Hard Mode */
  1500. if (pDisplayModeSelect->DispWidth > Hw[iBoard].pCurrentHwMode->DispWidth)
  1501. {
  1502. #ifdef PRINT_DEBUG
  1503. closeDebugfFile("pDisplayModeSelect->DispWidth > Hw[iBoard].pCurrentHwMode->DispWidth Fail\n");
  1504. #endif
  1505. return(mtxFAIL);
  1506. }
  1507. /* Validate pDisplayModeSelect to see if it is displayable */
  1508. if (pDisplayModeSelect->DispType & DISP_NOT_SUPPORT)
  1509. {
  1510. #ifdef PRINT_DEBUG
  1511. closeDebugfFile("DISPLAY_NOT_SUPPORT Fail\n");
  1512. #endif
  1513. return(mtxFAIL);
  1514. }
  1515. if(pDisplayModeSelect->DispType & 0x08) /* 565 mode */
  1516. *((byte*) (InitBuf[iBoard] + INITBUF_565Mode)) = TRUE;
  1517. else
  1518. *((byte*) (InitBuf[iBoard] + INITBUF_565Mode)) = FALSE;
  1519. Hw[iBoard].pCurrentDisplayMode = NULL;
  1520. mtxSetVideoMode(mtxADV_MODE);
  1521. /* begin programmation of display in vsynch */
  1522. /* Test blank screen */
  1523. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_ADDR), 0x01);
  1524. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), vsyncPresent);
  1525. vsyncPresent = !(vsyncPresent & 0x20);
  1526. /* Test if valide horizontal parameters in CRTC */
  1527. if (vsyncPresent)
  1528. {
  1529. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_1_CRTC_ADDR), 0x00);
  1530. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_1_CRTC_DATA), TmpByte);
  1531. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_1_CRTC_ADDR), 0x01);
  1532. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_1_CRTC_DATA), vsyncPresent);
  1533. /* Compare Hdisplay Htotal */
  1534. vsyncPresent = vsyncPresent < TmpByte;
  1535. }
  1536. if (vsyncPresent)
  1537. {
  1538. for (i = 0; i < 1000000L; i++)
  1539. {
  1540. mgaReadDWORD(*(pMgaBaseAddr + TITAN_OFFSET + TITAN_STATUS), TmpDword);
  1541. if ( !(TmpDword & TITAN_VSYNCSTS_M) ) break;
  1542. }
  1543. for (i = 0; i < 1000000L; i++)
  1544. {
  1545. mgaReadDWORD(*(pMgaBaseAddr + TITAN_OFFSET + TITAN_STATUS), TmpDword);
  1546. if ( (TmpDword & TITAN_VSYNCSTS_M) ) break;
  1547. }
  1548. }
  1549. /*------ Strap added in ATHENA For max clock dac support ----*/
  1550. GetMGAConfiguration(pMgaBaseAddr, &Dst0, &Dst1, &InfoHardware);
  1551. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), InfoHardware);
  1552. if(!((Dst1 & TITAN_DST1_200MHZ_M) >> TITAN_DST1_200MHZ_A))
  1553. InfoHardware = InfoHardware & 0xfffffffb; /* bit 2=0: Board supports regular (135MHz/170MHz) operation */
  1554. else
  1555. InfoHardware = InfoHardware | 0x00000004; /* bit 2=1: Board supports 200MHz operation */
  1556. mgaWriteDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_CONFIG), InfoHardware);
  1557. /*------ Strap added for ATHENA ------------------------------*/
  1558. if ( blkModeSupported() )
  1559. {
  1560. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_OPMODE), InfoHardware);
  1561. if(Dst0 & TITAN_DST0_BLKMODE_M)
  1562. InfoHardware = InfoHardware & 0xf7ffffff; /* bit 27=0: VRAM 4 bit block mode */
  1563. else
  1564. InfoHardware = InfoHardware | 0x08000000; /* bit 27=1: VRAM 8 bit block mode */
  1565. mgaWriteDWORD(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_OPMODE), InfoHardware);
  1566. }
  1567. /* Blank the screen */
  1568. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_ADDR), 0x01);
  1569. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), TmpByte);
  1570. TmpByte |= 0x20; /* screen off */
  1571. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), TmpByte);
  1572. Hw[iBoard].pCurrentDisplayMode = pDisplayModeSelect;
  1573. Hw[iBoard].CurrentZoomFactor = (Zoom & 0x000f000f);
  1574. /*** Load video parameters, load values in vidtab[] ***/
  1575. loadVidPar(Zoom, Hw[iBoard].pCurrentHwMode, Hw[iBoard].pCurrentDisplayMode);
  1576. /*** Calculate register values of the CRTC and put in crtcTab[] ***/
  1577. calculCrtcParam();
  1578. MoveToVideoBuffer((byte *)vidtab, (byte *)crtcTab, (byte *)VideoBuf[iBoard]);
  1579. #ifdef PRINT_DEBUG
  1580. imprimeBuffer(InitBuf[iBoard], VideoBuf[iBoard]);
  1581. #endif
  1582. #if 0
  1583. /*VIDEOPRO Init if TV MODE*/
  1584. if (pDisplayModeSelect->DispType & 0x02)
  1585. {
  1586. switch(pDisplayModeSelect->DispWidth)
  1587. {
  1588. default:
  1589. case 640:
  1590. if (VAFCconnector)
  1591. initVideoMode(NTSC_STD | VAFC,
  1592. (byte)pDisplayModeSelect->PixWidth);
  1593. else
  1594. initVideoMode(NTSC_STD,
  1595. (byte)pDisplayModeSelect->PixWidth);
  1596. break;
  1597. case 768:
  1598. if (VAFCconnector)
  1599. initVideoMode(PAL_STD | VAFC,
  1600. (byte)pDisplayModeSelect->PixWidth);
  1601. else
  1602. initVideoMode(PAL_STD,
  1603. (byte)pDisplayModeSelect->PixWidth);
  1604. break;
  1605. }
  1606. }
  1607. #endif
  1608. MGAVidInit(InitBuf[iBoard], VideoBuf[iBoard]);
  1609. #if 0
  1610. /*VIDEOPRO Make on if TV mode off sinon */
  1611. if (pDisplayModeSelect->DispType & 0x02)
  1612. {
  1613. if (VAFCconnector)
  1614. initVideoPro(1, PX2085);
  1615. else
  1616. initVideoPro(1, Hw[iBoard].DacType);
  1617. }
  1618. else
  1619. {
  1620. initVideoPro(0, Hw[iBoard].DacType);
  1621. }
  1622. #endif
  1623. #ifdef SCRAP
  1624. /*** BEN TEST SPECIAL POUR VIDEOPRO ***/
  1625. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_MISC_OUT_R), TmpByte);
  1626. TmpByte = TmpByte & 0xfb; /* force bit 2 a 0 (clock) */
  1627. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_MISC_OUT_W), TmpByte);
  1628. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_CRT_CTRL),TmpByte);
  1629. TmpByte |= 0xc0; /* Set vertical and horizontal reset */
  1630. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_CRT_CTRL),TmpByte);
  1631. if(pDisplayModeSelect->DispType & 0x02 ) /* mode TV */
  1632. initVideoPro(1);
  1633. else
  1634. initVideoPro(0);
  1635. #endif
  1636. /*** BEN pour Pedro ***/
  1637. /* Flag to avoid multiple initialisation of lvid[0:2] and lvidfield */
  1638. *((byte*)(VideoBuf[iBoard] + VIDEOBUF_LvidInitFlag)) |= 0x80;
  1639. #if( !defined(_WINDOWS_DLL16) && !defined(OS2) && !defined(INIT_ONLY))
  1640. #ifndef WINDOWS_NT
  1641. /*** BEN Permet de determiner DBWindowXOffset et DBWindowYOffset ***/
  1642. #ifndef __DDK_SRC__
  1643. sp = (SYSPARMS *)CaddiInit(InitBuf[iBoard], VideoBuf[iBoard]);
  1644. #else
  1645. sp = (SYSPARMS *)InitDDK(InitBuf[iBoard], VideoBuf[iBoard]);
  1646. #endif
  1647. #endif
  1648. #endif
  1649. #ifdef _WINDOWS_DLL16
  1650. if(NbSxciLoaded)
  1651. {
  1652. fp1 = (FARPROC2)GetProcAddress(hsxci, "Win386LibEntry");
  1653. (*fp1)((byte _Far *)InitBuf[iBoard], (byte _Far *)VideoBuf[iBoard],
  1654. Hw[iBoard].pCurrentHwMode->FbPitch, ID_CallCaddiInit);
  1655. }
  1656. #endif
  1657. /* Unblank the screen */
  1658. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_ADDR), 0x01);
  1659. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), TmpByte);
  1660. TmpByte &= 0xdf; /* screen on */
  1661. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET + TITAN_SEQ_DATA), TmpByte);
  1662. /* Wait for start of vertical sync */
  1663. mgaPollDWORD(*(pMgaBaseAddr + TITAN_OFFSET + TITAN_STATUS),
  1664. TITAN_VSYNCSTS_SET, TITAN_VSYNCSTS_M);
  1665. /* Need 16 ms for be sure we are one retrace make */
  1666. /* ------------------------------ Remplace par un delai de 16 ms */
  1667. /* delay_us(16000); */
  1668. /*** Calculation of CurrentOverScanX and CurrentOverScanY in structure HwData ***/
  1669. if ( ((Hw[iBoard].ProductRev >> 4) & 0x0000000f) > 0 ) /* NOT TITAN */
  1670. {
  1671. Hw[iBoard].CurrentOverScanX = 0;
  1672. Hw[iBoard].CurrentOverScanY = 0;
  1673. }
  1674. else
  1675. {
  1676. overScan();
  1677. }
  1678. #if( !defined(WINDOWS) && !defined(OS2) && !defined(WINDOWS_NT) && !defined(INIT_ONLY))
  1679. mtxScClip(0, 0, pDisplayModeSelect->DispWidth, pDisplayModeSelect->DispHeight);
  1680. #endif
  1681. #ifdef _WINDOWS_DLL16
  1682. if(NbSxciLoaded)
  1683. {
  1684. *(pDllMem+PAN_DISP_WIDTH) = Hw[iBoard].pCurrentDisplayMode->DispWidth-1;
  1685. *(pDllMem+PAN_DISP_HEIGHT) = Hw[iBoard].pCurrentDisplayMode->DispHeight-1;
  1686. switch((Zoom & 0x000f000f))
  1687. {
  1688. case(0x00010001):
  1689. *(pDllMem+DB_SCALE) = (word)1;
  1690. break;
  1691. case(0x00020002):
  1692. *(pDllMem+DB_SCALE) = (word)2;
  1693. break;
  1694. case(0x00040004):
  1695. *(pDllMem+DB_SCALE) = (word)4;
  1696. break;
  1697. default:
  1698. *(pDllMem+DB_SCALE) = (word)1;
  1699. }
  1700. AdjustDBWindow();
  1701. }
  1702. #endif /* #ifdef _WINDOWS_DLL16 */
  1703. #ifdef PRINT_DEBUG
  1704. closeDebugfFile("Fin Set Display Mode\n");
  1705. #endif
  1706. return(mtxOK);
  1707. }
  1708. /*----------------------- Ajustement overscan ------------------------------
  1709. hblank_e n'a que 6 bits de resolution. On le construit comme suit
  1710. 5 bits Lsb dans reg 3 <4:0> et 6ieme bit dans reg 5 <7>
  1711. horizontal blank end = (reg 3 & 0x1f) | ((reg 5 >> 2) & 0x20)
  1712. On complete les bits manquant de BlankEnd en utilisant les bits
  1713. <7:6> de BLANK START.
  1714. SI les 6 bits LSBs de BLANK START sont superieur a ceux du BLANK END
  1715. alors ceci veu dire les deux les plus significatif de BLANK END sont egale
  1716. a ceux du BLANK START + 1, sinon il sont egaux.
  1717. Une fois qu'on a le BLANK END complet on peut le comparer au horizontal Total
  1718. pour connaitre l'overscan a gauche.
  1719. 0.......Blank End....Htotal - 1.
  1720. Note: On compare a Htotal -1. si il y 10 caractere alors on va de 0...9
  1721. Idem pour l'overscan vertical ou il manque les 2 bits MSBs <9:8>.
  1722. Note: Il y a un cas special ou le HBLANKE est a zero, dans ce cas
  1723. l'overscan doit-etre a zero.
  1724. ----------------------------------------------------------------------------*/
  1725. static void overScan(void)
  1726. {
  1727. word total, blank_s, blank_e, mask;
  1728. /* Overlay to left of screen */
  1729. /* Htotal = reg(0) + 5 donc Htotal - 1 = reg(0) + 4 */
  1730. total = (word)(crtcTab[0] + 4);
  1731. blank_s = (word)crtcTab[2];
  1732. blank_e = (word)((crtcTab[3] & 0x1f) | ( (crtcTab[5] >> 2) & 0x20 ));
  1733. if (blank_e != 0) /* We verify for the special case where blank_e == 0 */
  1734. {
  1735. mask = blank_s >> 6;
  1736. if ((blank_s & 0x3f) > blank_e) mask++;
  1737. blank_e |= mask << 6;
  1738. Hw[iBoard].CurrentOverScanX = (total - blank_e) << 3; /* 8 pixel per cell */
  1739. }
  1740. else
  1741. {
  1742. Hw[iBoard].CurrentOverScanX = 0;
  1743. }
  1744. /* Overlay on top of screen */
  1745. /* Vtotal = reg(6,7) + 2 donc Vtotal - 1 = reg(6,7) + 1 */
  1746. total = (word)crtcTab[6] + 1;
  1747. mask = (word)crtcTab[7];
  1748. total |= ((mask << 4) & 0x200) | ((mask << 8) & 0x100);
  1749. blank_s = (word)crtcTab[21] |
  1750. ( ((word)crtcTab[9] << 4) & 0x200 ) |
  1751. ( ((word)crtcTab[7] << 5) & 0x100 ) ;
  1752. blank_e = (word)crtcTab[22];
  1753. mask = blank_s >> 8;
  1754. if ((blank_s & 0x7f) > blank_e)
  1755. mask++;
  1756. blank_e |= mask << 8;
  1757. Hw[iBoard].CurrentOverScanY = (total - blank_e);
  1758. /* Test if we double the scan lines (Horizontal retrace divide select) */
  1759. if (crtcTab[23] & 0x04)
  1760. Hw[iBoard].CurrentOverScanY <<= 1;
  1761. /* We modify the overscan, must recalculate the HotSpot */
  1762. if (Hw[iBoard].cursorInfo.CurWidth > 0)
  1763. mtxCursorSetHotSpot(Hw[iBoard].cursorInfo.cHotSX,
  1764. Hw[iBoard].cursorInfo.cHotSX);
  1765. }
  1766. void mapPciVl(dword addr)
  1767. {
  1768. byte TmpByte;
  1769. dword pci_id, TmpDword;
  1770. mgaReadDWORD(*(pMgaBaseAddr+0x2000),pci_id);
  1771. if ((pci_id == (dword)0x0518102b) || (pci_id == (dword)0x0d10102b))
  1772. {
  1773. mgaWriteDWORD(*(pMgaBaseAddr+0x2010),addr);
  1774. mgaReadBYTE(*(pMgaBaseAddr+0x2004), TmpByte);
  1775. mgaWriteBYTE(*(pMgaBaseAddr+0x2004), TmpByte | 2);
  1776. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_CONFIG),TmpDword);
  1777. if (TmpDword&TITAN_VGAEN_M)
  1778. {
  1779. #ifndef WINDOWS_NT
  1780. _outp(0x46e8, 0x08);
  1781. #else
  1782. _outp(ADDR_46E8_PORT, 0x08);
  1783. #endif
  1784. }
  1785. }
  1786. }
  1787. /*-------------------------------------------------------------------
  1788. * MapBoard
  1789. *
  1790. * Map all MGA devices in systems
  1791. *
  1792. * Set global variables:
  1793. * - Hw[].MapAddress
  1794. * - MgaSel : Board selector
  1795. *-------------------------------------------------------------------*/
  1796. bool MapBoard(void)
  1797. {
  1798. dword val_id, ba;
  1799. #if USE_VP_GET_ACCESS_RANGES
  1800. VIDEO_ACCESS_RANGE MgaDriverPciAccessRange[14];
  1801. ULONG ulNbPciAccessRanges = 14;
  1802. VP_STATUS status;
  1803. USHORT VendorId = MATROX_VENDOR_ID;
  1804. USHORT DeviceId[] = { MGA_DEVICE_ID_ATH, MGA_DEVICE_ID_ATL };
  1805. ULONG ulNbDeviceIds = 2;
  1806. ULONG ulDeviceCnt = 0;
  1807. ULONG k;
  1808. BOOLEAN bRangeFound;
  1809. #endif
  1810. //[dlee] For now, we'll just check base addresses AC000 and C8000 on Alpha
  1811. //#ifndef MGA_ALPHA
  1812. dword ScanAddr[] = { MGA_ISA_BASE_1, MGA_ISA_BASE_2, MGA_ISA_BASE_3,
  1813. MGA_ISA_BASE_4, MGA_ISA_BASE_5, MGA_ISA_BASE_6,
  1814. MGA_ISA_BASE_7 };
  1815. //#else
  1816. // dword ScanAddr[] = { MGA_ISA_BASE_2, MGA_ISA_BASE_1 };
  1817. //#endif
  1818. word i, j, b_exist;
  1819. PciBiosInfo bi;
  1820. #ifndef WINDOWS_NT
  1821. NbBoard = 0;
  1822. #endif
  1823. MgaSel = getmgasel();
  1824. mtxSetVLB(MgaSel);
  1825. #ifdef WINDOWS_NT
  1826. // Special
  1827. if (NtInterfaceType == PCIBus)
  1828. {
  1829. #endif
  1830. #if USE_VP_GET_ACCESS_RANGES
  1831. #define PCI_SLOT_MAX 32
  1832. for (i = 0; i < (word)ulNbPciAccessRanges; i++)
  1833. {
  1834. MgaDriverPciAccessRange[i].RangeStart.LowPart = 0xffffffff;
  1835. }
  1836. // DbgBreakPoint();
  1837. // _asm {int 3}
  1838. PciSlot = 0;
  1839. status = VideoPortGetAccessRanges(pMgaDeviceExtension,
  1840. 0,
  1841. (PIO_RESOURCE_DESCRIPTOR) NULL,
  1842. ulNbPciAccessRanges,
  1843. MgaDriverPciAccessRange,
  1844. &VendorId,
  1845. &DeviceId[ulDeviceCnt],
  1846. &PciSlot);
  1847. if (status == NO_ERROR)
  1848. {
  1849. VideoDebugPrint((1, "MGA: no_error on DeviceId %d\n",
  1850. ulDeviceCnt));
  1851. i = 0;
  1852. while ((i < (word)ulNbPciAccessRanges) &&
  1853. (NbBoard < 7) &&
  1854. ((ba = MgaDriverPciAccessRange[i].RangeStart.LowPart) !=
  1855. 0xffffffff))
  1856. {
  1857. if (MgaDriverPciAccessRange[i].RangeLength == 0x4000)
  1858. {
  1859. // This is a control aperture.
  1860. // Do we already know about it?
  1861. bRangeFound = FALSE;
  1862. for (k = 0; k < NbBoard; k++)
  1863. {
  1864. if (Hw[k].MapAddress == ba)
  1865. {
  1866. bRangeFound = TRUE;
  1867. break;
  1868. }
  1869. }
  1870. if (!bRangeFound)
  1871. {
  1872. // This is a new memory-space range.
  1873. if ((pMgaBaseAddr = setmgasel(MgaSel, ba, 4)) != NULL)
  1874. {
  1875. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_REV),
  1876. val_id);
  1877. if ( (val_id & (~TITAN_CHIPREV_M)) == TITAN_ID)
  1878. {
  1879. // This is one of ours!
  1880. Hw[NbBoard].MapAddress = ba;
  1881. Hw[NbBoard].BaseAddress = pMgaBaseAddr;
  1882. MgaBusType[NbBoard] = MGA_BUS_PCI;
  1883. NbBoard++;
  1884. }
  1885. else
  1886. {
  1887. // We don't know what this was! Free the range.
  1888. VideoPortFreeDeviceBase(pMgaDeviceExtension,
  1889. pMgaBaseAddr);
  1890. }
  1891. }
  1892. }
  1893. }
  1894. MgaDriverPciAccessRange[i].RangeStart.LowPart = 0xffffffff;
  1895. i++;
  1896. }
  1897. }
  1898. else
  1899. {
  1900. if (status == ERROR_MORE_DATA)
  1901. VideoDebugPrint((1, "MGA: error_more_data on DeviceId %d\n", ulDeviceCnt));
  1902. else if (status == ERROR_DEV_NOT_EXIST)
  1903. VideoDebugPrint((1, "MGA: error_dev_not_exist on DeviceId %d\n", ulDeviceCnt));
  1904. else
  1905. VideoDebugPrint((1, "MGA: unknown error on DeviceId %d\n", ulDeviceCnt));
  1906. }
  1907. #else /* #if USE_VP_GET_ACCESS_RANGES */
  1908. #ifdef WINDOWS_NT /* For WinNT3.1 and WinNT3.5/Intel */
  1909. // Get access to ports before calling pciFindFirstMGA_2.
  1910. //if (VideoPortVerifyAccessRanges(pMgaDeviceExtension,
  1911. // 1,
  1912. // &MgaPciCseAccessRange) == NO_ERROR &&
  1913. // (pMgaPciIo = VideoPortGetDeviceBase(pMgaDeviceExtension,
  1914. // MgaPciCseAccessRange.RangeStart,
  1915. // MgaPciCseAccessRange.RangeLength,
  1916. // MgaPciCseAccessRange.RangeInIoSpace)) != NULL)
  1917. if ((pMgaPciIo = VideoPortGetDeviceBase(pMgaDeviceExtension,
  1918. MgaPciCseAccessRange.RangeStart,
  1919. MgaPciCseAccessRange.RangeLength,
  1920. MgaPciCseAccessRange.RangeInIoSpace)) != NULL)
  1921. {
  1922. #endif /* #ifdef MGA_WINNT31 */
  1923. #ifndef OS2
  1924. if ( (ba = (dword)pciFindFirstMGA_2()) != (dword)-1)
  1925. {
  1926. while ( (ba != (dword)-1 ) && (NbBoard < 7) )
  1927. {
  1928. #ifdef WINDOWS_NT
  1929. b_exist = 0;
  1930. for (j = 0; j < NbBoard; j++)
  1931. {
  1932. if (Hw[j].MapAddress == ba)
  1933. {
  1934. b_exist = 1;
  1935. break;
  1936. }
  1937. }
  1938. if (!b_exist)
  1939. {
  1940. // This is a new range.
  1941. #endif
  1942. pMgaBaseAddr = setmgasel(MgaSel, ba, 4);
  1943. if (pMgaBaseAddr != NULL)
  1944. {
  1945. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_REV),val_id);
  1946. if ( (val_id & (~TITAN_CHIPREV_M)) == TITAN_ID)
  1947. {
  1948. Hw[NbBoard].MapAddress = ba;
  1949. #ifdef WINDOWS_NT
  1950. Hw[NbBoard].BaseAddress = pMgaBaseAddr;
  1951. MgaBusType[NbBoard] = MGA_BUS_PCI;
  1952. Hw[NbBoard].ConfigSpace = configSpace - 0x100;
  1953. if (configSpace > 0xd000)
  1954. Hw[NbBoard].ConfigSpace = 0;
  1955. #if 0 // TO BE COMPLETED
  1956. if (Hw[NbBoard].ConfigSpace != 0)
  1957. {
  1958. MgaPciConfigAccessRange.RangeStart.LowPart = (ULONG)configSpace;
  1959. if (VideoPortVerifyAccessRanges(pMgaDeviceExtension,
  1960. 1,
  1961. &MgaPciConfigAccessRange) == NO_ERROR &&
  1962. (pMgaPciConfigSpace = VideoPortGetDeviceBase(pMgaDeviceExtension,
  1963. MgaPciConfigAccessRange.RangeStart,
  1964. MgaPciConfigAccessRange.RangeLength,
  1965. MgaPciConfigAccessRange.RangeInIoSpace)) != NULL)
  1966. {
  1967. Hw[NbBoard].ConfigSpaceAddress = pMgaPciConfigSpace;
  1968. }
  1969. }
  1970. #endif
  1971. #endif
  1972. NbBoard++;
  1973. }
  1974. #ifdef WINDOWS_NT
  1975. else
  1976. {
  1977. // We don't know what that was!
  1978. VideoPortFreeDeviceBase(pMgaDeviceExtension,
  1979. pMgaBaseAddr);
  1980. }
  1981. #endif
  1982. }
  1983. #ifdef WINDOWS_NT
  1984. }
  1985. #endif
  1986. ba = (dword)pciFindNextMGA_2();
  1987. }
  1988. }
  1989. #ifdef WINDOWS_NT
  1990. // Free access to ports after calling pciFindFirst/NextMGA_2.
  1991. VideoPortFreeDeviceBase(pMgaDeviceExtension,pMgaPciIo);
  1992. }
  1993. #endif /* #ifdef WINDOWS_NT */
  1994. else
  1995. {
  1996. #ifdef WINDOWS_NT
  1997. if ((pciBiosRoutine = pciBiosCallAddr()) != NULL)
  1998. {
  1999. VideoDebugPrint((1, "pciBiosRoutine = 0x%x\n", pciBiosRoutine));
  2000. #endif
  2001. if ( pciBiosPresent( &bi ) )
  2002. {
  2003. #endif /* #ifndef OS2 */
  2004. ba = (dword)pciFindFirstMGA();
  2005. while ( (ba != (dword)-1 ) && (NbBoard < 7) )
  2006. {
  2007. #ifdef WINDOWS_NT
  2008. b_exist = 0;
  2009. for (j = 0; j < NbBoard; j++)
  2010. {
  2011. if (Hw[j].MapAddress == ba)
  2012. {
  2013. b_exist = 1;
  2014. break;
  2015. }
  2016. }
  2017. if (!b_exist)
  2018. {
  2019. // This is a new range.
  2020. #endif
  2021. pMgaBaseAddr = setmgasel(MgaSel, ba, 4);
  2022. if (pMgaBaseAddr != NULL)
  2023. {
  2024. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_REV),
  2025. val_id);
  2026. if ( (val_id & (~TITAN_CHIPREV_M)) == TITAN_ID)
  2027. {
  2028. Hw[NbBoard].MapAddress = ba;
  2029. #ifdef WINDOWS_NT
  2030. Hw[NbBoard].BaseAddress = pMgaBaseAddr;
  2031. MgaBusType[NbBoard] = MGA_BUS_PCI;
  2032. #endif
  2033. NbBoard++;
  2034. }
  2035. #ifdef WINDOWS_NT
  2036. else
  2037. {
  2038. // We don't know what that was!
  2039. VideoPortFreeDeviceBase(pMgaDeviceExtension,
  2040. pMgaBaseAddr);
  2041. }
  2042. #endif
  2043. }
  2044. #ifdef WINDOWS_NT
  2045. }
  2046. #endif
  2047. ba = (dword)pciFindNextMGA();
  2048. }
  2049. #ifndef OS2
  2050. }
  2051. #ifdef WINDOWS_NT
  2052. }
  2053. #endif
  2054. }
  2055. #endif /* #ifndef OS2 */
  2056. #endif /* #if USE_VP_GET_ACCESS_RANGES */
  2057. #ifdef WINDOWS_NT
  2058. // Special
  2059. }
  2060. else
  2061. {
  2062. #endif
  2063. /* Search ISA BUS */
  2064. if ( mtxIsVLBBios() )
  2065. {
  2066. #ifndef WINDOWS_NT
  2067. _outp(0x46e8, 0x00);
  2068. #else
  2069. _outp(ADDR_46E8_PORT, 0x00);
  2070. #endif
  2071. }
  2072. //#ifndef MGA_ALPHA
  2073. for (i=0; (i < 7) && (NbBoard < 7); i++)
  2074. //#else
  2075. // for (i=0; (i < 2) && (NbBoard < 2); i++)
  2076. //#endif
  2077. {
  2078. b_exist = 0;
  2079. for (j = 0; j < NbBoard; j++)
  2080. {
  2081. if (Hw[j].MapAddress == ScanAddr[i])
  2082. {
  2083. b_exist = 1;
  2084. break;
  2085. }
  2086. }
  2087. #ifdef WINDOWS_NT
  2088. // On Windows NT, we have to verify that the range we're about to map
  2089. // does not conflict with a range that has already been mapped by
  2090. // another driver.
  2091. //if ((!b_exist) && (!bConflictDetected(ScanAddr[i])))
  2092. if (!b_exist)
  2093. {
  2094. #endif
  2095. pMgaBaseAddr = setmgasel(MgaSel, ScanAddr[i], 4);
  2096. if (pMgaBaseAddr != NULL)
  2097. {
  2098. mapPciVl(ScanAddr[i]);
  2099. mgaReadDWORD(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_REV),val_id);
  2100. if ( !b_exist && ((val_id & (~TITAN_CHIPREV_M)) == TITAN_ID))
  2101. {
  2102. Hw[NbBoard].MapAddress = ScanAddr[i];
  2103. #ifdef WINDOWS_NT
  2104. Hw[NbBoard].BaseAddress = pMgaBaseAddr;
  2105. MgaBusType[NbBoard] = MGA_BUS_ISA;
  2106. Hw[NbBoard].ConfigSpace = 0;
  2107. #endif
  2108. if ( mtxIsVLBBios() && (ScanAddr[i] == MGA_ISA_BASE_1) )
  2109. mgaWriteDWORD(*(pMgaBaseAddr+0x2010), (dword)0x80000000 |
  2110. (dword)MGA_ISA_BASE_1);
  2111. NbBoard++;
  2112. }
  2113. #ifdef WINDOWS_NT
  2114. else
  2115. {
  2116. // We don't know what that was!
  2117. VideoPortFreeDeviceBase(pMgaDeviceExtension, pMgaBaseAddr);
  2118. }
  2119. #endif
  2120. }
  2121. #ifdef WINDOWS_NT
  2122. }
  2123. #endif
  2124. }
  2125. #ifdef WINDOWS_NT
  2126. // Special
  2127. }
  2128. #endif
  2129. /* Indicates end of array */
  2130. Hw[NbBoard].MapAddress = (dword)-1;
  2131. if (NbBoard == 0)
  2132. return(mtxFAIL);
  2133. else
  2134. return(mtxOK);
  2135. }
  2136. /*-----------------------------------------------------
  2137. * adjustDefaultVidset
  2138. *
  2139. * Return default Vidset for the select board
  2140. *------------------------------------------------------*/
  2141. char *adjustDefaultVidset()
  2142. {
  2143. general_info *generalInfo;
  2144. mgainf = DefaultVidset;
  2145. generalInfo = (general_info *)selectMgaInfoBoard();
  2146. generalInfo->MapAddress = Hw[iBoard].MapAddress;
  2147. #ifdef WINDOWS_NT
  2148. generalInfo->BitOperation8_16 = -1;
  2149. #else
  2150. generalInfo->BitOperation8_16 = (short)0xffff;
  2151. #endif
  2152. return(mgainf);
  2153. }
  2154. //[dlee] Modified for Windows NT
  2155. // This is not called for Windows NT because we can't open files in
  2156. // kernel mode. (MGA.INF is new read in the user-mode driver instead)
  2157. #ifndef WINDOWS_NT
  2158. /*--------------------------------------------------------------
  2159. * mtxLectureMgaInf
  2160. *
  2161. * Read file mga.inf and put data in buffer mgainf
  2162. * or take DefaultVidset
  2163. *
  2164. *--------------------------------------------------------------*/
  2165. bool mtxLectureMgaInf(void)
  2166. {
  2167. #ifdef WINDOWS
  2168. LPSTR lpszEnv;
  2169. bool findMGA;
  2170. #endif
  2171. #ifdef OS2
  2172. HFILE hFile;
  2173. USHORT usAction;
  2174. USHORT usInfoLevel = 1;
  2175. FILESTATUS status;
  2176. USHORT bytesRead;
  2177. ULONG fn_ID;
  2178. char mgaName[] = "MGA";
  2179. char far *mgaPathPtr;
  2180. char mgaPath[300];
  2181. USHORT fileSize;
  2182. #else
  2183. FILE *pFile;
  2184. char *env, path[128];
  2185. long fileSize;
  2186. #endif
  2187. int i;
  2188. #ifndef OS2
  2189. /*** Reading file MGA.INF ***/
  2190. /*** Put values in global array mgainf ***/
  2191. strcpy(path, "mga.inf");
  2192. if ((pFile = fopen(path, "rb")) == NULL)
  2193. {
  2194. #endif
  2195. #ifdef WINDOWS
  2196. /*** Find MGA variable ***/
  2197. findMGA = FALSE;
  2198. lpszEnv = GetDOSEnvironment();
  2199. while(*lpszEnv != '\0')
  2200. {
  2201. if (! (strncmp("MGA=", lpszEnv, 4)) )
  2202. {
  2203. findMGA = TRUE;
  2204. break;
  2205. }
  2206. lpszEnv += lstrlen(lpszEnv) + 1;
  2207. }
  2208. if (findMGA)
  2209. {
  2210. strcpy(path, lpszEnv+4);
  2211. i = strlen(path);
  2212. if (path[i-1] != '\\')
  2213. strcat(path, "\\");
  2214. strcat(path, "mga.inf");
  2215. if ((pFile = fopen(path, "rb")) == NULL)
  2216. {
  2217. mgainf = adjustDefaultVidset();
  2218. return mtxOK;
  2219. }
  2220. }
  2221. else
  2222. {
  2223. mgainf = adjustDefaultVidset();
  2224. return mtxOK;
  2225. }
  2226. #endif /* #ifdef WINDOWS */
  2227. #if( !defined(WINDOWS) && !defined(OS2) && !defined(WINDOWS_NT) )
  2228. /* Check environment variable MGA */
  2229. if ( (env = getenv("MGA")) != NULL )
  2230. {
  2231. strcpy(path, env);
  2232. i = strlen(path);
  2233. if (path[i-1] != '\\')
  2234. strcat(path, "\\");
  2235. strcat(path, "mga.inf");
  2236. if ((pFile = fopen(path, "rb")) == NULL)
  2237. {
  2238. mgainf = adjustDefaultVidset();
  2239. return mtxOK;
  2240. }
  2241. }
  2242. else
  2243. {
  2244. mgainf = adjustDefaultVidset();
  2245. return mtxOK;
  2246. }
  2247. #endif /* #if( !defined(WINDOWS) && !defined(OS2) && !defined(WINDOWS_NT) ) */
  2248. #ifdef OS2
  2249. /* Position of mga.inf defined by the environnement variable MGA */
  2250. /* if it is not defined, we will use the setup by defaut */
  2251. if(DosScanEnv(mgaName, &mgaPathPtr))
  2252. {
  2253. mgainf = adjustDefaultVidset();
  2254. return(mtxOK);
  2255. }
  2256. strcpy(mgaPath, mgaPathPtr);
  2257. strcat(mgaPath, "\\mga.inf");
  2258. if(DosOpen2(mgaPath, &hFile, &usAction, 0L, FILE_NORMAL, FILE_OPEN,
  2259. OPEN_ACCESS_READONLY | OPEN_SHARE_DENYREADWRITE, NULL, 0L))
  2260. {
  2261. mgainf = adjustDefaultVidset();
  2262. return(mtxOK);
  2263. }
  2264. DosQFileInfo(hFile, usInfoLevel, &status, (USHORT)sizeof(FILESTATUS));
  2265. fileSize = (USHORT)status.cbFile;
  2266. #else
  2267. }
  2268. fseek(pFile, 0, SEEK_END);
  2269. fileSize = ftell(pFile);
  2270. rewind(pFile);
  2271. #endif
  2272. if (CheckHwAllDone && (mgainf != DefaultVidset))
  2273. free( (void *)mgainf);
  2274. if ( (mgainf = (char *)malloc(fileSize * sizeof(char))) == 0 )
  2275. {
  2276. #ifdef OS2
  2277. DosClose(hFile);
  2278. #else
  2279. fclose(pFile);
  2280. #endif
  2281. mgainf = adjustDefaultVidset();
  2282. /*** BEN setter un warning code ici ***/
  2283. return(mtxOK);
  2284. }
  2285. #ifdef OS2
  2286. if ( DosRead(hFile, (PVOID)mgainf, fileSize, &bytesRead) ||
  2287. (bytesRead != fileSize))
  2288. #else
  2289. if ( fread(mgainf, sizeof(char), fileSize, pFile) < fileSize )
  2290. #endif
  2291. {
  2292. #ifdef OS2
  2293. DosClose(hFile);
  2294. #else
  2295. fclose(pFile);
  2296. #endif
  2297. free(mgainf);
  2298. mgainf = adjustDefaultVidset();
  2299. /*** BEN setter un warning code ici ***/
  2300. return(mtxOK);
  2301. }
  2302. if ( ((header *)mgainf)->Revision != (short)VERSION_NUMBER)
  2303. {
  2304. /* Conversion of old mga.inf file to the current revision */
  2305. if ( !(mgainf = mtxConvertMgaInf( mgainf )))
  2306. {
  2307. #ifdef OS2
  2308. DosClose(hFile);
  2309. #else
  2310. fclose(pFile);
  2311. #endif
  2312. mgainf = adjustDefaultVidset();
  2313. /*** BEN setter un warning code ici ***/
  2314. return(mtxOK);
  2315. }
  2316. }
  2317. #ifdef OS2
  2318. DosClose(hFile);
  2319. #else
  2320. fclose(pFile);
  2321. #endif
  2322. if ( (general_info *)selectMgaInfoBoard() == NULL)
  2323. {
  2324. free(mgainf);
  2325. mgainf = adjustDefaultVidset();
  2326. /*** BEN setter un warning code ici ***/
  2327. return(mtxOK);
  2328. }
  2329. if (strncmp(mgainf, "Matrox MGA Setup file", 21))
  2330. {
  2331. free(mgainf);
  2332. mgainf = adjustDefaultVidset();
  2333. }
  2334. return(mtxOK);
  2335. }
  2336. #endif /* #ifndef WINDOWS_NT */
  2337. /*-----------------------------------------------------
  2338. * selectMgaInfoBoard
  2339. *
  2340. * Return a pointer at the first information for the
  2341. * selected board
  2342. *------------------------------------------------------
  2343. *
  2344. * Algorithme de recherche
  2345. * mga.inf support 7 card in the system. We have to fit the MapAdress
  2346. * of the card whith the one specified in structure general_info. If
  2347. * no one of the seven general_info fit, we pick the first valid one.
  2348. * Note : The map adresse of the structure is not updated, we must not use
  2349. * this adress outside this function.
  2350. *
  2351. *------------------------------------------------------*/
  2352. char *selectMgaInfoBoard()
  2353. {
  2354. word IndexBoard, DefaultBoard;
  2355. header *pHeader = (header *)mgainf;
  2356. general_info *genInfo = NULL;
  2357. DefaultBoard = NB_BOARD_MAX;
  2358. for (IndexBoard = 0; !genInfo && (IndexBoard < NB_BOARD_MAX); IndexBoard++)
  2359. {
  2360. if ( pHeader->BoardPtr[IndexBoard] > 0 )
  2361. {
  2362. if ( DefaultBoard == NB_BOARD_MAX) DefaultBoard = IndexBoard;
  2363. genInfo = (general_info *)(mgainf + pHeader->BoardPtr[IndexBoard]);
  2364. if (Hw[iBoard].MapAddress != genInfo->MapAddress) genInfo = NULL;
  2365. }
  2366. }
  2367. if ( !genInfo) /*** BEN setter un warning code ici ***/
  2368. {
  2369. if (DefaultBoard < NB_BOARD_MAX)
  2370. {
  2371. genInfo = (general_info *)(mgainf + pHeader->BoardPtr[DefaultBoard]);
  2372. }
  2373. else
  2374. {
  2375. mgainf = adjustDefaultVidset();
  2376. pHeader = (header *)mgainf;
  2377. genInfo = (general_info *)(mgainf + pHeader->BoardPtr[0]);
  2378. }
  2379. }
  2380. return (char *)genInfo;
  2381. }
  2382. /*-----------------------------------------------------
  2383. * UpdateHwModeTable
  2384. *
  2385. * Update hardware mode table with interlace informations
  2386. * if we are in interlace mode
  2387. *
  2388. *------------------------------------------------------*/
  2389. void UpdateHwModeTable (char *pMgaInfo,
  2390. HwModeData *pHwMode,
  2391. HwModeInterlace *piHwMode,
  2392. bool dacSupportHires )
  2393. {
  2394. short FlagMonitorSupport;
  2395. word TmpRes;
  2396. HwModeData *pHwMode1;
  2397. general_info *generalInfo = (general_info *)pMgaInfo;
  2398. if (CheckHwAllDone)
  2399. {
  2400. for (pHwMode1 = pHwMode ; pHwMode1->DispWidth != (word)-1; pHwMode1++)
  2401. {
  2402. pHwMode1->DispType &= 0x5e; /* force interlaced = 0 and monitor limited = 0 */
  2403. if (pHwMode1->DispType & 0x40) /* Hw limited */
  2404. pHwMode1->DispType |= 0x80; /* force not displayable bit on */
  2405. }
  2406. }
  2407. for ( ; pHwMode->DispWidth != (word)-1; piHwMode++, pHwMode++)
  2408. {
  2409. /* Determine TmpRes for compatibility with spec mga.inf */
  2410. switch (pHwMode->DispWidth)
  2411. {
  2412. case 640: if (pHwMode->DispType & 0x02)
  2413. TmpRes = RESNTSC;
  2414. else
  2415. TmpRes = RES640;
  2416. break;
  2417. case 768: TmpRes = RESPAL;
  2418. break;
  2419. case 800: TmpRes = RES800;
  2420. break;
  2421. case 1024: TmpRes = RES1024;
  2422. break;
  2423. case 1152: TmpRes = RES1152;
  2424. break;
  2425. case 1280: TmpRes = RES1280;
  2426. break;
  2427. case 1600: TmpRes = RES1600;
  2428. break;
  2429. }
  2430. FlagMonitorSupport = generalInfo ->MonitorSupport[TmpRes];
  2431. /*** Update of the pHwMode table if I (interlace) ***/
  2432. switch ( FlagMonitorSupport )
  2433. {
  2434. case MONITOR_I:
  2435. if(piHwMode->FbPitch)
  2436. {
  2437. pHwMode->FbPitch = piHwMode->FbPitch;
  2438. pHwMode->DispType = piHwMode->DispType;
  2439. pHwMode->NumOffScr = piHwMode->NumOffScr;
  2440. pHwMode->pOffScr = piHwMode->pOffScr;
  2441. }
  2442. pHwMode->DispType |= DISP_SUPPORT_I; /* Interlace */
  2443. break;
  2444. case MONITOR_NA:
  2445. pHwMode->DispType |= DISP_SUPPORT_NA; /* monitor limited */
  2446. break;
  2447. }
  2448. /* Not displayable, hw limited */
  2449. if ((pHwMode->DispWidth > 1280) && !dacSupportHires)
  2450. pHwMode->DispType |= DISP_SUPPORT_HWL;
  2451. #if ((!defined (WINDOWS_NT)) || (USE_DDC_CODE))
  2452. if (SupportDDC && !(byte)InDDCTable(pHwMode->DispWidth))
  2453. pHwMode->DispType |= DISP_SUPPORT_NA; /* monitor limited */
  2454. #endif
  2455. /*** For ATLAS chip we can't do Z buffering ***/
  2456. if( ((Hw[iBoard].ProductRev >> 4) & 0x0000000f) == ATLAS_CHIP &&
  2457. pHwMode->ZBuffer )
  2458. pHwMode->DispType |= DISP_SUPPORT_HWL;
  2459. /*** For an Ultima board we can't do Z-buffer ***/
  2460. if( !((Dst1 & TITAN_DST1_ABOVE1280_M) && (Dst1 & TITAN_DST1_200MHZ_M)) &&
  2461. (ProductMGA[iBoard] == MGA_PCI_2M || ProductMGA[iBoard] == MGA_PCI_4M) &&
  2462. ((Hw[iBoard].ProductRev >> 4) & 0x0000000f) == ATHENA_CHIP &&
  2463. pHwMode->ZBuffer && Hw[iBoard].DacType != TVP3026)
  2464. {
  2465. pHwMode->DispType |= DISP_SUPPORT_HWL;
  2466. }
  2467. /* For Impression Lite we can't do double buffering */
  2468. if ((Dst1 & TITAN_DST1_ABOVE1280_M) && (Dst1 & TITAN_DST1_200MHZ_M) &&
  2469. ((Hw[iBoard].ProductRev >> 4) & 0x0000000f) == ATHENA_CHIP &&
  2470. (pHwMode->DispType & 0x10) && pHwMode->ZBuffer)
  2471. {
  2472. pHwMode->DispType |= DISP_SUPPORT_HWL;
  2473. }
  2474. /* PACK PIXEL ON TVP and Windows only */
  2475. #ifdef _WINDOWS_DLL16
  2476. if ((pHwMode->PixWidth == 24) && (Hw[iBoard].DacType != TVP3026))
  2477. pHwMode->DispType |= DISP_SUPPORT_HWL;
  2478. #else
  2479. if (pHwMode->PixWidth == 24)
  2480. pHwMode->DispType |= DISP_SUPPORT_HWL;
  2481. #endif
  2482. }
  2483. }
  2484. /*-----------------------------------------------------
  2485. * mtxGetMgaSel
  2486. *
  2487. * Return the selector
  2488. * (Called by the driver)
  2489. *------------------------------------------------------*/
  2490. dword mtxGetMgaSel(void)
  2491. {
  2492. return(MgaSel);
  2493. }
  2494. /*-----------------------------------------------------
  2495. * mtxGetInfo
  2496. *
  2497. * Return useful informations to Open GL and Windows
  2498. *------------------------------------------------------*/
  2499. void mtxGetInfo(HwModeData **pCurHwMode, HwModeData **pCurDispMode, byte **InitBuffer, byte **VideoBuffer)
  2500. {
  2501. *pCurHwMode = Hw[iBoard].pCurrentHwMode;
  2502. *pCurDispMode = Hw[iBoard].pCurrentDisplayMode;
  2503. *InitBuffer = InitBuf[iBoard];
  2504. *VideoBuffer = VideoBuf[iBoard];
  2505. }
  2506. #ifdef WINDOWS
  2507. /*-----------------------------------------------------
  2508. * mtxGetHwData
  2509. *
  2510. * Return useful informations to Open GL and Windows
  2511. * Return value:
  2512. * - null pointer : no MGA board
  2513. * - valid pointer: pointer to HwData structure
  2514. *------------------------------------------------------*/
  2515. HwData *mtxGetHwData(void)
  2516. {
  2517. if(Hw[iBoard].MapAddress == (dword)-1)
  2518. return 0;
  2519. else
  2520. return(&Hw[iBoard]);
  2521. }
  2522. #endif /* #ifdef WINDOWS */
  2523. /*-----------------------------------------------------
  2524. * InitHwStruct
  2525. *
  2526. * Initialize: Hw[].pCurrentHwMode
  2527. * Hw[].VramAvailable
  2528. * Hw[].DramAvailable
  2529. *------------------------------------------------------*/
  2530. bool InitHwStruct(byte CurBoard, HwModeData *pHwModeData, word sizeArray,
  2531. dword VramAvailable, dword DramAvailable)
  2532. {
  2533. /* Dynamic allocation of memory if we have more than 1 board */
  2534. if (NbBoard == 1)
  2535. {
  2536. Hw[CurBoard].pCurrentHwMode = pHwModeData;
  2537. }
  2538. else
  2539. {
  2540. #ifdef WINDOWS_NT
  2541. if(! (Hw[CurBoard].pCurrentHwMode = AllocateSystemMemory(sizeArray)))
  2542. return mtxFAIL;
  2543. Hw[CurBoard].pHwMode = Hw[CurBoard].pCurrentHwMode;
  2544. #else
  2545. if(! (Hw[CurBoard].pCurrentHwMode = malloc(sizeArray)))
  2546. return mtxFAIL;
  2547. #endif
  2548. memcpy(Hw[CurBoard].pCurrentHwMode, pHwModeData, sizeArray);
  2549. }
  2550. FirstMode[CurBoard] = Hw[CurBoard].pCurrentHwMode;
  2551. Hw[CurBoard].VramAvail = VramAvailable;
  2552. Hw[CurBoard].DramAvail = DramAvailable;
  2553. return mtxOK;
  2554. }
  2555. /*-------------------------------------------------------------------
  2556. * mtxSetLUT
  2557. *
  2558. * Initialize RAMDAC LUT
  2559. *
  2560. * Return value:
  2561. * mtxOK - successfull
  2562. * mtxFAIL - failed (not in a LUT mode
  2563. *-------------------------------------------------------------------*/
  2564. bool mtxSetLUT(word index, mtxRGB color)
  2565. {
  2566. if(! (Hw[iBoard].pCurrentHwMode->DispType & 0x04))
  2567. return mtxFAIL;
  2568. switch(Hw[iBoard].DacType)
  2569. {
  2570. case BT482:
  2571. mgaWriteBYTE(*(pMgaBaseAddr + RAMDAC_OFFSET + BT482_WADR_PAL),
  2572. (byte)index);
  2573. mgaWriteBYTE(*(pMgaBaseAddr + RAMDAC_OFFSET + BT482_COL_PAL),
  2574. (byte)color);
  2575. mgaWriteBYTE(*(pMgaBaseAddr + RAMDAC_OFFSET + BT482_COL_PAL),
  2576. (byte)(color >> 8));
  2577. mgaWriteBYTE(*(pMgaBaseAddr + RAMDAC_OFFSET + BT482_COL_PAL),
  2578. (byte)(color >> 16));
  2579. break;
  2580. case BT485:
  2581. case PX2085:
  2582. case VIEWPOINT:
  2583. case TVP3026:
  2584. mgaWriteBYTE(*(pMgaBaseAddr + RAMDAC_OFFSET + BT484_WADR_PAL),
  2585. (byte)index);
  2586. mgaWriteBYTE(*(pMgaBaseAddr + RAMDAC_OFFSET + BT484_COL_PAL),
  2587. (byte)color);
  2588. mgaWriteBYTE(*(pMgaBaseAddr + RAMDAC_OFFSET + BT484_COL_PAL),
  2589. (byte)(color >> 8));
  2590. mgaWriteBYTE(*(pMgaBaseAddr + RAMDAC_OFFSET + BT484_COL_PAL),
  2591. (byte)(color >> 16));
  2592. break;
  2593. default:
  2594. return mtxFAIL;
  2595. }
  2596. return mtxOK;
  2597. }
  2598. /*---------------------------------------------
  2599. * mtxClose
  2600. * Supported for compatibility. Nothing done
  2601. *---------------------------------------------*/
  2602. void mtxClose(void)
  2603. {
  2604. }
  2605. #ifdef _WINDOWS_DLL16
  2606. /*----------------------------------------------------------
  2607. * mtxLoadSXCI
  2608. *
  2609. * Load SXCI.DLL
  2610. *
  2611. * Return: (mtxOK or mtxFAIL)
  2612. *
  2613. *----------------------------------------------------------*/
  2614. HANDLE FAR PASCAL _export mtxLoadSXCI(word mode, word FAR *ErrorCode)
  2615. {
  2616. char cBuffer[20];
  2617. GetPrivateProfileString("mga.drv","3D","",cBuffer,sizeof(cBuffer),
  2618. "SYSTEM.INI");
  2619. if( (strcmp(cBuffer,"OFF")== 0) && mode == SXCI_3D &&
  2620. (((Hw[iBoard].ProductRev >> 4) & 0x0000000f) == 0) ) /* TITAN */
  2621. {
  2622. *ErrorCode = 101;
  2623. return(0);
  2624. }
  2625. GetPrivateProfileString("boot","display.drv","",cBuffer,sizeof(cBuffer),
  2626. "SYSTEM.INI");
  2627. if( (strcmp(cBuffer,"mga16.drv")== 0) && mode == SXCI_3D )
  2628. {
  2629. *ErrorCode = 103; /* driver not supported */
  2630. return(0);
  2631. }
  2632. if( (Hw[iBoard].pCurrentHwMode->ZBuffer == FALSE) && mode == SXCI_3D)
  2633. {
  2634. *ErrorCode = 102;
  2635. return(0);
  2636. }
  2637. /*** If pack pixel mode: can't load sxci.dll ***/
  2638. if( Hw[iBoard].pCurrentHwMode->PixWidth == 24)
  2639. {
  2640. *ErrorCode = 104;
  2641. return(0);
  2642. }
  2643. hsxci = LoadLibrary("sxci.dll");
  2644. if(hsxci > 32)
  2645. {
  2646. fp1 = (FARPROC2)GetProcAddress(hsxci, "Win386LibEntry");
  2647. }
  2648. else
  2649. {
  2650. *ErrorCode = 100;
  2651. return(0);
  2652. }
  2653. pDllMem = (word FAR *)memalloc(30);
  2654. (*fp1)(pDllMem, 31); /* Call PassPoolMem */
  2655. *(pDllMem+PAN_X) = 0;
  2656. *(pDllMem+PAN_Y) = 0;
  2657. *(pDllMem+PAN_DISP_WIDTH) = Hw[iBoard].pCurrentDisplayMode->DispWidth-1;
  2658. *(pDllMem+PAN_DISP_HEIGHT) = Hw[iBoard].pCurrentDisplayMode->DispHeight-1;
  2659. *(pDllMem+PAN_BOUND_LEFT) = 0;
  2660. *(pDllMem+PAN_BOUND_RIGHT) = 0;
  2661. *(pDllMem+PAN_BOUND_TOP) = 0;
  2662. *(pDllMem+PAN_BOUND_BOTTOM) = 0;
  2663. *(pDllMem+DB_SCALE) = (word)1;
  2664. *ErrorCode = hsxci;
  2665. NbSxciLoaded++;
  2666. return(hsxci);
  2667. }
  2668. /*----------------------------------------------------------
  2669. * mtxUnloadSXCI
  2670. *
  2671. * Unload SXCI.DLL
  2672. *
  2673. * Return: void
  2674. *
  2675. *----------------------------------------------------------*/
  2676. void FAR PASCAL _export mtxUnloadSXCI(void)
  2677. {
  2678. if(NbSxciLoaded)
  2679. {
  2680. if(NbSxciLoaded == 1)
  2681. memfree((void FAR **)&pDllMem);
  2682. FreeLibrary(hsxci);
  2683. NbSxciLoaded--;
  2684. }
  2685. }
  2686. #endif /* #ifdef _WINDOWS_DLL16 */
  2687. /*----------------------------------------------------------
  2688. * ProgrammeClock
  2689. *
  2690. * Set clock according of new strapping: (50MHz, 55MHz or 60MHz)
  2691. * VD34, VD33 -> MGA-PCI/2 and MGA-VLB/2
  2692. * VD49, VD36 -> MGA-PCI/2+ and MGA-VLB/2+
  2693. *
  2694. * For TITAN -> 45MHz
  2695. *----------------------------------------------------------*/
  2696. bool ProgrammeClock(byte Chip, dword Dst1, dword InfoDac)
  2697. {
  2698. dword Value;
  2699. dword ValClock;
  2700. byte TmpByte;
  2701. if( (Chip == ATLAS_CHIP) || (Chip == ATHENA_CHIP))
  2702. {
  2703. if ((Hw[iBoard].ProductType & 0x0f) == BOARD_MGA_RESERVED)
  2704. {
  2705. ValClock = 0x065AC3D; /* 50MHz */
  2706. }
  2707. /*** Detect if MGA-PCI/2+ or MGA-VLB/2+ ***/
  2708. else if( ((ProductMGA[iBoard] == MGA_PCI_2M) ||
  2709. (ProductMGA[iBoard] == MGA_PCI_4M)) &&
  2710. (InfoDac == Info_Dac_ViewPoint))
  2711. {
  2712. Value = ((Dst1 & TITAN_DST1_NOMUXES_M) >>
  2713. (TITAN_DST1_NOMUXES_A-1)) |
  2714. ((Dst1 & TITAN_DST1_ABOVE1280_M) >>
  2715. TITAN_DST1_ABOVE1280_A);
  2716. switch(Value)
  2717. {
  2718. case 3:
  2719. ValClock = 0x065AC3D; /* 50MHz */
  2720. break;
  2721. case 2:
  2722. ValClock = 0x068A413; /* 60MHz */
  2723. break;
  2724. case 0:
  2725. ValClock = 0x067D83D; /* 55MHz */
  2726. break;
  2727. default:
  2728. return(mtxFAIL);
  2729. }
  2730. }
  2731. else
  2732. {
  2733. Value = (Dst1 & TITAN_DST1_RAMSPEED_M) >> TITAN_DST1_RAMSPEED_A;
  2734. switch(Value)
  2735. {
  2736. case 0:
  2737. ValClock = 0x065AC3D; /* 50MHz */
  2738. break;
  2739. case 1:
  2740. ValClock = 0x068A413; /* 60MHz */
  2741. break;
  2742. case 3:
  2743. ValClock = 0x067D83D; /* 55MHz */
  2744. break;
  2745. default:
  2746. return(mtxFAIL);
  2747. }
  2748. }
  2749. }
  2750. else /* TITAN */
  2751. {
  2752. ValClock = 0x0063AC44; /* 45MHz */
  2753. }
  2754. /* Lookup for find real frequency to progrmming */
  2755. switch( ValClock )
  2756. {
  2757. case 0x063AC44: presentMclk[iBoard] = 45000000L; /* 45Mhz */
  2758. break;
  2759. case 0x065AC3D: presentMclk[iBoard] = 50000000L; /* 50Mhz */
  2760. break;
  2761. case 0x067D83D: presentMclk[iBoard] = 55000000L; /* 55Mhz */
  2762. break;
  2763. case 0x068A413: presentMclk[iBoard] = 60000000L; /* 60Mhz */
  2764. break;
  2765. case 0x06d4423: presentMclk[iBoard] = 65000000L; /* 65Mhz */
  2766. break;
  2767. case 0x06ea410: presentMclk[iBoard] = 70000000L; /* 70Mhz */
  2768. break;
  2769. case 0x06ed013: presentMclk[iBoard] = 75000000L; /* 75Mhz */
  2770. break;
  2771. case 0x06f7020: presentMclk[iBoard] = 80000000L; /* 80Mhz */
  2772. break;
  2773. case 0x071701e: presentMclk[iBoard] = 85000000L; /* 85Mhz */
  2774. break;
  2775. case 0x074fc13: presentMclk[iBoard] = 90000000L; /* 90Mhz */
  2776. break;
  2777. default: ValClock = 0x065AC3D;
  2778. presentMclk[iBoard] = 50000000L; /* 50Mhz */
  2779. }
  2780. if(InfoDac == Info_Dac_TVP3026)
  2781. {
  2782. setTVP3026Freq(pMgaBaseAddr, presentMclk[iBoard] / 1000L, 3, 0);
  2783. }
  2784. else
  2785. {
  2786. /*** Program MCLOCK ***/
  2787. mgaReadBYTE(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_MISC_OUT_R), TmpByte);
  2788. programme_reg_icd ( pMgaBaseAddr, 3, ValClock );
  2789. mgaWriteBYTE(*(pMgaBaseAddr+TITAN_OFFSET+TITAN_MISC_ISTAT0), TmpByte);
  2790. delay_us(10000);
  2791. }
  2792. return(mtxOK);
  2793. }