Source code of Windows XP (NT5)
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  1. /*++
  2. Copyright (c) 1992 Microsoft Corporation
  3. Module Name:
  4. vga.c
  5. Abstract:
  6. This is the miniport driver for the VGA card.
  7. Environment:
  8. kernel mode only
  9. Notes:
  10. Revision History:
  11. --*/
  12. #include "dderror.h"
  13. #include "devioctl.h"
  14. #include "miniport.h"
  15. #include "ntddvdeo.h"
  16. #include "video.h"
  17. #include "vga.h"
  18. #include "vesa.h"
  19. VP_STATUS
  20. GetDeviceDataCallback(
  21. PVOID HwDeviceExtension,
  22. PVOID Context,
  23. VIDEO_DEVICE_DATA_TYPE DeviceDataType,
  24. PVOID Identifier,
  25. ULONG IdentifierLength,
  26. PVOID ConfigurationData,
  27. ULONG ConfigurationDataLength,
  28. PVOID ComponentInformation,
  29. ULONG ComponentInformationLength
  30. );
  31. #if defined(ALLOC_PRAGMA)
  32. #pragma alloc_text(INIT,DriverEntry)
  33. #pragma alloc_text(PAGE,VgaFindAdapter)
  34. #pragma alloc_text(PAGE,VgaInitialize)
  35. #pragma alloc_text(PAGE,VgaStartIO)
  36. #pragma alloc_text(PAGE,VgaLoadAndSetFont)
  37. #pragma alloc_text(PAGE,VgaQueryCursorPosition)
  38. #pragma alloc_text(PAGE,VgaSetCursorPosition)
  39. #pragma alloc_text(PAGE,VgaQueryCursorAttributes)
  40. #pragma alloc_text(PAGE,VgaSetCursorAttributes)
  41. #pragma alloc_text(PAGE,VgaIsPresent)
  42. #pragma alloc_text(PAGE,VgaSetPaletteReg)
  43. #pragma alloc_text(PAGE,VgaSetColorLookup)
  44. #pragma alloc_text(PAGE,VgaRestoreHardwareState)
  45. #pragma alloc_text(PAGE,VgaSaveHardwareState)
  46. #pragma alloc_text(PAGE,VgaGetBankSelectCode)
  47. #pragma alloc_text(PAGE,VgaValidatorUcharEntry)
  48. #pragma alloc_text(PAGE,VgaValidatorUshortEntry)
  49. #pragma alloc_text(PAGE,VgaValidatorUlongEntry)
  50. #pragma alloc_text(PAGE,GetDeviceDataCallback)
  51. #pragma alloc_text(PAGE,VgaSetBankPosition)
  52. #endif
  53. ULONG
  54. DriverEntry(
  55. PVOID Context1,
  56. PVOID Context2
  57. )
  58. /*++
  59. Routine Description:
  60. Installable driver initialization entry point.
  61. This entry point is called directly by the I/O system.
  62. Arguments:
  63. Context1 - First context value passed by the operating system. This is
  64. the value with which the miniport driver calls VideoPortInitialize().
  65. Context2 - Second context value passed by the operating system. This is
  66. the value with which the miniport driver calls VideoPortInitialize().
  67. Return Value:
  68. Status from VideoPortInitialize()
  69. --*/
  70. {
  71. VIDEO_HW_INITIALIZATION_DATA hwInitData;
  72. ULONG initializationStatus;
  73. //
  74. // Zero out structure.
  75. //
  76. VideoPortZeroMemory(&hwInitData, sizeof(VIDEO_HW_INITIALIZATION_DATA));
  77. //
  78. // Specify sizes of structure and extension.
  79. //
  80. hwInitData.HwInitDataSize = sizeof(VIDEO_HW_INITIALIZATION_DATA);
  81. //
  82. // Set entry points.
  83. //
  84. hwInitData.HwFindAdapter = VgaFindAdapter;
  85. hwInitData.HwInitialize = VgaInitialize;
  86. hwInitData.HwInterrupt = NULL;
  87. hwInitData.HwStartIO = VgaStartIO;
  88. //
  89. // Determine the size we require for the device extension.
  90. //
  91. hwInitData.HwDeviceExtensionSize = sizeof(HW_DEVICE_EXTENSION);
  92. //
  93. // Both numbers for these fields are zero since they are allocated
  94. // statically in the driver. We will pass pointers and sizes later in
  95. // the find adapter routine.
  96. //
  97. // hwInitData.NumberOfAccessRanges = 0;
  98. // hwInitData.NumEmulatorAccessEntries = 0;
  99. //
  100. // Always start with parameters for device0 in this case.
  101. // We can leave it like this since we know we will only ever find one
  102. // VGA type adapter in a machine.
  103. //
  104. // hwInitData.StartingDeviceNumber = 0;
  105. //
  106. // Once all the relevant information has been stored, call the video
  107. // port driver to do the initialization.
  108. //
  109. hwInitData.AdapterInterfaceType = Isa;
  110. initializationStatus = VideoPortInitialize(Context1,
  111. Context2,
  112. &hwInitData,
  113. NULL);
  114. if (initializationStatus == NO_ERROR)
  115. {
  116. return initializationStatus;
  117. }
  118. hwInitData.AdapterInterfaceType = PCIBus;
  119. initializationStatus = VideoPortInitialize(Context1,
  120. Context2,
  121. &hwInitData,
  122. NULL);
  123. if (initializationStatus == NO_ERROR)
  124. {
  125. return initializationStatus;
  126. }
  127. hwInitData.AdapterInterfaceType = Eisa;
  128. initializationStatus = VideoPortInitialize(Context1,
  129. Context2,
  130. &hwInitData,
  131. NULL);
  132. if (initializationStatus == NO_ERROR)
  133. {
  134. return initializationStatus;
  135. }
  136. hwInitData.AdapterInterfaceType = MicroChannel;
  137. initializationStatus = VideoPortInitialize(Context1,
  138. Context2,
  139. &hwInitData,
  140. NULL);
  141. if (initializationStatus == NO_ERROR)
  142. {
  143. return initializationStatus;
  144. }
  145. //
  146. // For MIPS ACER machines
  147. //
  148. // *** Must keep this at the end since it will cause the global access
  149. // range structure to change in the driver. ***
  150. //
  151. hwInitData.AdapterInterfaceType = Internal;
  152. initializationStatus = VideoPortInitialize(Context1,
  153. Context2,
  154. &hwInitData,
  155. NULL);
  156. return initializationStatus;
  157. } // end DriverEntry()
  158. VP_STATUS
  159. GetDeviceDataCallback(
  160. PVOID HwDeviceExtension,
  161. PVOID Context,
  162. VIDEO_DEVICE_DATA_TYPE DeviceDataType,
  163. PVOID Identifier,
  164. ULONG IdentifierLength,
  165. PVOID ConfigurationData,
  166. ULONG ConfigurationDataLength,
  167. PVOID ComponentInformation,
  168. ULONG ComponentInformationLength
  169. )
  170. {
  171. PVIDEO_ACCESS_RANGE accessRange = Context;
  172. PVIDEO_HARDWARE_CONFIGURATION_DATA configData = ConfigurationData;
  173. ULONG i;
  174. VideoDebugPrint((2, "VGA: controller information is present\n"));
  175. //
  176. // We do not want to try to detect the vga if there isn't one present.
  177. // (Kind of a paradox?) The only MIPS box I am aware of which has
  178. // an vga on the internal bus is the NeTPower NeTstation 100 and the Acer.
  179. // It has an identifier of "ALI_S3".
  180. //
  181. if (!Identifier)
  182. {
  183. return ERROR_DEV_NOT_EXIST;
  184. }
  185. if (VideoPortCompareMemory(L"ALI_S3",
  186. Identifier,
  187. sizeof(L"ALI_S3")) != sizeof(L"ALI_S3"))
  188. {
  189. return ERROR_DEV_NOT_EXIST;
  190. }
  191. //
  192. // Now lets get the base for the IO ports and memory location out of the
  193. // configuration information.
  194. //
  195. VideoDebugPrint((2, "VGA: Internal Bus, get new IO bases\n"));
  196. //
  197. // For MIPS machine with an Internal Bus, adjust the access ranges.
  198. //
  199. VideoDebugPrint((3, "VGA: FrameBase Offset = %08lx\n", configData->FrameBase));
  200. VideoDebugPrint((3, "VGA: IoBase Offset = %08lx\n", configData->ControlBase));
  201. for (i=0; i < NUM_VGA_ACCESS_RANGES; i++)
  202. {
  203. if (accessRange[i].RangeInIoSpace)
  204. {
  205. accessRange[i].RangeStart.LowPart += configData->ControlBase;
  206. accessRange[i].RangeInIoSpace = 0;
  207. }
  208. else
  209. {
  210. accessRange[i].RangeStart.LowPart += configData->FrameBase;
  211. }
  212. }
  213. return NO_ERROR;
  214. } //end GetDeviceDataCallback()
  215. VP_STATUS
  216. VgaAcquireResources(
  217. PHW_DEVICE_EXTENSION HwDeviceExtension
  218. )
  219. /*++
  220. Routine Description:
  221. This routine tries to acquire the vga resources.
  222. Arguments:
  223. Pointer to HwDeviceExtension
  224. Returns:
  225. Status code indicating whether or not the resources where acquired.
  226. --*/
  227. {
  228. VP_STATUS status;
  229. ULONG i, NumVgaAccessRanges = NUM_VGA_ACCESS_RANGES;
  230. //
  231. // We only want the vga to claim resources if it loaded because
  232. // no other drivers were present. If other drivers were present,
  233. // and claimed VGA resources, then we should only function as a
  234. // vga compatible driver (provide full screen support).
  235. //
  236. // We'll do the following:
  237. //
  238. // (1) We'll try to grab VGA resources exclusively.
  239. //
  240. // (2) If we get the resources then we are operating as the fall
  241. // back device. No other video drivers loaded. Keep resources.
  242. //
  243. // (3) If we do not get the resources exclusively, try to claim
  244. // them shared.
  245. //
  246. // (4) If we get the resources then we are loading to provide vga
  247. // full screen support. Free the resource so that we aren't
  248. // holding legacy resources (so system can sleep/undock/etc).
  249. //
  250. // (5) If we still couldn't get the resources, then fail to load!
  251. //
  252. for (i=0; i<NUM_VGA_ACCESS_RANGES; i++) {
  253. VgaAccessRange[i].RangeShareable = FALSE;
  254. }
  255. status = VideoPortVerifyAccessRanges(HwDeviceExtension,
  256. NumVgaAccessRanges,
  257. VgaAccessRange);
  258. if (status != NO_ERROR) {
  259. //
  260. // Deal with the fact that the ATI HACK doesn't work
  261. // if the device is on the other side of a PCI bridge.
  262. //
  263. NumVgaAccessRanges -= 2;
  264. status = VideoPortVerifyAccessRanges(HwDeviceExtension,
  265. NumVgaAccessRanges,
  266. VgaAccessRange);
  267. if (status != NO_ERROR) {
  268. //
  269. // We couldn't get the resource exclusively. Try to get
  270. // them shared.
  271. //
  272. for (i=0; i<NumVgaAccessRanges; i++) {
  273. VgaAccessRange[i].RangeShareable = TRUE;
  274. }
  275. status = VideoPortVerifyAccessRanges(HwDeviceExtension,
  276. NumVgaAccessRanges,
  277. VgaAccessRange);
  278. if (status == NO_ERROR) {
  279. //
  280. // We were able to get the resource shared so we must be
  281. // providing vga full screen support. Release our claim
  282. // on resources.
  283. //
  284. VideoPortVerifyAccessRanges(HwDeviceExtension,
  285. 0,
  286. NULL);
  287. return NO_ERROR;
  288. } else {
  289. //
  290. // If we haven't gotten the resources by now, that means we
  291. // couldn't get them shared. This means we can't load at all.
  292. //
  293. return status;
  294. }
  295. }
  296. }
  297. //
  298. // We got the resources exclusively which means we are acting
  299. // as a fall back driver. But lets claim the resources as
  300. // shared so that a PnP Driver that uses the resources can still
  301. // load.
  302. //
  303. for (i=0; i<NumVgaAccessRanges; i++) {
  304. VgaAccessRange[i].RangeShareable = TRUE;
  305. }
  306. status = VideoPortVerifyAccessRanges(HwDeviceExtension,
  307. NumVgaAccessRanges,
  308. VgaAccessRange);
  309. return status;
  310. }
  311. VP_STATUS
  312. VgaFindAdapter(
  313. PVOID HwDeviceExtension,
  314. PVOID HwContext,
  315. PWSTR ArgumentString,
  316. PVIDEO_PORT_CONFIG_INFO ConfigInfo,
  317. PUCHAR Again
  318. )
  319. /*++
  320. Routine Description:
  321. This routine is called to determine if the adapter for this driver
  322. is present in the system.
  323. If it is present, the function fills out some information describing
  324. the adapter.
  325. Arguments:
  326. HwDeviceExtension - Supplies the miniport driver's adapter storage. This
  327. storage is initialized to zero before this call.
  328. HwContext - Supplies the context value which was passed to
  329. VideoPortInitialize().
  330. ArgumentString - Supplies a NULL terminated ASCII string. This string
  331. originates from the user.
  332. ConfigInfo - Returns the configuration information structure which is
  333. filled by the miniport driver. This structure is initialized with
  334. any known configuration information (such as SystemIoBusNumber) by
  335. the port driver. Where possible, drivers should have one set of
  336. defaults which do not require any supplied configuration information.
  337. Again - Indicates if the miniport driver wants the port driver to call
  338. its VIDEO_HW_FIND_ADAPTER function again with a new device extension
  339. and the same config info. This is used by the miniport drivers which
  340. can search for several adapters on a bus.
  341. Return Value:
  342. This routine must return:
  343. NO_ERROR - Indicates a host adapter was found and the
  344. configuration information was successfully determined.
  345. ERROR_INVALID_PARAMETER - Indicates an adapter was found but there was an
  346. error obtaining the configuration information. If possible an error
  347. should be logged.
  348. ERROR_DEV_NOT_EXIST - Indicates no host adapter was found for the
  349. supplied configuration information.
  350. --*/
  351. {
  352. PHW_DEVICE_EXTENSION hwDeviceExtension = HwDeviceExtension;
  353. VP_STATUS status;
  354. //
  355. // Make sure the size of the structure is at least as large as what we
  356. // are expecting (check version of the config info structure).
  357. //
  358. if (ConfigInfo->Length < sizeof(VIDEO_PORT_CONFIG_INFO)) {
  359. return ERROR_INVALID_PARAMETER;
  360. }
  361. //
  362. // Make sure we only load one copy of the vga driver
  363. //
  364. if (VgaLoaded) {
  365. return ERROR_DEV_NOT_EXIST;
  366. }
  367. //
  368. // No interrupt information is necessary.
  369. //
  370. if (ConfigInfo->AdapterInterfaceType == Internal) {
  371. //
  372. // First check if there is a video adapter on the internal bus.
  373. // Exit right away if there is not.
  374. //
  375. if (NO_ERROR != VideoPortGetDeviceData(hwDeviceExtension,
  376. VpControllerData,
  377. &GetDeviceDataCallback,
  378. VgaAccessRange)) {
  379. VideoDebugPrint((2, "VGA: VideoPort get controller info failed\n"));
  380. return ERROR_INVALID_PARAMETER;
  381. }
  382. }
  383. status = VgaAcquireResources(hwDeviceExtension);
  384. if (status != NO_ERROR) {
  385. return status;
  386. }
  387. //
  388. // Get logical IO port addresses.
  389. //
  390. if ( (hwDeviceExtension->IOAddress =
  391. VideoPortGetDeviceBase(hwDeviceExtension,
  392. VgaAccessRange->RangeStart,
  393. VGA_MAX_IO_PORT - VGA_BASE_IO_PORT + 1,
  394. VgaAccessRange->RangeInIoSpace)) == NULL) {
  395. VideoDebugPrint((2, "VgaFindAdapter - Fail to get io address\n"));
  396. return ERROR_INVALID_PARAMETER;
  397. }
  398. //
  399. // Determine whether a VGA is present.
  400. //
  401. if (!VgaIsPresent(hwDeviceExtension)) {
  402. return ERROR_DEV_NOT_EXIST;
  403. }
  404. //
  405. // Pass a pointer to the emulator range we are using.
  406. //
  407. ConfigInfo->NumEmulatorAccessEntries = VGA_NUM_EMULATOR_ACCESS_ENTRIES;
  408. ConfigInfo->EmulatorAccessEntries = VgaEmulatorAccessEntries;
  409. ConfigInfo->EmulatorAccessEntriesContext = (ULONG_PTR) hwDeviceExtension;
  410. ConfigInfo->VdmPhysicalVideoMemoryAddress = VgaAccessRange[VGA_MEMORY].RangeStart;
  411. ConfigInfo->VdmPhysicalVideoMemoryLength = VgaAccessRange[VGA_MEMORY].RangeLength;
  412. //
  413. // Minimum size of the buffer required to store the hardware state
  414. // information returned by IOCTL_VIDEO_SAVE_HARDWARE_STATE.
  415. //
  416. ConfigInfo->HardwareStateSize = VGA_TOTAL_STATE_SIZE;
  417. //
  418. // Map the video memory into the system virtual address space so we can
  419. // clear it out and use it for save and restore.
  420. //
  421. if ( (hwDeviceExtension->VideoMemoryAddress =
  422. VideoPortGetDeviceBase(hwDeviceExtension,
  423. VgaAccessRange[VGA_MEMORY].RangeStart,
  424. VgaAccessRange[VGA_MEMORY].RangeLength, FALSE)) == NULL) {
  425. VideoDebugPrint((1, "VgaFindAdapter - Fail to get memory address\n"));
  426. return ERROR_INVALID_PARAMETER;
  427. }
  428. //
  429. // Indicate we do not wish to be called again for another initialization.
  430. //
  431. *Again = 0;
  432. //
  433. // Keep track of if we already got loaded, since we can be called back
  434. // for a secondary bus (some machines have 2 PCI buses).
  435. // If *we* acquired the resources, then we won't conflict with ourselves
  436. // since we grabbed the resources as shared.
  437. //
  438. VgaLoaded = 1;
  439. //
  440. // Indicate a successful completion status.
  441. //
  442. return NO_ERROR;
  443. } // VgaFindAdapter()
  444. BOOLEAN
  445. VgaInitialize(
  446. PVOID HwDeviceExtension
  447. )
  448. /*++
  449. Routine Description:
  450. This routine does one time initialization of the device.
  451. Arguments:
  452. HwDeviceExtension - Pointer to the miniport driver's adapter information.
  453. Return Value:
  454. None.
  455. --*/
  456. {
  457. PHW_DEVICE_EXTENSION hwDeviceExtension = HwDeviceExtension;
  458. //
  459. // set up the default cursor position and type.
  460. //
  461. hwDeviceExtension->CursorPosition.Column = 0;
  462. hwDeviceExtension->CursorPosition.Row = 0;
  463. hwDeviceExtension->CursorTopScanLine = 0;
  464. hwDeviceExtension->CursorBottomScanLine = 31;
  465. hwDeviceExtension->CursorEnable = TRUE;
  466. InitializeModeTable(hwDeviceExtension);
  467. return TRUE;
  468. } // VgaInitialize()
  469. BOOLEAN
  470. VgaStartIO(
  471. PVOID HwDeviceExtension,
  472. PVIDEO_REQUEST_PACKET RequestPacket
  473. )
  474. /*++
  475. Routine Description:
  476. This routine is the main execution routine for the miniport driver. It
  477. acceptss a Video Request Packet, performs the request, and then returns
  478. with the appropriate status.
  479. Arguments:
  480. HwDeviceExtension - Pointer to the miniport driver's adapter information.
  481. RequestPacket - Pointer to the video request packet. This structure
  482. contains all the parameters passed to the VideoIoControl function.
  483. Return Value:
  484. This routine will return error codes from the various support routines
  485. and will also return ERROR_INSUFFICIENT_BUFFER for incorrectly sized
  486. buffers and ERROR_INVALID_FUNCTION for unsupported functions.
  487. --*/
  488. {
  489. PHW_DEVICE_EXTENSION hwDeviceExtension = HwDeviceExtension;
  490. VP_STATUS status;
  491. VIDEO_MODE videoMode;
  492. PVIDEO_MEMORY_INFORMATION memoryInformation;
  493. ULONG inIoSpace;
  494. #if DBG
  495. //
  496. // Keep a history of the commands.
  497. // This will help track down the chip being in a DOS session while
  498. // GDI and the S3 display driver "think" it's in GUI mode.
  499. gaIOControlCode[giControlCode++] = RequestPacket->IoControlCode;
  500. giControlCode %= MAX_CONTROL_HISTORY;
  501. #endif
  502. //
  503. // Switch on the IoContolCode in the RequestPacket. It indicates which
  504. // function must be performed by the driver.
  505. //
  506. switch (RequestPacket->IoControlCode) {
  507. case IOCTL_VIDEO_MAP_VIDEO_MEMORY:
  508. VideoDebugPrint((2, "VgaStartIO - MapVideoMemory\n"));
  509. if ( (RequestPacket->OutputBufferLength <
  510. (RequestPacket->StatusBlock->Information =
  511. sizeof(VIDEO_MEMORY_INFORMATION))) ||
  512. (RequestPacket->InputBufferLength < sizeof(VIDEO_MEMORY)) ) {
  513. status = ERROR_INSUFFICIENT_BUFFER;
  514. }
  515. memoryInformation = RequestPacket->OutputBuffer;
  516. memoryInformation->VideoRamBase = ((PVIDEO_MEMORY)
  517. (RequestPacket->InputBuffer))->RequestedVirtualAddress;
  518. memoryInformation->VideoRamLength =
  519. hwDeviceExtension->PhysicalVideoMemoryLength;
  520. inIoSpace = 0;
  521. //
  522. // Let try to take advantage of write combining if using a VESA mode.
  523. //
  524. //if (IS_LINEAR_MODE(hwDeviceExtension->CurrentMode)) {
  525. // inIoSpace |= VIDEO_MEMORY_SPACE_P6CACHE;
  526. //}
  527. status = VideoPortMapMemory(hwDeviceExtension,
  528. hwDeviceExtension->PhysicalVideoMemoryBase,
  529. &(memoryInformation->VideoRamLength),
  530. &inIoSpace,
  531. &(memoryInformation->VideoRamBase));
  532. memoryInformation->FrameBufferBase =
  533. ((PUCHAR) (memoryInformation->VideoRamBase)) +
  534. hwDeviceExtension->PhysicalFrameBaseOffset.LowPart;
  535. memoryInformation->FrameBufferLength =
  536. hwDeviceExtension->PhysicalFrameLength;
  537. break;
  538. case IOCTL_VIDEO_UNMAP_VIDEO_MEMORY:
  539. VideoDebugPrint((2, "VgaStartIO - UnMapVideoMemory\n"));
  540. if (RequestPacket->InputBufferLength < sizeof(VIDEO_MEMORY)) {
  541. status = ERROR_INSUFFICIENT_BUFFER;
  542. }
  543. status = VideoPortUnmapMemory(hwDeviceExtension,
  544. ((PVIDEO_MEMORY)
  545. (RequestPacket->InputBuffer))->
  546. RequestedVirtualAddress,
  547. 0);
  548. break;
  549. case IOCTL_VIDEO_QUERY_AVAIL_MODES:
  550. VideoDebugPrint((2, "VgaStartIO - QueryAvailableModes\n"));
  551. RequestPacket->StatusBlock->Information = 0;
  552. status = VgaQueryAvailableModes(hwDeviceExtension,
  553. (PVIDEO_MODE_INFORMATION)
  554. RequestPacket->OutputBuffer,
  555. RequestPacket->OutputBufferLength,
  556. (PULONG)(&RequestPacket->StatusBlock->Information));
  557. break;
  558. case IOCTL_VIDEO_QUERY_NUM_AVAIL_MODES:
  559. VideoDebugPrint((2, "VgaStartIO - QueryNumAvailableModes\n"));
  560. RequestPacket->StatusBlock->Information = 0;
  561. status = VgaQueryNumberOfAvailableModes(hwDeviceExtension,
  562. (PVIDEO_NUM_MODES)
  563. RequestPacket->OutputBuffer,
  564. RequestPacket->OutputBufferLength,
  565. (PULONG)(&RequestPacket->StatusBlock->Information));
  566. break;
  567. case IOCTL_VIDEO_QUERY_CURRENT_MODE:
  568. VideoDebugPrint((2, "VgaStartIO - QueryCurrentMode\n"));
  569. RequestPacket->StatusBlock->Information = 0;
  570. status = VgaQueryCurrentMode(hwDeviceExtension,
  571. (PVIDEO_MODE_INFORMATION) RequestPacket->OutputBuffer,
  572. RequestPacket->OutputBufferLength,
  573. (PULONG)(&RequestPacket->StatusBlock->Information));
  574. break;
  575. case IOCTL_VIDEO_SET_CURRENT_MODE:
  576. VideoDebugPrint((2, "VgaStartIO - SetCurrentModes\n"));
  577. {
  578. ULONG FrameBufferIsMoved = 0;
  579. status = VgaSetMode(hwDeviceExtension,
  580. (PVIDEO_MODE) RequestPacket->InputBuffer,
  581. RequestPacket->InputBufferLength,
  582. &FrameBufferIsMoved);
  583. if (RequestPacket->OutputBufferLength >= sizeof(ULONG)) {
  584. RequestPacket->StatusBlock->Information = sizeof(ULONG);
  585. *(PULONG)RequestPacket->OutputBuffer = FrameBufferIsMoved;
  586. }
  587. }
  588. break;
  589. case IOCTL_VIDEO_RESET_DEVICE:
  590. VideoDebugPrint((2, "VgaStartIO - Reset Device\n"));
  591. videoMode.RequestedMode = DEFAULT_MODE;
  592. {
  593. ULONG FrameBufferIsMoved = 0;
  594. status = VgaSetMode(hwDeviceExtension,
  595. (PVIDEO_MODE) &videoMode,
  596. sizeof(videoMode),
  597. &FrameBufferIsMoved);
  598. }
  599. break;
  600. case IOCTL_VIDEO_LOAD_AND_SET_FONT:
  601. VideoDebugPrint((2, "VgaStartIO - LoadAndSetFont\n"));
  602. status = VgaLoadAndSetFont(hwDeviceExtension,
  603. (PVIDEO_LOAD_FONT_INFORMATION) RequestPacket->InputBuffer,
  604. RequestPacket->InputBufferLength);
  605. break;
  606. case IOCTL_VIDEO_QUERY_CURSOR_POSITION:
  607. VideoDebugPrint((2, "VgaStartIO - QueryCursorPosition\n"));
  608. RequestPacket->StatusBlock->Information = 0;
  609. status = VgaQueryCursorPosition(hwDeviceExtension,
  610. (PVIDEO_CURSOR_POSITION) RequestPacket->OutputBuffer,
  611. RequestPacket->OutputBufferLength,
  612. (PULONG)(&RequestPacket->StatusBlock->Information));
  613. break;
  614. case IOCTL_VIDEO_SET_CURSOR_POSITION:
  615. VideoDebugPrint((2, "VgaStartIO - SetCursorPosition\n"));
  616. status = VgaSetCursorPosition(hwDeviceExtension,
  617. (PVIDEO_CURSOR_POSITION)
  618. RequestPacket->InputBuffer,
  619. RequestPacket->InputBufferLength);
  620. break;
  621. case IOCTL_VIDEO_QUERY_CURSOR_ATTR:
  622. VideoDebugPrint((2, "VgaStartIO - QueryCursorAttributes\n"));
  623. RequestPacket->StatusBlock->Information = 0;
  624. status = VgaQueryCursorAttributes(hwDeviceExtension,
  625. (PVIDEO_CURSOR_ATTRIBUTES) RequestPacket->OutputBuffer,
  626. RequestPacket->OutputBufferLength,
  627. (PULONG)(&RequestPacket->StatusBlock->Information));
  628. break;
  629. case IOCTL_VIDEO_SET_CURSOR_ATTR:
  630. VideoDebugPrint((2, "VgaStartIO - SetCursorAttributes\n"));
  631. status = VgaSetCursorAttributes(hwDeviceExtension,
  632. (PVIDEO_CURSOR_ATTRIBUTES) RequestPacket->InputBuffer,
  633. RequestPacket->InputBufferLength);
  634. break;
  635. case IOCTL_VIDEO_SET_PALETTE_REGISTERS:
  636. VideoDebugPrint((2, "VgaStartIO - SetPaletteRegs\n"));
  637. status = VgaSetPaletteReg(hwDeviceExtension,
  638. (PVIDEO_PALETTE_DATA) RequestPacket->InputBuffer,
  639. RequestPacket->InputBufferLength);
  640. break;
  641. case IOCTL_VIDEO_SET_COLOR_REGISTERS:
  642. VideoDebugPrint((2, "VgaStartIO - SetColorRegs\n"));
  643. status = VgaSetColorLookup(hwDeviceExtension,
  644. (PVIDEO_CLUT) RequestPacket->InputBuffer,
  645. RequestPacket->InputBufferLength);
  646. break;
  647. case IOCTL_VIDEO_ENABLE_VDM:
  648. VideoDebugPrint((2, "VgaStartIO - EnableVDM\n"));
  649. hwDeviceExtension->TrappedValidatorCount = 0;
  650. hwDeviceExtension->SequencerAddressValue = 0;
  651. hwDeviceExtension->CurrentNumVdmAccessRanges =
  652. NUM_MINIMAL_VGA_VALIDATOR_ACCESS_RANGE;
  653. hwDeviceExtension->CurrentVdmAccessRange =
  654. MinimalVgaValidatorAccessRange;
  655. VideoPortSetTrappedEmulatorPorts(hwDeviceExtension,
  656. hwDeviceExtension->CurrentNumVdmAccessRanges,
  657. hwDeviceExtension->CurrentVdmAccessRange);
  658. status = NO_ERROR;
  659. break;
  660. case IOCTL_VIDEO_RESTORE_HARDWARE_STATE:
  661. VideoDebugPrint((2, "VgaStartIO - RestoreHardwareState\n"));
  662. if(IsSavedModeVesa((PVIDEO_HARDWARE_STATE) RequestPacket->InputBuffer)){
  663. status = VesaRestoreHardwareState(hwDeviceExtension,
  664. (PVIDEO_HARDWARE_STATE) RequestPacket->InputBuffer,
  665. RequestPacket->InputBufferLength);
  666. } else {
  667. status = VgaRestoreHardwareState(hwDeviceExtension,
  668. (PVIDEO_HARDWARE_STATE) RequestPacket->InputBuffer,
  669. RequestPacket->InputBufferLength);
  670. }
  671. break;
  672. case IOCTL_VIDEO_SAVE_HARDWARE_STATE:
  673. VideoDebugPrint((2, "VgaStartIO - SaveHardwareState\n"));
  674. RequestPacket->StatusBlock->Information = 0;
  675. {
  676. USHORT ModeNumber;
  677. ModeNumber = VBEGetMode(hwDeviceExtension);
  678. if (ModeNumber & 0x100) {
  679. status = VesaSaveHardwareState(hwDeviceExtension,
  680. (PVIDEO_HARDWARE_STATE) RequestPacket->OutputBuffer,
  681. RequestPacket->OutputBufferLength,
  682. ModeNumber);
  683. } else {
  684. status = VgaSaveHardwareState(hwDeviceExtension,
  685. (PVIDEO_HARDWARE_STATE) RequestPacket->OutputBuffer,
  686. RequestPacket->OutputBufferLength,
  687. (PULONG)(&RequestPacket->StatusBlock->Information));
  688. }
  689. }
  690. break;
  691. case IOCTL_VIDEO_GET_BANK_SELECT_CODE:
  692. VideoDebugPrint((2, "VgaStartIO - GetBankSelectCode\n"));
  693. RequestPacket->StatusBlock->Information = 0;
  694. status = VgaGetBankSelectCode(hwDeviceExtension,
  695. (PVIDEO_BANK_SELECT) RequestPacket->OutputBuffer,
  696. RequestPacket->OutputBufferLength,
  697. (PULONG)(&RequestPacket->StatusBlock->Information));
  698. break;
  699. case IOCTL_VIDEO_QUERY_PUBLIC_ACCESS_RANGES:
  700. VideoDebugPrint((2, "VgaStartIO - Query Public Address Ranges\n"));
  701. if (RequestPacket->OutputBufferLength <
  702. (RequestPacket->StatusBlock->Information =
  703. sizeof(VIDEO_PUBLIC_ACCESS_RANGES)) )
  704. {
  705. status = ERROR_INSUFFICIENT_BUFFER;
  706. }
  707. else
  708. {
  709. PVIDEO_PUBLIC_ACCESS_RANGES publicAccessRanges;
  710. PHYSICAL_ADDRESS PhysicalRegisterAddress;
  711. ULONG RegisterLength;
  712. PVOID MappedAddress;
  713. publicAccessRanges = RequestPacket->OutputBuffer;
  714. PhysicalRegisterAddress.LowPart = VGA_END_BREAK_PORT;
  715. PhysicalRegisterAddress.HighPart = 0;
  716. RegisterLength = VGA_MAX_IO_PORT - VGA_END_BREAK_PORT;
  717. publicAccessRanges->InIoSpace = TRUE;
  718. MappedAddress = NULL;
  719. status = VideoPortMapMemory(
  720. HwDeviceExtension,
  721. PhysicalRegisterAddress,
  722. &RegisterLength,
  723. &(publicAccessRanges->InIoSpace),
  724. &MappedAddress
  725. );
  726. publicAccessRanges->VirtualAddress = (PVOID)((ULONG_PTR)MappedAddress - VGA_END_BREAK_PORT);
  727. }
  728. break;
  729. case IOCTL_VIDEO_FREE_PUBLIC_ACCESS_RANGES:
  730. VideoDebugPrint((2, "VgaStartIO - Free Public Address Ranges\n"));
  731. if (RequestPacket->InputBufferLength < sizeof(VIDEO_MEMORY))
  732. {
  733. status = ERROR_INSUFFICIENT_BUFFER;
  734. }
  735. else
  736. {
  737. PVIDEO_MEMORY mappedMemory;
  738. mappedMemory = RequestPacket->InputBuffer;
  739. status = VideoPortUnmapMemory(
  740. HwDeviceExtension,
  741. (PVOID)((ULONG_PTR)(mappedMemory->RequestedVirtualAddress)
  742. + VGA_END_BREAK_PORT),
  743. 0);
  744. }
  745. break;
  746. case IOCTL_VIDEO_SET_BANK_POSITION:
  747. VideoDebugPrint((2, "VgaStartIO - Set Bank Position\n"));
  748. if (RequestPacket->InputBufferLength < sizeof(BANK_POSITION)) {
  749. status = ERROR_INSUFFICIENT_BUFFER;
  750. } else {
  751. PBANK_POSITION BankPosition;
  752. BankPosition = RequestPacket->InputBuffer;
  753. status = VgaSetBankPosition(
  754. HwDeviceExtension,
  755. BankPosition);
  756. }
  757. break;
  758. //
  759. // if we get here, an invalid IoControlCode was specified.
  760. //
  761. default:
  762. VideoDebugPrint((1, "Fell through vga startIO routine - invalid command\n"));
  763. status = ERROR_INVALID_FUNCTION;
  764. break;
  765. }
  766. #if DBG
  767. //
  768. // Keep a history of the commands.
  769. // This will help track down the chip being in a DOS session while
  770. // GDI and the S3 display driver "think" it's in GUI mode.
  771. gaIOControlCode[giControlCode++] = 0x00005555;
  772. giControlCode %= MAX_CONTROL_HISTORY;
  773. #endif
  774. RequestPacket->StatusBlock->Status = status;
  775. return TRUE;
  776. } // VgaStartIO()
  777. //
  778. // private routines
  779. //
  780. VP_STATUS
  781. VgaLoadAndSetFont(
  782. PHW_DEVICE_EXTENSION HwDeviceExtension,
  783. PVIDEO_LOAD_FONT_INFORMATION FontInformation,
  784. ULONG FontInformationSize
  785. )
  786. /*++
  787. Routine Description:
  788. Takes a buffer containing a user-defined font and loads it into the
  789. VGA soft font memory and programs the VGA to the appropriate character
  790. cell size.
  791. Arguments:
  792. HwDeviceExtension - Pointer to the miniport driver's device extension.
  793. FontInformation - Pointer to the structure containing the information
  794. about the loadable ROM font to be set.
  795. FontInformationSize - Length of the input buffer supplied by the user.
  796. Return Value:
  797. NO_ERROR - information returned successfully
  798. ERROR_INSUFFICIENT_BUFFER - input buffer not large enough for input data.
  799. ERROR_INVALID_PARAMETER - invalid video mode
  800. --*/
  801. {
  802. PUCHAR destination;
  803. PUCHAR source;
  804. USHORT width;
  805. ULONG i;
  806. UCHAR cr9;
  807. //
  808. // check if a mode has been set
  809. //
  810. if (HwDeviceExtension->CurrentMode == NULL) {
  811. return ERROR_INVALID_FUNCTION;
  812. }
  813. //
  814. // Text mode only; If we are in a graphics mode, return an error
  815. //
  816. if (HwDeviceExtension->CurrentMode->fbType & VIDEO_MODE_GRAPHICS) {
  817. return ERROR_INVALID_PARAMETER;
  818. }
  819. //
  820. // Check if the size of the data in the input buffer is large enough
  821. // and that it contains all the data.
  822. //
  823. if ( (FontInformationSize < sizeof(VIDEO_LOAD_FONT_INFORMATION)) ||
  824. (FontInformationSize < sizeof(VIDEO_LOAD_FONT_INFORMATION) +
  825. sizeof(UCHAR) * (FontInformation->FontSize - 1)) ) {
  826. return ERROR_INSUFFICIENT_BUFFER;
  827. }
  828. //
  829. // Check for the width and height of the font
  830. //
  831. if ( ((FontInformation->WidthInPixels != 8) &&
  832. (FontInformation->WidthInPixels != 9)) ||
  833. (FontInformation->HeightInPixels > 32) ) {
  834. return ERROR_INVALID_PARAMETER;
  835. }
  836. //
  837. // Check the size of the font buffer is the right size for the size
  838. // font being passed down.
  839. //
  840. if (FontInformation->FontSize < FontInformation->HeightInPixels * 256 *
  841. sizeof(UCHAR) ) {
  842. return ERROR_INSUFFICIENT_BUFFER;
  843. }
  844. //
  845. // Since the font parameters are valid, store the parameters in the
  846. // device extension and load the font.
  847. //
  848. HwDeviceExtension->FontPelRows = FontInformation->HeightInPixels;
  849. HwDeviceExtension->FontPelColumns = FontInformation->WidthInPixels;
  850. HwDeviceExtension->CurrentMode->row =
  851. HwDeviceExtension->CurrentMode->vres / HwDeviceExtension->FontPelRows;
  852. width =
  853. HwDeviceExtension->CurrentMode->hres / HwDeviceExtension->FontPelColumns;
  854. if (width < (USHORT)HwDeviceExtension->CurrentMode->col) {
  855. HwDeviceExtension->CurrentMode->col = width;
  856. }
  857. source = &(FontInformation->Font[0]);
  858. //
  859. // Set up the destination and source pointers for the font
  860. //
  861. destination = (PUCHAR)HwDeviceExtension->VideoMemoryAddress;
  862. //
  863. // Map font buffer at A0000
  864. //
  865. VgaInterpretCmdStream(HwDeviceExtension, EnableA000Data);
  866. //
  867. // Move the font to its destination
  868. //
  869. for (i = 1; i <= 256; i++) {
  870. VideoPortWriteRegisterBufferUchar(destination,
  871. source,
  872. FontInformation->HeightInPixels);
  873. destination += 32;
  874. source += FontInformation->HeightInPixels;
  875. }
  876. VgaInterpretCmdStream(HwDeviceExtension, DisableA000Color);
  877. //
  878. // Restore to a text mode.
  879. //
  880. //
  881. // Set Height of font.
  882. //
  883. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  884. CRTC_ADDRESS_PORT_COLOR, 0x9);
  885. cr9 = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  886. CRTC_DATA_PORT_COLOR) & 0xE0;
  887. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  888. CRTC_DATA_PORT_COLOR,
  889. (UCHAR)(cr9 | (FontInformation->HeightInPixels - 1)));
  890. //
  891. // Set Width of font.
  892. //
  893. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  894. CRTC_ADDRESS_PORT_COLOR, 0x12);
  895. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  896. CRTC_DATA_PORT_COLOR,
  897. (UCHAR)(((USHORT)FontInformation->HeightInPixels *
  898. (USHORT)HwDeviceExtension->CurrentMode->row) - 1));
  899. i = HwDeviceExtension->CurrentMode->vres /
  900. HwDeviceExtension->CurrentMode->row;
  901. //
  902. // Set Cursor End
  903. //
  904. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  905. CRTC_ADDRESS_PORT_COLOR, 0xb);
  906. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  907. CRTC_DATA_PORT_COLOR, (UCHAR)--i);
  908. //
  909. // Set Cursor Statr
  910. //
  911. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  912. CRTC_ADDRESS_PORT_COLOR, 0xa);
  913. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  914. CRTC_DATA_PORT_COLOR, (UCHAR)--i);
  915. return NO_ERROR;
  916. } //end VgaLoadAndSetFont()
  917. VP_STATUS
  918. VgaQueryCursorPosition(
  919. PHW_DEVICE_EXTENSION HwDeviceExtension,
  920. PVIDEO_CURSOR_POSITION CursorPosition,
  921. ULONG CursorPositionSize,
  922. PULONG OutputSize
  923. )
  924. /*++
  925. Routine Description:
  926. This routine returns the row and column of the cursor.
  927. Arguments:
  928. HwDeviceExtension - Pointer to the miniport driver's device extension.
  929. CursorPosition - Pointer to the output buffer supplied by the user. This
  930. is where the cursor position is stored.
  931. CursorPositionSize - Length of the output buffer supplied by the user.
  932. OutputSize - Pointer to a buffer in which to return the actual size of
  933. the data in the buffer. If the buffer was not large enough, this
  934. contains the minimum required buffer size.
  935. Return Value:
  936. NO_ERROR - information returned successfully
  937. ERROR_INSUFFICIENT_BUFFER - output buffer not large enough to return
  938. any useful data
  939. ERROR_INVALID_PARAMETER - invalid video mode
  940. --*/
  941. {
  942. //
  943. // check if a mode has been set
  944. //
  945. if (HwDeviceExtension->CurrentMode == NULL) {
  946. return ERROR_INVALID_FUNCTION;
  947. }
  948. //
  949. // Text mode only; If we are in a graphics mode, return an error
  950. //
  951. if (HwDeviceExtension->CurrentMode->fbType & VIDEO_MODE_GRAPHICS) {
  952. *OutputSize = 0;
  953. return ERROR_INVALID_PARAMETER;
  954. }
  955. //
  956. // If the buffer passed in is not large enough return an
  957. // appropriate error code.
  958. //
  959. if (CursorPositionSize < (*OutputSize = sizeof(VIDEO_CURSOR_POSITION)) ) {
  960. *OutputSize = 0;
  961. return ERROR_INSUFFICIENT_BUFFER;
  962. }
  963. //
  964. // Store the postition of the cursor into the buffer.
  965. //
  966. CursorPosition->Column = HwDeviceExtension->CursorPosition.Column;
  967. CursorPosition->Row = HwDeviceExtension->CursorPosition.Row;
  968. return NO_ERROR;
  969. } // end VgaQueryCursorPosition()
  970. VP_STATUS
  971. VgaSetCursorPosition(
  972. PHW_DEVICE_EXTENSION HwDeviceExtension,
  973. PVIDEO_CURSOR_POSITION CursorPosition,
  974. ULONG CursorPositionSize
  975. )
  976. /*++
  977. Routine Description:
  978. This routine verifies that the requested cursor position is within
  979. the row and column bounds of the current mode and font. If valid, then
  980. it sets the row and column of the cursor.
  981. Arguments:
  982. HwDeviceExtension - Pointer to the miniport driver's device extension.
  983. CursorPosition - Pointer to the structure containing the cursor position.
  984. CursorPositionSize - Length of the input buffer supplied by the user.
  985. Return Value:
  986. NO_ERROR - information returned successfully
  987. ERROR_INSUFFICIENT_BUFFER - input buffer not large enough for input data
  988. ERROR_INVALID_PARAMETER - invalid video mode
  989. --*/
  990. {
  991. USHORT position;
  992. //
  993. // check if a mode has been set
  994. //
  995. if (HwDeviceExtension->CurrentMode == NULL) {
  996. return ERROR_INVALID_FUNCTION;
  997. }
  998. //
  999. // Text mode only; If we are in a graphics mode, return an error
  1000. //
  1001. if (HwDeviceExtension->CurrentMode->fbType & VIDEO_MODE_GRAPHICS) {
  1002. return ERROR_INVALID_PARAMETER;
  1003. }
  1004. //
  1005. // Check if the size of the data in the input buffer is large enough.
  1006. //
  1007. if (CursorPositionSize < sizeof(VIDEO_CURSOR_POSITION)) {
  1008. return ERROR_INSUFFICIENT_BUFFER;
  1009. }
  1010. //
  1011. // Check if the new values for the cursor positions are in the valid
  1012. // bounds for the screen.
  1013. //
  1014. if ((CursorPosition->Column >= HwDeviceExtension->CurrentMode->col) ||
  1015. (CursorPosition->Row >= HwDeviceExtension->CurrentMode->row)) {
  1016. return ERROR_INVALID_PARAMETER;
  1017. }
  1018. //
  1019. // Store these new values in the device extension so we can use them in
  1020. // a QUERY.
  1021. //
  1022. HwDeviceExtension->CursorPosition.Column = CursorPosition->Column;
  1023. HwDeviceExtension->CursorPosition.Row = CursorPosition->Row;
  1024. //
  1025. // Calculate the position on the screen at which the cursor must be
  1026. // be displayed
  1027. //
  1028. position = (USHORT) (HwDeviceExtension->CurrentMode->col *
  1029. CursorPosition->Row + CursorPosition->Column);
  1030. //
  1031. // Address Cursor Location Low Register in CRT Controller Registers
  1032. //
  1033. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1034. CRTC_ADDRESS_PORT_COLOR, IND_CURSOR_LOW_LOC);
  1035. //
  1036. // Set Cursor Location Low Register
  1037. //
  1038. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1039. CRTC_DATA_PORT_COLOR, (UCHAR) (position & 0x00FF));
  1040. //
  1041. // Address Cursor Location High Register in CRT Controller Registers
  1042. //
  1043. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1044. CRTC_ADDRESS_PORT_COLOR, IND_CURSOR_HIGH_LOC);
  1045. //
  1046. // Set Cursor Location High Register
  1047. //
  1048. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1049. CRTC_DATA_PORT_COLOR, (UCHAR) (position >> 8));
  1050. return NO_ERROR;
  1051. } // end VgaSetCursorPosition()
  1052. VP_STATUS
  1053. VgaQueryCursorAttributes(
  1054. PHW_DEVICE_EXTENSION HwDeviceExtension,
  1055. PVIDEO_CURSOR_ATTRIBUTES CursorAttributes,
  1056. ULONG CursorAttributesSize,
  1057. PULONG OutputSize
  1058. )
  1059. /*++
  1060. Routine Description:
  1061. This routine returns information about the height and visibility of the
  1062. cursor.
  1063. Arguments:
  1064. HwDeviceExtension - Pointer to the miniport driver's device extension.
  1065. CursorAttributes - Pointer to the output buffer supplied by the user.
  1066. This is where the cursor type is stored.
  1067. CursorAttributesSize - Length of the output buffer supplied by the user.
  1068. OutputSize - Pointer to a buffer in which to return the actual size of
  1069. the data in the buffer. If the buffer was not large enough, this
  1070. contains the minimum required buffer size.
  1071. Return Value:
  1072. NO_ERROR - information returned successfully
  1073. ERROR_INSUFFICIENT_BUFFER - output buffer not large enough to return
  1074. any useful data
  1075. ERROR_INVALID_PARAMETER - invalid video mode
  1076. --*/
  1077. {
  1078. //
  1079. // check if a mode has been set
  1080. //
  1081. if (HwDeviceExtension->CurrentMode == NULL) {
  1082. return ERROR_INVALID_FUNCTION;
  1083. }
  1084. //
  1085. // Text mode only; If we are in a graphics mode, return an error
  1086. //
  1087. if (HwDeviceExtension->CurrentMode->fbType & VIDEO_MODE_GRAPHICS) {
  1088. *OutputSize = 0;
  1089. return ERROR_INVALID_PARAMETER;
  1090. }
  1091. //
  1092. // Find out the size of the data to be put in the the buffer and return
  1093. // that in the status information (whether or not the information is
  1094. // there). If the buffer passed in is not large enough return an
  1095. // appropriate error code.
  1096. //
  1097. if (CursorAttributesSize < (*OutputSize =
  1098. sizeof(VIDEO_CURSOR_ATTRIBUTES)) ) {
  1099. *OutputSize = 0;
  1100. return ERROR_INSUFFICIENT_BUFFER;
  1101. }
  1102. //
  1103. // Store the cursor information into the buffer.
  1104. //
  1105. CursorAttributes->Height = (USHORT) HwDeviceExtension->CursorTopScanLine;
  1106. CursorAttributes->Width = (USHORT) HwDeviceExtension->CursorBottomScanLine;
  1107. CursorAttributes->Enable = HwDeviceExtension->CursorEnable;
  1108. return NO_ERROR;
  1109. } // end VgaQueryCursorAttributes()
  1110. VP_STATUS
  1111. VgaSetCursorAttributes(
  1112. PHW_DEVICE_EXTENSION HwDeviceExtension,
  1113. PVIDEO_CURSOR_ATTRIBUTES CursorAttributes,
  1114. ULONG CursorAttributesSize
  1115. )
  1116. /*++
  1117. Routine Description:
  1118. This routine verifies that the requested cursor height is within the
  1119. bounds of the character cell. If valid, then it sets the new
  1120. visibility and height of the cursor.
  1121. Arguments:
  1122. HwDeviceExtension - Pointer to the miniport driver's device extension.
  1123. CursorType - Pointer to the structure containing the cursor information.
  1124. CursorTypeSize - Length of the input buffer supplied by the user.
  1125. Return Value:
  1126. NO_ERROR - information returned successfully
  1127. ERROR_INSUFFICIENT_BUFFER - input buffer not large enough for input data
  1128. ERROR_INVALID_PARAMETER - invalid video mode
  1129. --*/
  1130. {
  1131. UCHAR cursorLine;
  1132. //
  1133. // check if a mode has been set
  1134. //
  1135. if (HwDeviceExtension->CurrentMode == NULL) {
  1136. return ERROR_INVALID_FUNCTION;
  1137. }
  1138. //
  1139. // Text mode only; If we are in a graphics mode, return an error
  1140. //
  1141. if (HwDeviceExtension->CurrentMode->fbType & VIDEO_MODE_GRAPHICS) {
  1142. return ERROR_INVALID_PARAMETER;
  1143. }
  1144. //
  1145. // Check if the size of the data in the input buffer is large enough.
  1146. //
  1147. if (CursorAttributesSize < sizeof(VIDEO_CURSOR_ATTRIBUTES)) {
  1148. return ERROR_INSUFFICIENT_BUFFER;
  1149. }
  1150. //
  1151. // Check if the new values for the cursor type are in the valid range.
  1152. //
  1153. if ((CursorAttributes->Height >= HwDeviceExtension->FontPelRows) ||
  1154. (CursorAttributes->Width > 31)) {
  1155. return ERROR_INVALID_PARAMETER;
  1156. }
  1157. //
  1158. // Store the cursor information in the device extension so we can use
  1159. // them in a QUERY.
  1160. //
  1161. HwDeviceExtension->CursorTopScanLine = (UCHAR) CursorAttributes->Height;
  1162. HwDeviceExtension->CursorBottomScanLine = (UCHAR) CursorAttributes->Width;
  1163. HwDeviceExtension->CursorEnable = CursorAttributes->Enable;
  1164. //
  1165. // Address Cursor Start Register in CRT Controller Registers
  1166. //
  1167. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1168. CRTC_ADDRESS_PORT_COLOR,
  1169. IND_CURSOR_START);
  1170. //
  1171. // Set Cursor Start Register by writting to CRTCtl Data Register
  1172. // Preserve the high three bits of this register.
  1173. //
  1174. // Only the Five low bits are used for the cursor height.
  1175. // Bit 5 is cursor enable, bit 6 and 7 preserved.
  1176. //
  1177. cursorLine = (UCHAR) CursorAttributes->Height & 0x1F;
  1178. cursorLine |= VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1179. CRTC_DATA_PORT_COLOR) & 0xC0;
  1180. if (!CursorAttributes->Enable) {
  1181. cursorLine |= 0x20; // Flip cursor off bit
  1182. }
  1183. VideoPortWritePortUchar(HwDeviceExtension->IOAddress + CRTC_DATA_PORT_COLOR,
  1184. cursorLine);
  1185. //
  1186. // Address Cursor End Register in CRT Controller Registers
  1187. //
  1188. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1189. CRTC_ADDRESS_PORT_COLOR,
  1190. IND_CURSOR_END);
  1191. //
  1192. // Set Cursor End Register. Preserve the high three bits of this
  1193. // register.
  1194. //
  1195. cursorLine =
  1196. (CursorAttributes->Width < (USHORT)(HwDeviceExtension->FontPelRows - 1)) ?
  1197. CursorAttributes->Width : (HwDeviceExtension->FontPelRows - 1);
  1198. cursorLine &= 0x1f;
  1199. cursorLine |= VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1200. CRTC_DATA_PORT_COLOR) & 0xE0;
  1201. VideoPortWritePortUchar(HwDeviceExtension->IOAddress + CRTC_DATA_PORT_COLOR,
  1202. cursorLine);
  1203. return NO_ERROR;
  1204. } // end VgaSetCursorAttributes()
  1205. BOOLEAN
  1206. VgaIsPresent(
  1207. PHW_DEVICE_EXTENSION HwDeviceExtension
  1208. )
  1209. /*++
  1210. Routine Description:
  1211. This routine returns TRUE if a VGA is present. Determining whether a VGA
  1212. is present is a two-step process. First, this routine walks bits through
  1213. the Bit Mask register, to establish that there are readable indexed
  1214. registers (EGAs normally don't have readable registers, and other adapters
  1215. are unlikely to have indexed registers). This test is done first because
  1216. it's a non-destructive EGA rejection test (correctly rejects EGAs, but
  1217. doesn't potentially mess up the screen or the accessibility of display
  1218. memory). Normally, this would be an adequate test, but some EGAs have
  1219. readable registers, so next, we check for the existence of the Chain4 bit
  1220. in the Memory Mode register; this bit doesn't exist in EGAs. It's
  1221. conceivable that there are EGAs with readable registers and a register bit
  1222. where Chain4 is stored, although I don't know of any; if a better test yet
  1223. is needed, memory could be written to in Chain4 mode, and then examined
  1224. plane by plane in non-Chain4 mode to make sure the Chain4 bit did what it's
  1225. supposed to do. However, the current test should be adequate to eliminate
  1226. just about all EGAs, and 100% of everything else.
  1227. If this function fails to find a VGA, it attempts to undo any damage it
  1228. may have inadvertently done while testing. The underlying assumption for
  1229. the damage control is that if there's any non-VGA adapter at the tested
  1230. ports, it's an EGA or an enhanced EGA, because: a) I don't know of any
  1231. other adapters that use 3C4/5 or 3CE/F, and b), if there are other
  1232. adapters, I certainly don't know how to restore their original states. So
  1233. all error recovery is oriented toward putting an EGA back in a writable
  1234. state, so that error messages are visible. The EGA's state on entry is
  1235. assumed to be text mode, so the Memory Mode register is restored to the
  1236. default state for text mode.
  1237. If a VGA is found, the VGA is returned to its original state after
  1238. testing is finished.
  1239. Arguments:
  1240. None.
  1241. Return Value:
  1242. TRUE if a VGA is present, FALSE if not.
  1243. --*/
  1244. {
  1245. UCHAR originalGCAddr;
  1246. UCHAR originalSCAddr;
  1247. UCHAR originalBitMask;
  1248. UCHAR originalReadMap;
  1249. UCHAR originalMemoryMode;
  1250. UCHAR testMask;
  1251. BOOLEAN returnStatus;
  1252. //
  1253. // Remember the original state of the Graphics Controller Address register.
  1254. //
  1255. originalGCAddr = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1256. GRAPH_ADDRESS_PORT);
  1257. //
  1258. // Write the Read Map register with a known state so we can verify
  1259. // that it isn't changed after we fool with the Bit Mask. This ensures
  1260. // that we're dealing with indexed registers, since both the Read Map and
  1261. // the Bit Mask are addressed at GRAPH_DATA_PORT.
  1262. //
  1263. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1264. GRAPH_ADDRESS_PORT, IND_READ_MAP);
  1265. //
  1266. // If we can't read back the Graphics Address register setting we just
  1267. // performed, it's not readable and this isn't a VGA.
  1268. //
  1269. if ((VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1270. GRAPH_ADDRESS_PORT) & GRAPH_ADDR_MASK) != IND_READ_MAP) {
  1271. return FALSE;
  1272. }
  1273. //
  1274. // Set the Read Map register to a known state.
  1275. //
  1276. originalReadMap = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1277. GRAPH_DATA_PORT);
  1278. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1279. GRAPH_DATA_PORT, READ_MAP_TEST_SETTING);
  1280. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1281. GRAPH_DATA_PORT) != READ_MAP_TEST_SETTING) {
  1282. //
  1283. // The Read Map setting we just performed can't be read back; not a
  1284. // VGA. Restore the default Read Map state.
  1285. //
  1286. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1287. GRAPH_DATA_PORT, READ_MAP_DEFAULT);
  1288. return FALSE;
  1289. }
  1290. //
  1291. // Remember the original setting of the Bit Mask register.
  1292. //
  1293. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1294. GRAPH_ADDRESS_PORT, IND_BIT_MASK);
  1295. if ((VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1296. GRAPH_ADDRESS_PORT) & GRAPH_ADDR_MASK) != IND_BIT_MASK) {
  1297. //
  1298. // The Graphics Address register setting we just made can't be read
  1299. // back; not a VGA. Restore the default Read Map state.
  1300. //
  1301. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1302. GRAPH_ADDRESS_PORT, IND_READ_MAP);
  1303. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1304. GRAPH_DATA_PORT, READ_MAP_DEFAULT);
  1305. return FALSE;
  1306. }
  1307. originalBitMask = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1308. GRAPH_DATA_PORT);
  1309. //
  1310. // Set up the initial test mask we'll write to and read from the Bit Mask.
  1311. //
  1312. testMask = 0xBB;
  1313. do {
  1314. //
  1315. // Write the test mask to the Bit Mask.
  1316. //
  1317. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1318. GRAPH_DATA_PORT, testMask);
  1319. //
  1320. // Make sure the Bit Mask remembered the value.
  1321. //
  1322. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1323. GRAPH_DATA_PORT) != testMask) {
  1324. //
  1325. // The Bit Mask is not properly writable and readable; not a VGA.
  1326. // Restore the Bit Mask and Read Map to their default states.
  1327. //
  1328. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1329. GRAPH_DATA_PORT, BIT_MASK_DEFAULT);
  1330. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1331. GRAPH_ADDRESS_PORT, IND_READ_MAP);
  1332. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1333. GRAPH_DATA_PORT, READ_MAP_DEFAULT);
  1334. return FALSE;
  1335. }
  1336. //
  1337. // Cycle the mask for next time.
  1338. //
  1339. testMask >>= 1;
  1340. } while (testMask != 0);
  1341. //
  1342. // There's something readable at GRAPH_DATA_PORT; now switch back and
  1343. // make sure that the Read Map register hasn't changed, to verify that
  1344. // we're dealing with indexed registers.
  1345. //
  1346. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1347. GRAPH_ADDRESS_PORT, IND_READ_MAP);
  1348. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1349. GRAPH_DATA_PORT) != READ_MAP_TEST_SETTING) {
  1350. //
  1351. // The Read Map is not properly writable and readable; not a VGA.
  1352. // Restore the Bit Mask and Read Map to their default states, in case
  1353. // this is an EGA, so subsequent writes to the screen aren't garbled.
  1354. //
  1355. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1356. GRAPH_DATA_PORT, READ_MAP_DEFAULT);
  1357. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1358. GRAPH_ADDRESS_PORT, IND_BIT_MASK);
  1359. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1360. GRAPH_DATA_PORT, BIT_MASK_DEFAULT);
  1361. return FALSE;
  1362. }
  1363. //
  1364. // We've pretty surely verified the existence of the Bit Mask register.
  1365. // Put the Graphics Controller back to the original state.
  1366. //
  1367. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1368. GRAPH_DATA_PORT, originalReadMap);
  1369. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1370. GRAPH_ADDRESS_PORT, IND_BIT_MASK);
  1371. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1372. GRAPH_DATA_PORT, originalBitMask);
  1373. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1374. GRAPH_ADDRESS_PORT, originalGCAddr);
  1375. //
  1376. // Now, check for the existence of the Chain4 bit.
  1377. //
  1378. //
  1379. // Remember the original states of the Sequencer Address and Memory Mode
  1380. // registers.
  1381. //
  1382. originalSCAddr = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1383. SEQ_ADDRESS_PORT);
  1384. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1385. SEQ_ADDRESS_PORT, IND_MEMORY_MODE);
  1386. if ((VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1387. SEQ_ADDRESS_PORT) & SEQ_ADDR_MASK) != IND_MEMORY_MODE) {
  1388. //
  1389. // Couldn't read back the Sequencer Address register setting we just
  1390. // performed.
  1391. //
  1392. return FALSE;
  1393. }
  1394. originalMemoryMode = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1395. SEQ_DATA_PORT);
  1396. //
  1397. // Toggle the Chain4 bit and read back the result. This must be done during
  1398. // sync reset, since we're changing the chaining state.
  1399. //
  1400. //
  1401. // Begin sync reset.
  1402. //
  1403. VideoPortWritePortUshort((PUSHORT)(HwDeviceExtension->IOAddress +
  1404. SEQ_ADDRESS_PORT),
  1405. (IND_SYNC_RESET + (START_SYNC_RESET_VALUE << 8)));
  1406. //
  1407. // Toggle the Chain4 bit.
  1408. //
  1409. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1410. SEQ_ADDRESS_PORT, IND_MEMORY_MODE);
  1411. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1412. SEQ_DATA_PORT, (UCHAR)(originalMemoryMode ^ CHAIN4_MASK));
  1413. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1414. SEQ_DATA_PORT) != (UCHAR) (originalMemoryMode ^ CHAIN4_MASK)) {
  1415. //
  1416. // Chain4 bit not there; not a VGA.
  1417. // Set text mode default for Memory Mode register.
  1418. //
  1419. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1420. SEQ_DATA_PORT, MEMORY_MODE_TEXT_DEFAULT);
  1421. //
  1422. // End sync reset.
  1423. //
  1424. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1425. SEQ_ADDRESS_PORT),
  1426. (IND_SYNC_RESET + (END_SYNC_RESET_VALUE << 8)));
  1427. returnStatus = FALSE;
  1428. } else {
  1429. //
  1430. // It's a VGA.
  1431. //
  1432. //
  1433. // Restore the original Memory Mode setting.
  1434. //
  1435. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1436. SEQ_DATA_PORT, originalMemoryMode);
  1437. //
  1438. // End sync reset.
  1439. //
  1440. VideoPortWritePortUshort((PUSHORT)(HwDeviceExtension->IOAddress +
  1441. SEQ_ADDRESS_PORT),
  1442. (USHORT)(IND_SYNC_RESET + (END_SYNC_RESET_VALUE << 8)));
  1443. //
  1444. // Restore the original Sequencer Address setting.
  1445. //
  1446. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1447. SEQ_ADDRESS_PORT, originalSCAddr);
  1448. returnStatus = TRUE;
  1449. }
  1450. return returnStatus;
  1451. } // VgaIsPresent()
  1452. VP_STATUS
  1453. VgaSetPaletteReg(
  1454. PHW_DEVICE_EXTENSION HwDeviceExtension,
  1455. PVIDEO_PALETTE_DATA PaletteBuffer,
  1456. ULONG PaletteBufferSize
  1457. )
  1458. /*++
  1459. Routine Description:
  1460. This routine sets a specified portion of the EGA (not DAC) palette
  1461. registers.
  1462. Arguments:
  1463. HwDeviceExtension - Pointer to the miniport driver's device extension.
  1464. PaletteBuffer - Pointer to the structure containing the palette data.
  1465. PaletteBufferSize - Length of the input buffer supplied by the user.
  1466. Return Value:
  1467. NO_ERROR - information returned successfully
  1468. ERROR_INSUFFICIENT_BUFFER - input buffer not large enough for input data.
  1469. ERROR_INVALID_PARAMETER - invalid palette size.
  1470. --*/
  1471. {
  1472. USHORT i;
  1473. //
  1474. // Check if the size of the data in the input buffer is large enough.
  1475. //
  1476. if ((PaletteBufferSize) < (sizeof(VIDEO_PALETTE_DATA)) ||
  1477. (PaletteBufferSize < (sizeof(VIDEO_PALETTE_DATA) +
  1478. (sizeof(USHORT) * (PaletteBuffer->NumEntries -1)) ))) {
  1479. return ERROR_INSUFFICIENT_BUFFER;
  1480. }
  1481. //
  1482. // Check to see if the parameters are valid.
  1483. //
  1484. if ( (PaletteBuffer->FirstEntry > VIDEO_MAX_COLOR_REGISTER ) ||
  1485. (PaletteBuffer->NumEntries == 0) ||
  1486. (PaletteBuffer->FirstEntry + PaletteBuffer->NumEntries >
  1487. VIDEO_MAX_PALETTE_REGISTER + 1 ) ) {
  1488. return ERROR_INVALID_PARAMETER;
  1489. }
  1490. //
  1491. // Reset ATC to index mode
  1492. //
  1493. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1494. ATT_INITIALIZE_PORT_COLOR);
  1495. //
  1496. // Blast out our palette values.
  1497. //
  1498. for (i = 0; i < PaletteBuffer->NumEntries; i++) {
  1499. VideoPortWritePortUchar(HwDeviceExtension->IOAddress + ATT_ADDRESS_PORT,
  1500. (UCHAR)(i+PaletteBuffer->FirstEntry));
  1501. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1502. ATT_DATA_WRITE_PORT,
  1503. (UCHAR)PaletteBuffer->Colors[i]);
  1504. }
  1505. VideoPortWritePortUchar(HwDeviceExtension->IOAddress + ATT_ADDRESS_PORT,
  1506. VIDEO_ENABLE);
  1507. return NO_ERROR;
  1508. } // end VgaSetPaletteReg()
  1509. VP_STATUS
  1510. VgaSetColorLookup(
  1511. PHW_DEVICE_EXTENSION HwDeviceExtension,
  1512. PVIDEO_CLUT ClutBuffer,
  1513. ULONG ClutBufferSize
  1514. )
  1515. /*++
  1516. Routine Description:
  1517. This routine sets a specified portion of the DAC color lookup table
  1518. settings.
  1519. Arguments:
  1520. HwDeviceExtension - Pointer to the miniport driver's device extension.
  1521. ClutBufferSize - Length of the input buffer supplied by the user.
  1522. ClutBuffer - Pointer to the structure containing the color lookup table.
  1523. Return Value:
  1524. NO_ERROR - information returned successfully
  1525. ERROR_INSUFFICIENT_BUFFER - input buffer not large enough for input data.
  1526. ERROR_INVALID_PARAMETER - invalid clut size.
  1527. --*/
  1528. {
  1529. USHORT i;
  1530. BOOLEAN PaletteIsSet = FALSE;
  1531. //
  1532. // Check if the size of the data in the input buffer is large enough.
  1533. //
  1534. if ( (ClutBufferSize < sizeof(VIDEO_CLUT) - sizeof(ULONG)) ||
  1535. (ClutBufferSize < sizeof(VIDEO_CLUT) +
  1536. (sizeof(ULONG) * (ClutBuffer->NumEntries - 1)) ) ) {
  1537. return ERROR_INSUFFICIENT_BUFFER;
  1538. }
  1539. //
  1540. // Check to see if the parameters are valid.
  1541. //
  1542. if ( (ClutBuffer->NumEntries == 0) ||
  1543. (ClutBuffer->FirstEntry > VIDEO_MAX_COLOR_REGISTER) ||
  1544. (ClutBuffer->FirstEntry + ClutBuffer->NumEntries >
  1545. VIDEO_MAX_COLOR_REGISTER + 1) ) {
  1546. return ERROR_INVALID_PARAMETER;
  1547. }
  1548. if (IS_LINEAR_MODE(HwDeviceExtension->CurrentMode)) {
  1549. INT10_BIOS_ARGUMENTS BiosArguments;
  1550. PVIDEO_PORT_INT10_INTERFACE pInt10 = &HwDeviceExtension->Int10;
  1551. PPALETTE_ENTRY Palette = VideoPortAllocatePool(HwDeviceExtension,
  1552. VpPagedPool,
  1553. ClutBuffer->NumEntries *
  1554. sizeof(PALETTE_ENTRY),
  1555. ' agV');
  1556. if (Palette) {
  1557. for (i=0; i<ClutBuffer->NumEntries; i++) {
  1558. Palette[i].Blue = ClutBuffer->LookupTable[i].RgbArray.Blue;
  1559. Palette[i].Green = ClutBuffer->LookupTable[i].RgbArray.Green;
  1560. Palette[i].Red = ClutBuffer->LookupTable[i].RgbArray.Red;
  1561. Palette[i].Alignment = 0;
  1562. }
  1563. pInt10->Int10WriteMemory(pInt10->Context,
  1564. HwDeviceExtension->VdmSeg,
  1565. HwDeviceExtension->VdmOff,
  1566. Palette,
  1567. sizeof(PALETTE_ENTRY) * ClutBuffer->NumEntries);
  1568. BiosArguments.Eax = 0x4f09;
  1569. BiosArguments.Ebx = 0x0000;
  1570. BiosArguments.Ecx = ClutBuffer->NumEntries;
  1571. BiosArguments.Edx = ClutBuffer->FirstEntry;
  1572. BiosArguments.Edi = HwDeviceExtension->VdmOff;
  1573. BiosArguments.SegEs = HwDeviceExtension->VdmSeg;
  1574. pInt10->Int10CallBios(pInt10->Context, &BiosArguments);
  1575. if ((BiosArguments.Eax & 0xffff) == VESA_STATUS_SUCCESS) {
  1576. PaletteIsSet = TRUE;
  1577. }
  1578. VideoPortFreePool(HwDeviceExtension, Palette);
  1579. } else {
  1580. //
  1581. // in this case we'll try to set palette by programming vga registers
  1582. //
  1583. }
  1584. }
  1585. if(!PaletteIsSet && !(HwDeviceExtension->CurrentMode->NonVgaHardware)) {
  1586. //
  1587. // Set CLUT registers directly on the hardware
  1588. //
  1589. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1590. DAC_ADDRESS_WRITE_PORT, (UCHAR) ClutBuffer->FirstEntry);
  1591. //
  1592. // Now write the data entries, relying on auto-increment.
  1593. //
  1594. for (i = 0; i < ClutBuffer->NumEntries; i++) {
  1595. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1596. DAC_DATA_REG_PORT,
  1597. ClutBuffer->LookupTable[i].RgbArray.Red);
  1598. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1599. DAC_DATA_REG_PORT,
  1600. ClutBuffer->LookupTable[i].RgbArray.Green);
  1601. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1602. DAC_DATA_REG_PORT,
  1603. ClutBuffer->LookupTable[i].RgbArray.Blue);
  1604. }
  1605. PaletteIsSet = TRUE;
  1606. }
  1607. if(PaletteIsSet) {
  1608. return NO_ERROR;
  1609. } else {
  1610. return ERROR_INVALID_PARAMETER;
  1611. }
  1612. } // end VgaSetColorLookup()
  1613. VP_STATUS
  1614. VgaRestoreHardwareState(
  1615. PHW_DEVICE_EXTENSION HwDeviceExtension,
  1616. PVIDEO_HARDWARE_STATE HardwareState,
  1617. ULONG HardwareStateSize
  1618. )
  1619. /*++
  1620. Routine Description:
  1621. Restores all registers and memory of the VGA.
  1622. Note: HardwareState points to the actual buffer from which the state
  1623. is to be restored. This buffer will always be big enough (we specified
  1624. the required size at DriverEntry).
  1625. Note: The offset in the hardware state header from which each general
  1626. register is restored is the offset of the write address of that register
  1627. from the base I/O address of the VGA.
  1628. Arguments:
  1629. HwDeviceExtension - Pointer to the miniport driver's device extension.
  1630. HardwareState - Pointer to a structure from which the saved state is to be
  1631. restored (actually only info about and a pointer to the actual save
  1632. buffer).
  1633. HardwareStateSize - Length of the input buffer supplied by the user.
  1634. (Actually only the size of the HardwareState structure, not the
  1635. buffer it points to from which the state is actually restored. The
  1636. pointed-to buffer is assumed to be big enough.)
  1637. Return Value:
  1638. NO_ERROR - restore performed successfully
  1639. ERROR_INSUFFICIENT_BUFFER - input buffer not large enough to provide data
  1640. --*/
  1641. {
  1642. PVIDEO_HARDWARE_STATE_HEADER hardwareStateHeader;
  1643. ULONG i;
  1644. UCHAR dummy;
  1645. PUCHAR pScreen;
  1646. PUCHAR pucLatch;
  1647. PULONG pulBuffer;
  1648. PUCHAR port;
  1649. PUCHAR portValue;
  1650. PUCHAR portValueDAC;
  1651. ULONG bIsColor;
  1652. //
  1653. // Check if the size of the data in the input buffer is large enough.
  1654. //
  1655. if ((HardwareStateSize < sizeof(VIDEO_HARDWARE_STATE)) ||
  1656. (HardwareState->StateLength < VGA_TOTAL_STATE_SIZE)) {
  1657. return ERROR_INSUFFICIENT_BUFFER;
  1658. }
  1659. //
  1660. // Point to the buffer where the restore data is actually stored.
  1661. //
  1662. hardwareStateHeader = HardwareState->StateHeader;
  1663. //
  1664. // Make sure the offset are in the structure ...
  1665. //
  1666. if ((hardwareStateHeader->BasicSequencerOffset + VGA_NUM_SEQUENCER_PORTS >
  1667. HardwareState->StateLength) ||
  1668. (hardwareStateHeader->BasicCrtContOffset + VGA_NUM_CRTC_PORTS >
  1669. HardwareState->StateLength) ||
  1670. (hardwareStateHeader->BasicGraphContOffset + VGA_NUM_GRAPH_CONT_PORTS >
  1671. HardwareState->StateLength) ||
  1672. (hardwareStateHeader->BasicAttribContOffset + VGA_NUM_ATTRIB_CONT_PORTS >
  1673. HardwareState->StateLength) ||
  1674. (hardwareStateHeader->BasicDacOffset + (3 * VGA_NUM_DAC_ENTRIES) >
  1675. HardwareState->StateLength) ||
  1676. (hardwareStateHeader->BasicLatchesOffset + 4 >
  1677. HardwareState->StateLength) ||
  1678. (hardwareStateHeader->ExtendedSequencerOffset + EXT_NUM_SEQUENCER_PORTS >
  1679. HardwareState->StateLength) ||
  1680. (hardwareStateHeader->ExtendedCrtContOffset + EXT_NUM_CRTC_PORTS >
  1681. HardwareState->StateLength) ||
  1682. (hardwareStateHeader->ExtendedGraphContOffset + EXT_NUM_GRAPH_CONT_PORTS >
  1683. HardwareState->StateLength) ||
  1684. (hardwareStateHeader->ExtendedAttribContOffset + EXT_NUM_ATTRIB_CONT_PORTS >
  1685. HardwareState->StateLength) ||
  1686. (hardwareStateHeader->ExtendedDacOffset + (4 * EXT_NUM_DAC_ENTRIES) >
  1687. HardwareState->StateLength) ||
  1688. //
  1689. // Only check the validator state offset if there is unemulated data.
  1690. //
  1691. ((hardwareStateHeader->VGAStateFlags & VIDEO_STATE_UNEMULATED_VGA_STATE) &&
  1692. (hardwareStateHeader->ExtendedValidatorStateOffset + VGA_VALIDATOR_AREA_SIZE >
  1693. HardwareState->StateLength)) ||
  1694. (hardwareStateHeader->ExtendedMiscDataOffset + VGA_MISC_DATA_AREA_OFFSET >
  1695. HardwareState->StateLength) ||
  1696. (hardwareStateHeader->Plane1Offset + hardwareStateHeader->PlaneLength >
  1697. HardwareState->StateLength) ||
  1698. (hardwareStateHeader->Plane2Offset + hardwareStateHeader->PlaneLength >
  1699. HardwareState->StateLength) ||
  1700. (hardwareStateHeader->Plane3Offset + hardwareStateHeader->PlaneLength >
  1701. HardwareState->StateLength) ||
  1702. (hardwareStateHeader->Plane4Offset + hardwareStateHeader->PlaneLength >
  1703. HardwareState->StateLength) ||
  1704. (hardwareStateHeader->DIBOffset +
  1705. hardwareStateHeader->DIBBitsPerPixel / 8 *
  1706. hardwareStateHeader->DIBXResolution *
  1707. hardwareStateHeader->DIBYResolution > HardwareState->StateLength) ||
  1708. (hardwareStateHeader->DIBXlatOffset + hardwareStateHeader->DIBXlatLength >
  1709. HardwareState->StateLength)) {
  1710. return ERROR_INVALID_PARAMETER;
  1711. }
  1712. //
  1713. // Turn off the screen to avoid flickering. The screen will turn back on
  1714. // when we restore the DAC state at the end of this routine.
  1715. //
  1716. //
  1717. // Set DAC register 0 to display black.
  1718. //
  1719. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1720. DAC_ADDRESS_WRITE_PORT, 0);
  1721. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1722. DAC_DATA_REG_PORT, 0);
  1723. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1724. DAC_DATA_REG_PORT, 0);
  1725. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1726. DAC_DATA_REG_PORT, 0);
  1727. //
  1728. // Set the DAC mask register to force DAC register 0 to display all the
  1729. // time (this is the register we just set to display black). From now on,
  1730. // nothing but black will show up on the screen.
  1731. //
  1732. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1733. DAC_PIXEL_MASK_PORT, 0);
  1734. //
  1735. // Restore the latches and the contents of display memory.
  1736. //
  1737. // Set up the VGA's hardware to allow us to copy to each plane in turn.
  1738. //
  1739. // Begin sync reset.
  1740. //
  1741. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1742. SEQ_ADDRESS_PORT),
  1743. (USHORT) (IND_SYNC_RESET + (START_SYNC_RESET_VALUE << 8)));
  1744. //
  1745. // Turn off Chain mode and map display memory at A0000 for 64K.
  1746. //
  1747. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1748. GRAPH_ADDRESS_PORT, IND_GRAPH_MISC);
  1749. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1750. GRAPH_DATA_PORT, (UCHAR) ((VideoPortReadPortUchar(
  1751. HwDeviceExtension->IOAddress + GRAPH_DATA_PORT) & 0xF1) | 0x04));
  1752. //
  1753. // Turn off Chain4 mode and odd/even.
  1754. //
  1755. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1756. SEQ_ADDRESS_PORT, IND_MEMORY_MODE);
  1757. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1758. SEQ_DATA_PORT,
  1759. (UCHAR) ((VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1760. SEQ_DATA_PORT) & 0xF3) | 0x04));
  1761. //
  1762. // End sync reset.
  1763. //
  1764. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1765. SEQ_ADDRESS_PORT), (USHORT) (IND_SYNC_RESET +
  1766. (END_SYNC_RESET_VALUE << 8)));
  1767. //
  1768. // Set the write mode to 0, the read mode to 0, and turn off odd/even.
  1769. //
  1770. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1771. GRAPH_ADDRESS_PORT, IND_GRAPH_MODE);
  1772. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1773. GRAPH_DATA_PORT,
  1774. (UCHAR) ((VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1775. GRAPH_DATA_PORT) & 0xE4) | 0x00));
  1776. //
  1777. // Set the Bit Mask to 0xFF to allow all CPU bits through.
  1778. //
  1779. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1780. GRAPH_ADDRESS_PORT), (USHORT) (IND_BIT_MASK + (0xFF << 8)));
  1781. //
  1782. // Set the Data Rotation and Logical Function fields to 0 to allow CPU
  1783. // data through unmodified.
  1784. //
  1785. VideoPortWritePortUshort((PUSHORT)(HwDeviceExtension->IOAddress +
  1786. GRAPH_ADDRESS_PORT), (USHORT) (IND_DATA_ROTATE + (0 << 8)));
  1787. //
  1788. // Set Set/Reset Enable to 0 to select CPU data for all planes.
  1789. //
  1790. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1791. GRAPH_ADDRESS_PORT), (USHORT) (IND_SET_RESET_ENABLE + (0 << 8)));
  1792. //
  1793. // Point the Sequencer Index to the Map Mask register.
  1794. //
  1795. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1796. SEQ_ADDRESS_PORT, IND_MAP_MASK);
  1797. //
  1798. // Restore the latches.
  1799. //
  1800. // Point to the saved data for the first latch.
  1801. //
  1802. pucLatch = ((PUCHAR) (hardwareStateHeader)) +
  1803. hardwareStateHeader->BasicLatchesOffset;
  1804. //
  1805. // Point to first byte of display memory.
  1806. //
  1807. pScreen = (PUCHAR) HwDeviceExtension->VideoMemoryAddress;
  1808. //
  1809. // Write the contents to be restored to each of the four latches in turn.
  1810. //
  1811. for (i = 0; i < 4; i++) {
  1812. //
  1813. // Set the Map Mask to select the plane we want to restore next.
  1814. //
  1815. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1816. SEQ_DATA_PORT, (UCHAR)(1<<i));
  1817. //
  1818. // Write this plane's latch.
  1819. //
  1820. VideoPortWriteRegisterUchar(pScreen, *pucLatch++);
  1821. }
  1822. //
  1823. // Read the latched data into the latches, and the latches are set.
  1824. //
  1825. dummy = VideoPortReadRegisterUchar(pScreen);
  1826. //
  1827. // Point to the offset of the saved data for the first plane.
  1828. //
  1829. pulBuffer = &(hardwareStateHeader->Plane1Offset);
  1830. //
  1831. // Restore each of the four planes in turn.
  1832. //
  1833. for (i = 0; i < 4; i++) {
  1834. //
  1835. // Set the Map Mask to select the plane we want to restore next.
  1836. //
  1837. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1838. SEQ_DATA_PORT, (UCHAR)(1<<i));
  1839. //
  1840. // Restore this plane from the buffer.
  1841. //
  1842. VideoPortMoveMemory((PUCHAR) HwDeviceExtension->VideoMemoryAddress,
  1843. ((PUCHAR) (hardwareStateHeader)) + *pulBuffer,
  1844. hardwareStateHeader->PlaneLength);
  1845. pulBuffer++;
  1846. }
  1847. //
  1848. // If we have some unemulated data, put it back into the buffer
  1849. //
  1850. if (hardwareStateHeader->VGAStateFlags & VIDEO_STATE_UNEMULATED_VGA_STATE) {
  1851. if (!hardwareStateHeader->ExtendedValidatorStateOffset) {
  1852. ASSERT(FALSE);
  1853. return ERROR_INVALID_PARAMETER;
  1854. }
  1855. //
  1856. // Get the right offset in the struct and save all the data associated
  1857. // with the trapped validator data.
  1858. //
  1859. VideoPortMoveMemory(&(HwDeviceExtension->TrappedValidatorCount),
  1860. ((PUCHAR) (hardwareStateHeader)) +
  1861. hardwareStateHeader->ExtendedValidatorStateOffset,
  1862. VGA_VALIDATOR_AREA_SIZE);
  1863. //
  1864. // Check to see if this is an appropriate access range.
  1865. // We are trapping - so we must have the trapping access range enabled.
  1866. //
  1867. if (((HwDeviceExtension->CurrentVdmAccessRange != FullVgaValidatorAccessRange) ||
  1868. (HwDeviceExtension->CurrentNumVdmAccessRanges != NUM_FULL_VGA_VALIDATOR_ACCESS_RANGE)) &&
  1869. ((HwDeviceExtension->CurrentVdmAccessRange != MinimalVgaValidatorAccessRange) ||
  1870. (HwDeviceExtension->CurrentNumVdmAccessRanges != NUM_MINIMAL_VGA_VALIDATOR_ACCESS_RANGE))) {
  1871. ASSERT (FALSE);
  1872. return ERROR_INVALID_PARAMETER;
  1873. }
  1874. VideoPortSetTrappedEmulatorPorts(HwDeviceExtension,
  1875. HwDeviceExtension->CurrentNumVdmAccessRanges,
  1876. HwDeviceExtension->CurrentVdmAccessRange);
  1877. }
  1878. //
  1879. // Set the critical registers (clock and timing states) during sync reset.
  1880. //
  1881. // Begin sync reset.
  1882. //
  1883. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1884. SEQ_ADDRESS_PORT), (USHORT) (IND_SYNC_RESET +
  1885. (START_SYNC_RESET_VALUE << 8)));
  1886. //
  1887. // Restore the Miscellaneous Output register.
  1888. //
  1889. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1890. MISC_OUTPUT_REG_WRITE_PORT,
  1891. (UCHAR) (hardwareStateHeader->PortValue[MISC_OUTPUT_REG_WRITE_PORT] & 0xF7));
  1892. //
  1893. // Restore all Sequencer registers except the Sync Reset register, which
  1894. // is always not in reset (except when we send out a batched sync reset
  1895. // register set, but that can't be interrupted, so we know we're never in
  1896. // sync reset at save/restore time).
  1897. //
  1898. portValue = ((PUCHAR) hardwareStateHeader) +
  1899. hardwareStateHeader->BasicSequencerOffset + 1;
  1900. for (i = 1; i < VGA_NUM_SEQUENCER_PORTS; i++) {
  1901. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1902. SEQ_ADDRESS_PORT), (USHORT) (i + ((*portValue++) << 8)) );
  1903. }
  1904. //
  1905. // Restore the Graphics Controller Miscellaneous register, which contains
  1906. // the Chain bit.
  1907. //
  1908. portValue = ((PUCHAR) hardwareStateHeader) +
  1909. hardwareStateHeader->BasicGraphContOffset + IND_GRAPH_MISC;
  1910. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1911. GRAPH_ADDRESS_PORT), (USHORT)(IND_GRAPH_MISC + (*portValue << 8)));
  1912. //
  1913. // End sync reset.
  1914. //
  1915. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1916. SEQ_ADDRESS_PORT), (USHORT) (IND_SYNC_RESET +
  1917. (END_SYNC_RESET_VALUE << 8)));
  1918. //
  1919. // Figure out if color/mono switchable registers are at 3BX or 3DX.
  1920. // At the same time, save the state of the Miscellaneous Output register
  1921. // which is read from 3CC but written at 3C2.
  1922. //
  1923. if (hardwareStateHeader->PortValue[MISC_OUTPUT_REG_WRITE_PORT] & 0x01) {
  1924. bIsColor = TRUE;
  1925. } else {
  1926. bIsColor = FALSE;
  1927. }
  1928. //
  1929. // Restore the CRT Controller indexed registers.
  1930. //
  1931. // Unlock CRTC registers 0-7.
  1932. //
  1933. portValue = (PUCHAR) hardwareStateHeader +
  1934. hardwareStateHeader->BasicCrtContOffset;
  1935. if (bIsColor) {
  1936. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1937. CRTC_ADDRESS_PORT_COLOR), (USHORT) (IND_CRTC_PROTECT +
  1938. (((*(portValue + IND_CRTC_PROTECT)) & 0x7F) << 8)));
  1939. } else {
  1940. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1941. CRTC_ADDRESS_PORT_MONO), (USHORT) (IND_CRTC_PROTECT +
  1942. (((*(portValue + IND_CRTC_PROTECT)) & 0x7F) << 8)));
  1943. }
  1944. //
  1945. // Now restore the CRTC registers.
  1946. //
  1947. for (i = 0; i < VGA_NUM_CRTC_PORTS; i++) {
  1948. if (bIsColor) {
  1949. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1950. CRTC_ADDRESS_PORT_COLOR),
  1951. (USHORT) (i + ((*portValue++) << 8)));
  1952. } else {
  1953. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1954. CRTC_ADDRESS_PORT_MONO),
  1955. (USHORT) (i + ((*portValue++) << 8)));
  1956. }
  1957. }
  1958. //
  1959. // Restore the Graphics Controller indexed registers.
  1960. //
  1961. portValue = (PUCHAR) hardwareStateHeader +
  1962. hardwareStateHeader->BasicGraphContOffset;
  1963. for (i = 0; i < VGA_NUM_GRAPH_CONT_PORTS; i++) {
  1964. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  1965. GRAPH_ADDRESS_PORT), (USHORT) (i + ((*portValue++) << 8)));
  1966. }
  1967. //
  1968. // Restore the Attribute Controller indexed registers.
  1969. //
  1970. portValue = (PUCHAR) hardwareStateHeader +
  1971. hardwareStateHeader->BasicAttribContOffset;
  1972. //
  1973. // Reset the AC index/data toggle, then blast out all the register
  1974. // settings.
  1975. //
  1976. if (bIsColor) {
  1977. dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1978. INPUT_STATUS_1_COLOR);
  1979. } else {
  1980. dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  1981. INPUT_STATUS_1_MONO);
  1982. }
  1983. for (i = 0; i < VGA_NUM_ATTRIB_CONT_PORTS; i++) {
  1984. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1985. ATT_ADDRESS_PORT, (UCHAR)i);
  1986. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  1987. ATT_DATA_WRITE_PORT, *portValue++);
  1988. }
  1989. //
  1990. // Restore DAC registers 1 through 255. We'll do register 0, the DAC Mask,
  1991. // and the index registers later.
  1992. // Set the DAC address port Index, then write out the DAC Data registers.
  1993. // Each three reads get Red, Green, and Blue components for that register.
  1994. //
  1995. // Write them one at a time due to problems on local bus machines.
  1996. //
  1997. portValueDAC = (PUCHAR) hardwareStateHeader +
  1998. hardwareStateHeader->BasicDacOffset + 3;
  1999. for (i = 1; i < VGA_NUM_DAC_ENTRIES; i++) {
  2000. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2001. DAC_ADDRESS_WRITE_PORT, (UCHAR)i);
  2002. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2003. DAC_DATA_REG_PORT, *portValueDAC++);
  2004. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2005. DAC_DATA_REG_PORT, *portValueDAC++);
  2006. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2007. DAC_DATA_REG_PORT, *portValueDAC++);
  2008. }
  2009. //
  2010. // Extended registers are not supported in this driver.
  2011. //
  2012. //
  2013. // Restore the Feature Control register.
  2014. //
  2015. if (bIsColor) {
  2016. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2017. FEAT_CTRL_WRITE_PORT_COLOR,
  2018. hardwareStateHeader->PortValue[FEAT_CTRL_WRITE_PORT_COLOR]);
  2019. } else {
  2020. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2021. FEAT_CTRL_WRITE_PORT_MONO,
  2022. hardwareStateHeader->PortValue[FEAT_CTRL_WRITE_PORT_MONO]);
  2023. }
  2024. //
  2025. // Restore the Sequencer Index.
  2026. //
  2027. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2028. SEQ_ADDRESS_PORT,
  2029. hardwareStateHeader->PortValue[SEQ_ADDRESS_PORT]);
  2030. //
  2031. // Restore the CRT Controller Index.
  2032. //
  2033. if (bIsColor) {
  2034. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2035. CRTC_ADDRESS_PORT_COLOR,
  2036. hardwareStateHeader->PortValue[CRTC_ADDRESS_PORT_COLOR]);
  2037. } else {
  2038. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2039. CRTC_ADDRESS_PORT_MONO,
  2040. hardwareStateHeader->PortValue[CRTC_ADDRESS_PORT_MONO]);
  2041. }
  2042. //
  2043. // Restore the Graphics Controller Index.
  2044. //
  2045. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2046. GRAPH_ADDRESS_PORT,
  2047. hardwareStateHeader->PortValue[GRAPH_ADDRESS_PORT]);
  2048. //
  2049. // Restore the Attribute Controller Index and index/data toggle state.
  2050. //
  2051. if (bIsColor) {
  2052. port = HwDeviceExtension->IOAddress + INPUT_STATUS_1_COLOR;
  2053. } else {
  2054. port = HwDeviceExtension->IOAddress + INPUT_STATUS_1_MONO;
  2055. }
  2056. VideoPortReadPortUchar(port); // reset the toggle to Index state
  2057. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2058. ATT_ADDRESS_PORT, // restore the AC Index
  2059. hardwareStateHeader->PortValue[ATT_ADDRESS_PORT]);
  2060. //
  2061. // If the toggle should be in Data state, we're all set. If it should be in
  2062. // Index state, reset it to that condition.
  2063. //
  2064. if (hardwareStateHeader->AttribIndexDataState == 0) {
  2065. //
  2066. // Reset the toggle to Index state.
  2067. //
  2068. VideoPortReadPortUchar(port);
  2069. }
  2070. //
  2071. // Restore DAC register 0 and the DAC Mask, to unblank the screen.
  2072. //
  2073. portValueDAC = (PUCHAR) hardwareStateHeader +
  2074. hardwareStateHeader->BasicDacOffset;
  2075. //
  2076. // Restore the DAC Mask register.
  2077. //
  2078. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2079. DAC_PIXEL_MASK_PORT,
  2080. hardwareStateHeader->PortValue[DAC_PIXEL_MASK_PORT]);
  2081. //
  2082. // Restore DAC register 0.
  2083. //
  2084. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2085. DAC_ADDRESS_WRITE_PORT, 0);
  2086. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2087. DAC_DATA_REG_PORT, *portValueDAC++);
  2088. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2089. DAC_DATA_REG_PORT, *portValueDAC++);
  2090. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2091. DAC_DATA_REG_PORT, *portValueDAC++);
  2092. //
  2093. // Restore the read/write state and the current index of the DAC.
  2094. //
  2095. // See whether the Read or Write Index was written to most recently.
  2096. // (The upper nibble stored at DAC_STATE_PORT is the # of reads/writes
  2097. // for the current index.)
  2098. //
  2099. if ((hardwareStateHeader->PortValue[DAC_STATE_PORT] & 0x0F) == 3) {
  2100. //
  2101. // The DAC Read Index was written to last. Restore the DAC by setting
  2102. // up to read from the saved index - 1, because the way the Read
  2103. // Index works is that it autoincrements after reading, so you actually
  2104. // end up reading the data for the index you read at the DAC Write
  2105. // Mask register - 1.
  2106. //
  2107. // Set the Read Index to the index we read, minus 1, accounting for
  2108. // wrap from 255 back to 0. The DAC hardware immediately reads this
  2109. // register into a temporary buffer, then adds 1 to the index.
  2110. //
  2111. if (hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT] == 0) {
  2112. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2113. DAC_ADDRESS_READ_PORT, 255);
  2114. } else {
  2115. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2116. DAC_ADDRESS_READ_PORT, (UCHAR)
  2117. (hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT] -
  2118. 1));
  2119. }
  2120. //
  2121. // Now read the hardware however many times are required to get to
  2122. // the partial read state we saved.
  2123. //
  2124. for (i = hardwareStateHeader->PortValue[DAC_STATE_PORT] >> 4;
  2125. i > 0; i--) {
  2126. dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2127. DAC_DATA_REG_PORT);
  2128. }
  2129. } else {
  2130. //
  2131. // The DAC Write Index was written to last. Set the Write Index to the
  2132. // index value we read out of the DAC. Then, if a partial write
  2133. // (partway through an RGB triplet) was in place, write the partial
  2134. // values, which we obtained by writing them to the current DAC
  2135. // register. This DAC register will be wrong until the write is
  2136. // completed, but at least the values will be right once the write is
  2137. // finished, and most importantly we won't have messed up the sequence
  2138. // of RGB writes (which can be as long as 768 in a row).
  2139. //
  2140. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2141. DAC_ADDRESS_WRITE_PORT,
  2142. hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT]);
  2143. //
  2144. // Now write to the hardware however many times are required to get to
  2145. // the partial write state we saved (if any).
  2146. //
  2147. // Point to the saved value for the DAC register that was in the
  2148. // process of being written to; we wrote the partial value out, so now
  2149. // we can restore it.
  2150. //
  2151. portValueDAC = (PUCHAR) hardwareStateHeader +
  2152. hardwareStateHeader->BasicDacOffset +
  2153. (hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT] * 3);
  2154. for (i = hardwareStateHeader->PortValue[DAC_STATE_PORT] >> 4;
  2155. i > 0; i--) {
  2156. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2157. DAC_DATA_REG_PORT, *portValueDAC++);
  2158. }
  2159. }
  2160. return NO_ERROR;
  2161. } // end VgaRestoreHardwareState()
  2162. VP_STATUS
  2163. VgaSaveHardwareState(
  2164. PHW_DEVICE_EXTENSION HwDeviceExtension,
  2165. PVIDEO_HARDWARE_STATE HardwareState,
  2166. ULONG HardwareStateSize,
  2167. PULONG OutputSize
  2168. )
  2169. /*++
  2170. Routine Description:
  2171. Saves all registers and memory of the VGA.
  2172. Note: HardwareState points to the actual buffer in which the state
  2173. is saved. This buffer will always be big enough (we specified
  2174. the required size at DriverEntry).
  2175. Note: This routine leaves registers in any state it cares to, except
  2176. that it will not mess with any of the CRT or Sequencer parameters that
  2177. might make the monitor unhappy. It leaves the screen blanked by setting
  2178. the DAC Mask and DAC register 0 to all zero values. The next video
  2179. operation we expect after this is a mode set to take us back to Win32.
  2180. Note: The offset in the hardware state header in which each general
  2181. register is saved is the offset of the write address of that register from
  2182. the base I/O address of the VGA.
  2183. Arguments:
  2184. HwDeviceExtension - Pointer to the miniport driver's device extension.
  2185. HardwareState - Pointer to a structure in which the saved state will be
  2186. returned (actually only info about and a pointer to the actual save
  2187. buffer).
  2188. HardwareStateSize - Length of the output buffer supplied by the user.
  2189. (Actually only the size of the HardwareState structure, not the
  2190. buffer it points to where the state is actually saved. The pointed-
  2191. to buffer is assumed to be big enough.)
  2192. OutputSize - Pointer to a buffer in which to return the actual size of
  2193. the data returned in the buffer.
  2194. Return Value:
  2195. NO_ERROR - information returned successfully
  2196. ERROR_INSUFFICIENT_BUFFER - output buffer not large enough to return
  2197. any useful data
  2198. --*/
  2199. {
  2200. PVIDEO_HARDWARE_STATE_HEADER hardwareStateHeader;
  2201. PUCHAR pScreen;
  2202. PUCHAR portValue;
  2203. PUCHAR portValueDAC;
  2204. PUCHAR bufferPointer;
  2205. ULONG i;
  2206. UCHAR dummy, originalACIndex, originalACData;
  2207. UCHAR ucCRTC03;
  2208. ULONG bIsColor;
  2209. //
  2210. // See if the buffer is big enough to hold the hardware state structure.
  2211. // (This is only the HardwareState structure itself, not the buffer it
  2212. // points to.)
  2213. //
  2214. if (HardwareStateSize < sizeof(VIDEO_HARDWARE_STATE) ) {
  2215. *OutputSize = 0; // nothing returned
  2216. return ERROR_INSUFFICIENT_BUFFER;
  2217. }
  2218. //
  2219. // Amount of data we're going to return in the output buffer.
  2220. // (The VIDEO_HARDWARE_STATE in the output buffer points to the actual
  2221. // buffer in which the state is stored, which is assumed to be large
  2222. // enough.)
  2223. //
  2224. *OutputSize = sizeof(VIDEO_HARDWARE_STATE);
  2225. //
  2226. // Indicate the size of the full state save info.
  2227. //
  2228. HardwareState->StateLength = VGA_TOTAL_STATE_SIZE;
  2229. //
  2230. // hardwareStateHeader is a structure of offsets at the start of the
  2231. // actual save area that indicates the locations in which various VGA
  2232. // register and memory components are saved.
  2233. //
  2234. hardwareStateHeader = HardwareState->StateHeader;
  2235. //
  2236. // Zero out the structure.
  2237. //
  2238. VideoPortZeroMemory(hardwareStateHeader, sizeof(VIDEO_HARDWARE_STATE_HEADER));
  2239. //
  2240. // Set the Length field, which is basically a version ID.
  2241. //
  2242. hardwareStateHeader->Length = sizeof(VIDEO_HARDWARE_STATE_HEADER);
  2243. //
  2244. // Set the basic register offsets properly.
  2245. //
  2246. hardwareStateHeader->BasicSequencerOffset = VGA_BASIC_SEQUENCER_OFFSET;
  2247. hardwareStateHeader->BasicCrtContOffset = VGA_BASIC_CRTC_OFFSET;
  2248. hardwareStateHeader->BasicGraphContOffset = VGA_BASIC_GRAPH_CONT_OFFSET;
  2249. hardwareStateHeader->BasicAttribContOffset = VGA_BASIC_ATTRIB_CONT_OFFSET;
  2250. hardwareStateHeader->BasicDacOffset = VGA_BASIC_DAC_OFFSET;
  2251. hardwareStateHeader->BasicLatchesOffset = VGA_BASIC_LATCHES_OFFSET;
  2252. //
  2253. // Set the entended register offsets properly.
  2254. //
  2255. hardwareStateHeader->ExtendedSequencerOffset = VGA_EXT_SEQUENCER_OFFSET;
  2256. hardwareStateHeader->ExtendedCrtContOffset = VGA_EXT_CRTC_OFFSET;
  2257. hardwareStateHeader->ExtendedGraphContOffset = VGA_EXT_GRAPH_CONT_OFFSET;
  2258. hardwareStateHeader->ExtendedAttribContOffset = VGA_EXT_ATTRIB_CONT_OFFSET;
  2259. hardwareStateHeader->ExtendedDacOffset = VGA_EXT_DAC_OFFSET;
  2260. //
  2261. // Figure out if color/mono switchable registers are at 3BX or 3DX.
  2262. // At the same time, save the state of the Miscellaneous Output register
  2263. // which is read from 3CC but written at 3C2.
  2264. //
  2265. if ((hardwareStateHeader->PortValue[MISC_OUTPUT_REG_WRITE_PORT] =
  2266. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2267. MISC_OUTPUT_REG_READ_PORT))
  2268. & 0x01) {
  2269. bIsColor = TRUE;
  2270. } else {
  2271. bIsColor = FALSE;
  2272. }
  2273. //
  2274. // Force the video subsystem enable state to enabled.
  2275. //
  2276. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2277. VIDEO_SUBSYSTEM_ENABLE_PORT, 1);
  2278. //
  2279. // Save the DAC state first, so we can set the DAC to blank the screen
  2280. // so nothing after this shows up at all.
  2281. //
  2282. // Save the DAC Mask register.
  2283. //
  2284. hardwareStateHeader->PortValue[DAC_PIXEL_MASK_PORT] =
  2285. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2286. DAC_PIXEL_MASK_PORT);
  2287. //
  2288. // Save the DAC Index register. Note that there is actually only one DAC
  2289. // Index register, which functions as either the Read Index or the Write
  2290. // Index as needed.
  2291. //
  2292. hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT] =
  2293. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2294. DAC_ADDRESS_WRITE_PORT);
  2295. //
  2296. // Save the DAC read/write state. We determine if the DAC has been written
  2297. // to or read from at the current index 0, 1, or 2 times (the application
  2298. // is in the middle of reading or writing a DAC register triplet if the
  2299. // count is 1 or 2), and save enough info so we can restore things
  2300. // properly. The only hole is if the application writes to the Write Index,
  2301. // then reads from instead of writes to the Data register, or vice-versa,
  2302. // or if they do a partial read write, then never finish it.
  2303. // This is fairly ridiculous behavior, however, and anyway there's nothing
  2304. // we can do about it.
  2305. //
  2306. hardwareStateHeader->PortValue[DAC_STATE_PORT] =
  2307. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2308. DAC_STATE_PORT);
  2309. if (hardwareStateHeader->PortValue[DAC_STATE_PORT] == 3) {
  2310. //
  2311. // The DAC Read Index was written to last. Figure out how many reads
  2312. // have been done from the current index. We'll restart this on restore
  2313. // by setting the Read Index to the current index - 1 (the read index
  2314. // is one greater than the index being read), then doing the proper
  2315. // number of reads.
  2316. //
  2317. // Read the Data register once, and see if the index changes.
  2318. //
  2319. dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2320. DAC_DATA_REG_PORT);
  2321. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2322. DAC_ADDRESS_WRITE_PORT) !=
  2323. hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT]) {
  2324. //
  2325. // The DAC Index changed, so two reads had already been done from
  2326. // the current index. Store the count "2" in the upper nibble of
  2327. // the read/write state field.
  2328. //
  2329. hardwareStateHeader->PortValue[DAC_STATE_PORT] |= 0x20;
  2330. } else {
  2331. //
  2332. // Read the Data register again, and see if the index changes.
  2333. //
  2334. dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2335. DAC_DATA_REG_PORT);
  2336. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2337. DAC_ADDRESS_WRITE_PORT) !=
  2338. hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT]) {
  2339. //
  2340. // The DAC Index changed, so one read had already been done
  2341. // from the current index. Store the count "1" in the upper
  2342. // nibble of the read/write state field.
  2343. //
  2344. hardwareStateHeader->PortValue[DAC_STATE_PORT] |= 0x10;
  2345. }
  2346. //
  2347. // If neither 2 nor 1 reads had been done from the current index,
  2348. // then 0 reads were done, and we're all set, since the upper
  2349. // nibble of the read/write state field is already 0.
  2350. //
  2351. }
  2352. } else {
  2353. //
  2354. // The DAC Write Index was written to last. Figure out how many writes
  2355. // have been done to the current index. We'll restart this on restore
  2356. // by setting the Write Index to the proper index, then doing the
  2357. // proper number of writes. When we do the DAC register save, we'll
  2358. // read out the value that gets written (if there was a partial write
  2359. // in progress), so we can restore the proper data later. This will
  2360. // cause this current DAC location to be briefly wrong in the 1- and
  2361. // 2-bytes-written case (until the app finishes the write), but that's
  2362. // better than having the wrong DAC values written for good.
  2363. //
  2364. // Write the Data register once, and see if the index changes.
  2365. //
  2366. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2367. DAC_DATA_REG_PORT, 0);
  2368. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2369. DAC_ADDRESS_WRITE_PORT) !=
  2370. hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT]) {
  2371. //
  2372. // The DAC Index changed, so two writes had already been done to
  2373. // the current index. Store the count "2" in the upper nibble of
  2374. // the read/write state field.
  2375. //
  2376. hardwareStateHeader->PortValue[DAC_STATE_PORT] |= 0x20;
  2377. } else {
  2378. //
  2379. // Write the Data register again, and see if the index changes.
  2380. //
  2381. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2382. DAC_DATA_REG_PORT, 0);
  2383. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2384. DAC_ADDRESS_WRITE_PORT) !=
  2385. hardwareStateHeader->PortValue[DAC_ADDRESS_WRITE_PORT]) {
  2386. //
  2387. // The DAC Index changed, so one write had already been done
  2388. // to the current index. Store the count "1" in the upper
  2389. // nibble of the read/write state field.
  2390. //
  2391. hardwareStateHeader->PortValue[DAC_STATE_PORT] |= 0x10;
  2392. }
  2393. //
  2394. // If neither 2 nor 1 writes had been done to the current index,
  2395. // then 0 writes were done, and we're all set.
  2396. //
  2397. }
  2398. }
  2399. //
  2400. // Now, read out the 256 18-bit DAC palette registers (256 RGB triplets),
  2401. // and blank the screen.
  2402. //
  2403. portValueDAC = (PUCHAR) hardwareStateHeader + VGA_BASIC_DAC_OFFSET;
  2404. //
  2405. // Read out DAC register 0, so we can set it to black.
  2406. //
  2407. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2408. DAC_ADDRESS_READ_PORT, 0);
  2409. *portValueDAC++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2410. DAC_DATA_REG_PORT);
  2411. *portValueDAC++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2412. DAC_DATA_REG_PORT);
  2413. *portValueDAC++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2414. DAC_DATA_REG_PORT);
  2415. //
  2416. // Set DAC register 0 to display black.
  2417. //
  2418. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2419. DAC_ADDRESS_WRITE_PORT, 0);
  2420. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2421. DAC_DATA_REG_PORT, 0);
  2422. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2423. DAC_DATA_REG_PORT, 0);
  2424. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2425. DAC_DATA_REG_PORT, 0);
  2426. //
  2427. // Set the DAC mask register to force DAC register 0 to display all the
  2428. // time (this is the register we just set to display black). From now on,
  2429. // nothing but black will show up on the screen.
  2430. //
  2431. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2432. DAC_PIXEL_MASK_PORT, 0);
  2433. //
  2434. // Read out the Attribute Controller Index state, and deduce the Index/Data
  2435. // toggle state at the same time.
  2436. //
  2437. // Save the state of the Attribute Controller, both Index and Data,
  2438. // so we can test in which state the toggle currently is.
  2439. //
  2440. originalACIndex = hardwareStateHeader->PortValue[ATT_ADDRESS_PORT] =
  2441. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2442. ATT_ADDRESS_PORT);
  2443. originalACData = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2444. ATT_DATA_READ_PORT);
  2445. //
  2446. // Sequencer Index.
  2447. //
  2448. hardwareStateHeader->PortValue[SEQ_ADDRESS_PORT] =
  2449. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2450. SEQ_ADDRESS_PORT);
  2451. //
  2452. // Begin sync reset, just in case this is an SVGA and the currently
  2453. // indexed Attribute Controller register controls clocking stuff (a
  2454. // normal VGA won't require this).
  2455. //
  2456. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  2457. SEQ_ADDRESS_PORT),
  2458. (USHORT) (IND_SYNC_RESET + (START_SYNC_RESET_VALUE << 8)));
  2459. //
  2460. // Now, write a different Index setting to the Attribute Controller, and
  2461. // see if the Index changes.
  2462. //
  2463. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2464. ATT_ADDRESS_PORT, (UCHAR) (originalACIndex ^ 0x10));
  2465. if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2466. ATT_ADDRESS_PORT) == originalACIndex) {
  2467. //
  2468. // The Index didn't change, so the toggle was in the Data state.
  2469. //
  2470. hardwareStateHeader->AttribIndexDataState = 1;
  2471. //
  2472. // Restore the original Data state; we just corrupted it, and we need
  2473. // to read it out later; also, it may glitch the screen if not
  2474. // corrected. The toggle is already in the Index state.
  2475. //
  2476. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2477. ATT_ADDRESS_PORT, originalACIndex);
  2478. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2479. ATT_DATA_WRITE_PORT, originalACData);
  2480. } else {
  2481. //
  2482. // The Index did change, so the toggle was in the Index state.
  2483. // No need to restore anything, because the Data register didn't
  2484. // change, and we've already read out the Index register.
  2485. //
  2486. hardwareStateHeader->AttribIndexDataState = 0;
  2487. }
  2488. //
  2489. // End sync reset.
  2490. //
  2491. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  2492. SEQ_ADDRESS_PORT),
  2493. (USHORT) (IND_SYNC_RESET + (END_SYNC_RESET_VALUE << 8)));
  2494. //
  2495. // Save the rest of the DAC registers.
  2496. // Set the DAC address port Index, then read out the DAC Data registers.
  2497. // Each three reads get Red, Green, and Blue components for that register.
  2498. //
  2499. // Read them one at a time due to problems on local bus machines.
  2500. //
  2501. for (i = 1; i < VGA_NUM_DAC_ENTRIES; i++) {
  2502. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2503. DAC_ADDRESS_READ_PORT, (UCHAR)i);
  2504. *portValueDAC++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2505. DAC_DATA_REG_PORT);
  2506. *portValueDAC++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2507. DAC_DATA_REG_PORT);
  2508. *portValueDAC++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2509. DAC_DATA_REG_PORT);
  2510. }
  2511. //
  2512. // The Feature Control register is read from 3CA but written at 3BA/3DA.
  2513. //
  2514. if (bIsColor) {
  2515. hardwareStateHeader->PortValue[FEAT_CTRL_WRITE_PORT_COLOR] =
  2516. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2517. FEAT_CTRL_READ_PORT);
  2518. } else {
  2519. hardwareStateHeader->PortValue[FEAT_CTRL_WRITE_PORT_MONO] =
  2520. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2521. FEAT_CTRL_READ_PORT);
  2522. }
  2523. //
  2524. // CRT Controller Index.
  2525. //
  2526. if (bIsColor) {
  2527. hardwareStateHeader->PortValue[CRTC_ADDRESS_PORT_COLOR] =
  2528. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2529. CRTC_ADDRESS_PORT_COLOR);
  2530. } else {
  2531. hardwareStateHeader->PortValue[CRTC_ADDRESS_PORT_MONO] =
  2532. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2533. CRTC_ADDRESS_PORT_MONO);
  2534. }
  2535. //
  2536. // Graphics Controller Index.
  2537. //
  2538. hardwareStateHeader->PortValue[GRAPH_ADDRESS_PORT] =
  2539. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2540. GRAPH_ADDRESS_PORT);
  2541. //
  2542. // Sequencer indexed registers.
  2543. //
  2544. portValue = ((PUCHAR) hardwareStateHeader) + VGA_BASIC_SEQUENCER_OFFSET;
  2545. for (i = 0; i < VGA_NUM_SEQUENCER_PORTS; i++) {
  2546. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2547. SEQ_ADDRESS_PORT, (UCHAR)i);
  2548. *portValue++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2549. SEQ_DATA_PORT);
  2550. }
  2551. //
  2552. // CRT Controller indexed registers.
  2553. //
  2554. //
  2555. // Remember the state of CRTC register 3, then force bit 7
  2556. // to 1 so we will read back the Vertical Retrace start and
  2557. // end registers rather than the light pen info.
  2558. //
  2559. if (bIsColor) {
  2560. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2561. CRTC_ADDRESS_PORT_COLOR, 3);
  2562. ucCRTC03 = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2563. CRTC_DATA_PORT_COLOR);
  2564. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2565. CRTC_DATA_PORT_COLOR, (UCHAR) (ucCRTC03 | 0x80));
  2566. } else {
  2567. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2568. CRTC_ADDRESS_PORT_MONO, 3);
  2569. ucCRTC03 = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2570. CRTC_DATA_PORT_MONO);
  2571. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2572. CRTC_DATA_PORT_MONO, (UCHAR) (ucCRTC03 | 0x80));
  2573. }
  2574. portValue = (PUCHAR) hardwareStateHeader + VGA_BASIC_CRTC_OFFSET;
  2575. for (i = 0; i < VGA_NUM_CRTC_PORTS; i++) {
  2576. if (bIsColor) {
  2577. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2578. CRTC_ADDRESS_PORT_COLOR, (UCHAR)i);
  2579. *portValue++ =
  2580. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2581. CRTC_DATA_PORT_COLOR);
  2582. } else {
  2583. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2584. CRTC_ADDRESS_PORT_MONO, (UCHAR)i);
  2585. *portValue++ =
  2586. VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2587. CRTC_DATA_PORT_MONO);
  2588. }
  2589. }
  2590. portValue = (PUCHAR) hardwareStateHeader + VGA_BASIC_CRTC_OFFSET;
  2591. portValue[3] = ucCRTC03;
  2592. //
  2593. // Graphics Controller indexed registers.
  2594. //
  2595. portValue = (PUCHAR) hardwareStateHeader + VGA_BASIC_GRAPH_CONT_OFFSET;
  2596. for (i = 0; i < VGA_NUM_GRAPH_CONT_PORTS; i++) {
  2597. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2598. GRAPH_ADDRESS_PORT, (UCHAR)i);
  2599. *portValue++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2600. GRAPH_DATA_PORT);
  2601. }
  2602. //
  2603. // Attribute Controller indexed registers.
  2604. //
  2605. portValue = (PUCHAR) hardwareStateHeader + VGA_BASIC_ATTRIB_CONT_OFFSET;
  2606. //
  2607. // For each indexed AC register, reset the flip-flop for reading the
  2608. // attribute register, then write the desired index to the AC Index,
  2609. // then read the value of the indexed register from the AC Data register.
  2610. //
  2611. for (i = 0; i < VGA_NUM_ATTRIB_CONT_PORTS; i++) {
  2612. if (bIsColor) {
  2613. dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2614. INPUT_STATUS_1_COLOR);
  2615. } else {
  2616. dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2617. INPUT_STATUS_1_MONO);
  2618. }
  2619. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2620. ATT_ADDRESS_PORT, (UCHAR)i);
  2621. *portValue++ = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2622. ATT_DATA_READ_PORT);
  2623. }
  2624. //
  2625. // Save the latches. This destroys one byte of display memory in each
  2626. // plane, which is unfortunate but unavoidable. Chips that provide
  2627. // a way to read back the latches can avoid this problem.
  2628. //
  2629. // Set up the VGA's hardware so we can write the latches, then read them
  2630. // back.
  2631. //
  2632. //
  2633. // Begin sync reset.
  2634. //
  2635. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  2636. SEQ_ADDRESS_PORT),
  2637. (USHORT) (IND_SYNC_RESET + (START_SYNC_RESET_VALUE << 8)));
  2638. //
  2639. // Set the Miscellaneous register to make sure we can access video RAM.
  2640. //
  2641. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2642. MISC_OUTPUT_REG_WRITE_PORT, (UCHAR)(
  2643. hardwareStateHeader->PortValue[MISC_OUTPUT_REG_WRITE_PORT] |
  2644. 0x02));
  2645. //
  2646. // Turn off Chain mode and map display memory at A0000 for 64K.
  2647. //
  2648. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2649. GRAPH_ADDRESS_PORT, IND_GRAPH_MISC);
  2650. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2651. GRAPH_DATA_PORT,
  2652. (UCHAR) ((VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2653. GRAPH_DATA_PORT) & 0xF1) | 0x04));
  2654. //
  2655. // Turn off Chain4 mode and odd/even.
  2656. //
  2657. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2658. SEQ_ADDRESS_PORT, IND_MEMORY_MODE);
  2659. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2660. SEQ_DATA_PORT,
  2661. (UCHAR) ((VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2662. SEQ_DATA_PORT) & 0xF3) | 0x04));
  2663. //
  2664. // End sync reset.
  2665. //
  2666. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  2667. SEQ_ADDRESS_PORT),
  2668. (USHORT) (IND_SYNC_RESET + (END_SYNC_RESET_VALUE << 8)));
  2669. //
  2670. // Set the Map Mask to write to all planes.
  2671. //
  2672. VideoPortWritePortUshort((PUSHORT) (HwDeviceExtension->IOAddress +
  2673. SEQ_ADDRESS_PORT), (USHORT) (IND_MAP_MASK + (0x0F << 8)));
  2674. //
  2675. // Set the write mode to 0, the read mode to 0, and turn off odd/even.
  2676. //
  2677. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2678. GRAPH_ADDRESS_PORT, IND_GRAPH_MODE);
  2679. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2680. GRAPH_DATA_PORT,
  2681. (UCHAR) ((VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
  2682. GRAPH_DATA_PORT) & 0xE4) | 0x01));
  2683. //
  2684. // Point to the last byte of display memory.
  2685. //
  2686. pScreen = (PUCHAR) HwDeviceExtension->VideoMemoryAddress +
  2687. VGA_PLANE_SIZE - 1;
  2688. //
  2689. // Write the latches to the last byte of display memory.
  2690. //
  2691. VideoPortWriteRegisterUchar(pScreen, 0);
  2692. //
  2693. // Cycle through the four planes, reading the latch data from each plane.
  2694. //
  2695. //
  2696. // Point the Graphics Controller Index to the Read Map register.
  2697. //
  2698. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2699. GRAPH_ADDRESS_PORT, IND_READ_MAP);
  2700. portValue = (PUCHAR) hardwareStateHeader + VGA_BASIC_LATCHES_OFFSET;
  2701. for (i=0; i<4; i++) {
  2702. //
  2703. // Set the Read Map for the current plane.
  2704. //
  2705. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2706. GRAPH_DATA_PORT, (UCHAR)i);
  2707. //
  2708. // Read the latched data we've written to memory.
  2709. //
  2710. *portValue++ = VideoPortReadRegisterUchar(pScreen);
  2711. }
  2712. //
  2713. // Set the VDM flags
  2714. // We are a standard VGA, and then check if we have unemulated state.
  2715. //
  2716. hardwareStateHeader->VGAStateFlags = 0;
  2717. if (HwDeviceExtension->TrappedValidatorCount) {
  2718. hardwareStateHeader->VGAStateFlags |= VIDEO_STATE_UNEMULATED_VGA_STATE;
  2719. //
  2720. // Save the VDM Emulator data
  2721. // No need to save the state of the sequencer port register for our
  2722. // emulated data since it may change when we come back. It will be
  2723. // recomputed.
  2724. //
  2725. hardwareStateHeader->ExtendedValidatorStateOffset = VGA_VALIDATOR_OFFSET;
  2726. VideoPortMoveMemory(((PUCHAR) (hardwareStateHeader)) +
  2727. hardwareStateHeader->ExtendedValidatorStateOffset,
  2728. &(HwDeviceExtension->TrappedValidatorCount),
  2729. VGA_VALIDATOR_AREA_SIZE);
  2730. } else {
  2731. hardwareStateHeader->ExtendedValidatorStateOffset = 0;
  2732. }
  2733. //
  2734. // Set the size of each plane.
  2735. //
  2736. hardwareStateHeader->PlaneLength = VGA_PLANE_SIZE;
  2737. //
  2738. // Store all the offsets for the planes in the structure.
  2739. //
  2740. hardwareStateHeader->Plane1Offset = VGA_PLANE_0_OFFSET;
  2741. hardwareStateHeader->Plane2Offset = VGA_PLANE_1_OFFSET;
  2742. hardwareStateHeader->Plane3Offset = VGA_PLANE_2_OFFSET;
  2743. hardwareStateHeader->Plane4Offset = VGA_PLANE_3_OFFSET;
  2744. //
  2745. // Now copy the contents of video VRAM into the buffer.
  2746. //
  2747. // The VGA hardware is already set up so that video memory is readable;
  2748. // we already turned off Chain mode, mapped in at A0000, turned off Chain4,
  2749. // turned off odd/even, and set read mode 0 when we saved the latches.
  2750. //
  2751. // Point the Graphics Controller Index to the Read Map register.
  2752. //
  2753. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2754. GRAPH_ADDRESS_PORT, IND_READ_MAP);
  2755. //
  2756. // Point to the save area for the first plane.
  2757. //
  2758. bufferPointer = ((PUCHAR) (hardwareStateHeader)) +
  2759. hardwareStateHeader->Plane1Offset;
  2760. //
  2761. // Save the four planes consecutively.
  2762. //
  2763. for (i = 0; i < 4; i++) {
  2764. //
  2765. // Set the Read Map to select the plane we want to save next.
  2766. //
  2767. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2768. GRAPH_DATA_PORT, (UCHAR)i);
  2769. //
  2770. // Copy this plane into the buffer.
  2771. //
  2772. VideoPortMoveMemory(bufferPointer,
  2773. (PUCHAR) HwDeviceExtension->VideoMemoryAddress,
  2774. VGA_PLANE_SIZE);
  2775. //
  2776. // Point to the next plane's save area.
  2777. //
  2778. bufferPointer += VGA_PLANE_SIZE;
  2779. }
  2780. //
  2781. // Reenable video output
  2782. //
  2783. VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
  2784. DAC_PIXEL_MASK_PORT, 0xff);
  2785. return NO_ERROR;
  2786. } // end VgaSaveHardwareState()
  2787. VP_STATUS
  2788. VgaGetBankSelectCode(
  2789. PHW_DEVICE_EXTENSION HwDeviceExtension,
  2790. PVIDEO_BANK_SELECT BankSelect,
  2791. ULONG BankSelectSize,
  2792. PULONG OutputSize
  2793. )
  2794. /*++
  2795. Routine Description:
  2796. Returns information needed in order for caller to implement bank
  2797. management.
  2798. Arguments:
  2799. HwDeviceExtension - Pointer to the miniport driver's device extension.
  2800. BankSelect - Pointer to a VIDEO_BANK_SELECT structure in which the bank
  2801. select data will be returned (output buffer).
  2802. BankSelectSize - Length of the output buffer supplied by the user.
  2803. OutputSize - Pointer to a variable in which to return the actual size of
  2804. the data returned in the output buffer.
  2805. Return Value:
  2806. NO_ERROR - information returned successfully
  2807. ERROR_MORE_DATA - output buffer not large enough to hold all info (but
  2808. Size is returned, so caller can tell how large a buffer to allocate)
  2809. ERROR_INSUFFICIENT_BUFFER - output buffer not large enough to return
  2810. any useful data
  2811. --*/
  2812. {
  2813. ULONG codeSize = (ULONG)(((ULONG_PTR)&BankSwitchEnd) - ((ULONG_PTR)&BankSwitchStart));
  2814. PUCHAR pCode = (PUCHAR)BankSelect + sizeof(VIDEO_BANK_SELECT);
  2815. //
  2816. // check if a mode has been set
  2817. //
  2818. if (HwDeviceExtension->CurrentMode == NULL) {
  2819. return ERROR_INVALID_FUNCTION;
  2820. }
  2821. //
  2822. // The minimum passed buffer size is a VIDEO_BANK_SELECT
  2823. // structure, so that we can return the required size; we can't do
  2824. // anything if we don't have at least that much buffer.
  2825. //
  2826. if (BankSelectSize < sizeof(VIDEO_BANK_SELECT)) {
  2827. return ERROR_INSUFFICIENT_BUFFER;
  2828. }
  2829. //
  2830. // Size of banking info.
  2831. //
  2832. BankSelect->Length = sizeof(VIDEO_BANK_SELECT);
  2833. BankSelect->Size = sizeof(VIDEO_BANK_SELECT) + codeSize;
  2834. //
  2835. // There's room enough for everything, so fill in required fields in
  2836. // VIDEO_BANK_SELECT.
  2837. //
  2838. // That's pretty easy in this case, since there's no banking; only
  2839. // the banking type, the bitmap width, and the bitmap size need to be
  2840. // filled in. We'll provide dummy bank switch code, too, that just
  2841. // returns, because it shouldn't ever be called.
  2842. //
  2843. BankSelect->BankingFlags = 0;
  2844. BankSelect->BankingType = VideoBanked1RW;
  2845. BankSelect->PlanarHCBankingType = VideoBanked1RW;
  2846. BankSelect->BitmapWidthInBytes = HwDeviceExtension->CurrentMode->wbytes;
  2847. BankSelect->BitmapSize = HwDeviceExtension->CurrentMode->sbytes;
  2848. BankSelect->Granularity = HwDeviceExtension->CurrentMode->Granularity;
  2849. if(! BankSelect->Granularity )
  2850. BankSelect->Granularity = 0x10000;
  2851. BankSelect->PlanarHCGranularity = BankSelect->Granularity >> 2;
  2852. //
  2853. // If the buffer isn't big enough to hold all info, just return
  2854. // ERROR_MORE_DATA; Size is already set.
  2855. //
  2856. if (BankSelectSize < BankSelect->Size ) {
  2857. //
  2858. // We're returning only the VIDEO_BANK_SELECT structure.
  2859. //
  2860. *OutputSize = sizeof(VIDEO_BANK_SELECT);
  2861. return ERROR_MORE_DATA;
  2862. }
  2863. //
  2864. // Set the bank switch code's location in the returned buffer.
  2865. //
  2866. BankSelect->CodeOffset = sizeof(VIDEO_BANK_SELECT);
  2867. BankSelect->PlanarHCBankCodeOffset = sizeof(VIDEO_BANK_SELECT);
  2868. BankSelect->PlanarHCEnableCodeOffset = sizeof(VIDEO_BANK_SELECT);
  2869. BankSelect->PlanarHCDisableCodeOffset = sizeof(VIDEO_BANK_SELECT);
  2870. //
  2871. // Copy the code (just a RET; this code should never be called, since
  2872. // there's no banking in any mode supported by this miniport, and we want
  2873. // to flag such an incorrect call unmistakably) into the output buffer.
  2874. //
  2875. VideoPortMoveMemory(pCode,
  2876. &BankSwitchStart,
  2877. codeSize);
  2878. //
  2879. // Number of bytes we're returning is the full banking info size.
  2880. //
  2881. *OutputSize = BankSelect->Size;
  2882. return NO_ERROR;
  2883. } // end VgaGetBankSelectCode()
  2884. VP_STATUS
  2885. VgaValidatorUcharEntry(
  2886. ULONG_PTR Context,
  2887. ULONG Port,
  2888. UCHAR AccessMode,
  2889. PUCHAR Data
  2890. )
  2891. /*++
  2892. Routine Description:
  2893. Entry point into the validator for byte I/O operations.
  2894. The entry point will be called whenever a byte operation was performed
  2895. by a DOS application on one of the specified Video ports. The kernel
  2896. emulator will forward these requests.
  2897. Arguments:
  2898. Context - Context value that is passed to each call made to the validator
  2899. function. This is the value the miniport driver specified in the
  2900. MiniportConfigInfo->EmulatorAccessEntriesContext.
  2901. Port - Port on which the operation is to be performed.
  2902. AccessMode - Determines if it is a read or write operation.
  2903. Data - Pointer to a variable containing the data to be written or a
  2904. variable into which the read data should be stored.
  2905. Return Value:
  2906. NO_ERROR.
  2907. --*/
  2908. {
  2909. PHW_DEVICE_EXTENSION hwDeviceExtension = (PHW_DEVICE_EXTENSION) Context;
  2910. ULONG endEmulation;
  2911. UCHAR temp;
  2912. Port -= VGA_BASE_IO_PORT;
  2913. if (hwDeviceExtension->TrappedValidatorCount) {
  2914. //
  2915. // If we are processing a WRITE instruction, then store it in the
  2916. // playback buffer. If the buffer is full, then play it back right
  2917. // away, end sync reset and reinitialize the buffer with a sync
  2918. // reset instruction.
  2919. //
  2920. // If we have a READ, we must flush the buffer (which has the side
  2921. // effect of starting SyncReset), perform the read operation, stop
  2922. // sync reset, and put back a sync reset instruction in the buffer
  2923. // so we can go on appropriately
  2924. //
  2925. if (AccessMode & EMULATOR_WRITE_ACCESS) {
  2926. //
  2927. // Make sure Bit 3 of the Miscellaneous register is always 0.
  2928. // If it is 1 it could select a non-existent clock, and kill the
  2929. // system
  2930. //
  2931. if (Port == MISC_OUTPUT_REG_WRITE_PORT) {
  2932. *Data &= 0xF7;
  2933. }
  2934. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  2935. TrappedValidatorCount].Port = Port;
  2936. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  2937. TrappedValidatorCount].AccessType = VGA_VALIDATOR_UCHAR_ACCESS;
  2938. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  2939. TrappedValidatorCount].Data = *Data;
  2940. hwDeviceExtension->TrappedValidatorCount++;
  2941. //
  2942. // Check to see if this instruction was ending sync reset.
  2943. // If it did, we must flush the buffer and reset the trapped
  2944. // IO ports to the minimal set.
  2945. //
  2946. if ( (Port == SEQ_DATA_PORT) &&
  2947. ((*Data & END_SYNC_RESET_VALUE) == END_SYNC_RESET_VALUE) &&
  2948. (hwDeviceExtension->SequencerAddressValue == IND_SYNC_RESET)) {
  2949. endEmulation = 1;
  2950. } else {
  2951. //
  2952. // If we are accessing the seq address port, keep track of the
  2953. // data value
  2954. //
  2955. if (Port == SEQ_ADDRESS_PORT) {
  2956. hwDeviceExtension->SequencerAddressValue = *Data;
  2957. }
  2958. //
  2959. // If the buffer is not full, then just return right away.
  2960. //
  2961. if (hwDeviceExtension->TrappedValidatorCount <
  2962. VGA_MAX_VALIDATOR_DATA - 1) {
  2963. return NO_ERROR;
  2964. }
  2965. endEmulation = 0;
  2966. }
  2967. }
  2968. //
  2969. // We are either in a READ path or a WRITE path that caused a
  2970. // a full buffer. So flush the buffer either way.
  2971. //
  2972. // To do this put an END_SYNC_RESET at the end since we want to make
  2973. // the buffer is ended sync reset ended.
  2974. //
  2975. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  2976. TrappedValidatorCount].Port = SEQ_ADDRESS_PORT;
  2977. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  2978. TrappedValidatorCount].AccessType = VGA_VALIDATOR_USHORT_ACCESS;
  2979. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  2980. TrappedValidatorCount].Data = (USHORT) (IND_SYNC_RESET +
  2981. (END_SYNC_RESET_VALUE << 8));
  2982. hwDeviceExtension->TrappedValidatorCount++;
  2983. VideoPortSynchronizeExecution(hwDeviceExtension,
  2984. VpHighPriority,
  2985. (PMINIPORT_SYNCHRONIZE_ROUTINE)
  2986. VgaPlaybackValidatorData,
  2987. hwDeviceExtension);
  2988. //
  2989. // Write back the real value of the sequencer address port.
  2990. //
  2991. VideoPortWritePortUchar(hwDeviceExtension->IOAddress +
  2992. SEQ_ADDRESS_PORT,
  2993. (UCHAR) hwDeviceExtension->SequencerAddressValue);
  2994. //
  2995. // If we are in a READ path, read the data
  2996. //
  2997. if (AccessMode & EMULATOR_READ_ACCESS) {
  2998. *Data = VideoPortReadPortUchar(hwDeviceExtension->IOAddress + Port);
  2999. endEmulation = 0;
  3000. }
  3001. //
  3002. // If we are ending emulation, reset trapping to the minimal amount
  3003. // and exit.
  3004. //
  3005. if (endEmulation) {
  3006. VideoPortSetTrappedEmulatorPorts(hwDeviceExtension,
  3007. NUM_MINIMAL_VGA_VALIDATOR_ACCESS_RANGE,
  3008. MinimalVgaValidatorAccessRange);
  3009. return NO_ERROR;
  3010. }
  3011. //
  3012. // For both cases, put back a START_SYNC_RESET in the buffer.
  3013. //
  3014. hwDeviceExtension->TrappedValidatorCount = 1;
  3015. hwDeviceExtension->TrappedValidatorData[0].Port = SEQ_ADDRESS_PORT;
  3016. hwDeviceExtension->TrappedValidatorData[0].AccessType =
  3017. VGA_VALIDATOR_USHORT_ACCESS;
  3018. hwDeviceExtension->TrappedValidatorData[0].Data =
  3019. (ULONG) (IND_SYNC_RESET + (START_SYNC_RESET_VALUE << 8));
  3020. } else {
  3021. //
  3022. // Nothing trapped.
  3023. // Lets check is the IO is trying to do something that would require
  3024. // us to stop trapping
  3025. //
  3026. if (AccessMode & EMULATOR_WRITE_ACCESS) {
  3027. //
  3028. // Make sure Bit 3 of the Miscelaneous register is always 0.
  3029. // If it is 1 it could select a non-existant clock, and kill the
  3030. // system
  3031. //
  3032. if (Port == MISC_OUTPUT_REG_WRITE_PORT) {
  3033. temp = VideoPortReadPortUchar(hwDeviceExtension->IOAddress +
  3034. SEQ_ADDRESS_PORT);
  3035. VideoPortWritePortUshort((PUSHORT) (hwDeviceExtension->IOAddress +
  3036. SEQ_ADDRESS_PORT),
  3037. (USHORT) (IND_SYNC_RESET +
  3038. (START_SYNC_RESET_VALUE << 8)));
  3039. VideoPortWritePortUchar(hwDeviceExtension->IOAddress + Port,
  3040. (UCHAR) (*Data & 0xF7) );
  3041. VideoPortWritePortUshort((PUSHORT) (hwDeviceExtension->IOAddress +
  3042. SEQ_ADDRESS_PORT),
  3043. (USHORT) (IND_SYNC_RESET +
  3044. (END_SYNC_RESET_VALUE << 8)));
  3045. VideoPortWritePortUchar(hwDeviceExtension->IOAddress +
  3046. SEQ_ADDRESS_PORT,
  3047. temp);
  3048. return NO_ERROR;
  3049. }
  3050. //
  3051. // If we get an access to the sequencer register, start trapping.
  3052. //
  3053. if ( (Port == SEQ_DATA_PORT) &&
  3054. ((*Data & END_SYNC_RESET_VALUE) != END_SYNC_RESET_VALUE) &&
  3055. (VideoPortReadPortUchar(hwDeviceExtension->IOAddress +
  3056. SEQ_ADDRESS_PORT) == IND_SYNC_RESET)) {
  3057. VideoPortSetTrappedEmulatorPorts(hwDeviceExtension,
  3058. NUM_FULL_VGA_VALIDATOR_ACCESS_RANGE,
  3059. FullVgaValidatorAccessRange);
  3060. hwDeviceExtension->TrappedValidatorCount = 1;
  3061. hwDeviceExtension->TrappedValidatorData[0].Port = Port;
  3062. hwDeviceExtension->TrappedValidatorData[0].AccessType =
  3063. VGA_VALIDATOR_UCHAR_ACCESS;
  3064. hwDeviceExtension->TrappedValidatorData[0].Data = *Data;
  3065. //
  3066. // Start keeping track of the state of the sequencer port.
  3067. //
  3068. hwDeviceExtension->SequencerAddressValue = IND_SYNC_RESET;
  3069. } else {
  3070. VideoPortWritePortUchar(hwDeviceExtension->IOAddress + Port,
  3071. *Data);
  3072. }
  3073. } else {
  3074. *Data = VideoPortReadPortUchar(hwDeviceExtension->IOAddress + Port);
  3075. }
  3076. }
  3077. return NO_ERROR;
  3078. } // end VgaValidatorUcharEntry()
  3079. VP_STATUS
  3080. VgaValidatorUshortEntry(
  3081. ULONG_PTR Context,
  3082. ULONG Port,
  3083. UCHAR AccessMode,
  3084. PUSHORT Data
  3085. )
  3086. /*++
  3087. Routine Description:
  3088. Entry point into the validator for word I/O operations.
  3089. The entry point will be called whenever a byte operation was performed
  3090. by a DOS application on one of the specified Video ports. The kernel
  3091. emulator will forward these requests.
  3092. Arguments:
  3093. Context - Context value that is passed to each call made to the validator
  3094. function. This is the value the miniport driver specified in the
  3095. MiniportConfigInfo->EmulatorAccessEntriesContext.
  3096. Port - Port on which the operation is to be performed.
  3097. AccessMode - Determines if it is a read or write operation.
  3098. Data - Pointer to a variable containing the data to be written or a
  3099. variable into which the read data should be stored.
  3100. Return Value:
  3101. NO_ERROR.
  3102. --*/
  3103. {
  3104. PHW_DEVICE_EXTENSION hwDeviceExtension = (PHW_DEVICE_EXTENSION) Context;
  3105. ULONG endEmulation;
  3106. UCHAR temp;
  3107. Port -= VGA_BASE_IO_PORT;
  3108. if (hwDeviceExtension->TrappedValidatorCount) {
  3109. //
  3110. // If we are processing a WRITE instruction, then store it in the
  3111. // playback buffer. If the buffer is full, then play it back right
  3112. // away, end sync reset and reinitialize the buffer with a sync
  3113. // reset instruction.
  3114. //
  3115. // If we have a READ, we must flush the buffer (which has the side
  3116. // effect of starting SyncReset), perform the read operation, stop
  3117. // sync reset, and put back a sync reset instruction in the buffer
  3118. // so we can go on appropriately
  3119. //
  3120. if (AccessMode & EMULATOR_WRITE_ACCESS) {
  3121. //
  3122. // Make sure Bit 3 of the Miscellaneous register is always 0.
  3123. // If it is 1 it could select a non-existent clock, and kill the
  3124. // system
  3125. //
  3126. if (Port == MISC_OUTPUT_REG_WRITE_PORT) {
  3127. *Data &= 0xFFF7;
  3128. }
  3129. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3130. TrappedValidatorCount].Port = Port;
  3131. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3132. TrappedValidatorCount].AccessType = VGA_VALIDATOR_USHORT_ACCESS;
  3133. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3134. TrappedValidatorCount].Data = *Data;
  3135. hwDeviceExtension->TrappedValidatorCount++;
  3136. //
  3137. // Check to see if this instruction was ending sync reset.
  3138. // If it did, we must flush the buffer and reset the trapped
  3139. // IO ports to the minimal set.
  3140. //
  3141. if (Port == SEQ_ADDRESS_PORT) {
  3142. //
  3143. // If we are accessing the seq address port, keep track of its
  3144. // value
  3145. //
  3146. hwDeviceExtension->SequencerAddressValue = (*Data & 0xFF);
  3147. }
  3148. if ((Port == SEQ_ADDRESS_PORT) &&
  3149. ( ((*Data >> 8) & END_SYNC_RESET_VALUE) ==
  3150. END_SYNC_RESET_VALUE) &&
  3151. (hwDeviceExtension->SequencerAddressValue == IND_SYNC_RESET)) {
  3152. endEmulation = 1;
  3153. } else {
  3154. //
  3155. // If the buffer is not full, then just return right away.
  3156. //
  3157. if (hwDeviceExtension->TrappedValidatorCount <
  3158. VGA_MAX_VALIDATOR_DATA - 1) {
  3159. return NO_ERROR;
  3160. }
  3161. endEmulation = 0;
  3162. }
  3163. }
  3164. //
  3165. // We are either in a READ path or a WRITE path that caused a
  3166. // a full buffer. So flush the buffer either way.
  3167. //
  3168. // To do this put an END_SYNC_RESET at the end since we want to make
  3169. // the buffer is ended sync reset ended.
  3170. //
  3171. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3172. TrappedValidatorCount].Port = SEQ_ADDRESS_PORT;
  3173. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3174. TrappedValidatorCount].AccessType = VGA_VALIDATOR_USHORT_ACCESS;
  3175. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3176. TrappedValidatorCount].Data = (USHORT) (IND_SYNC_RESET +
  3177. (END_SYNC_RESET_VALUE << 8));
  3178. hwDeviceExtension->TrappedValidatorCount++;
  3179. VideoPortSynchronizeExecution(hwDeviceExtension,
  3180. VpHighPriority,
  3181. (PMINIPORT_SYNCHRONIZE_ROUTINE)
  3182. VgaPlaybackValidatorData,
  3183. hwDeviceExtension);
  3184. //
  3185. // Write back the real value of the sequencer address port.
  3186. //
  3187. VideoPortWritePortUchar((PUCHAR) (hwDeviceExtension->IOAddress +
  3188. SEQ_ADDRESS_PORT),
  3189. (UCHAR) hwDeviceExtension->SequencerAddressValue);
  3190. //
  3191. // If we are in a READ path, read the data
  3192. //
  3193. if (AccessMode & EMULATOR_READ_ACCESS) {
  3194. *Data = VideoPortReadPortUshort((PUSHORT)(hwDeviceExtension->IOAddress
  3195. + Port));
  3196. endEmulation = 0;
  3197. }
  3198. //
  3199. // If we are ending emulation, reset trapping to the minimal amount
  3200. // and exit.
  3201. //
  3202. if (endEmulation) {
  3203. VideoPortSetTrappedEmulatorPorts(hwDeviceExtension,
  3204. NUM_MINIMAL_VGA_VALIDATOR_ACCESS_RANGE,
  3205. MinimalVgaValidatorAccessRange);
  3206. return NO_ERROR;
  3207. }
  3208. //
  3209. // For both cases, put back a START_SYNC_RESET in the buffer.
  3210. //
  3211. hwDeviceExtension->TrappedValidatorCount = 1;
  3212. hwDeviceExtension->TrappedValidatorData[0].Port = SEQ_ADDRESS_PORT;
  3213. hwDeviceExtension->TrappedValidatorData[0].AccessType =
  3214. VGA_VALIDATOR_USHORT_ACCESS;
  3215. hwDeviceExtension->TrappedValidatorData[0].Data =
  3216. (ULONG) (IND_SYNC_RESET + (START_SYNC_RESET_VALUE << 8));
  3217. } else {
  3218. //
  3219. // Nothing trapped.
  3220. // Lets check is the IO is trying to do something that would require
  3221. // us to stop trapping
  3222. //
  3223. if (AccessMode & EMULATOR_WRITE_ACCESS) {
  3224. //
  3225. // Make sure Bit 3 of the Miscelaneous register is always 0.
  3226. // If it is 1 it could select a non-existant clock, and kill the
  3227. // system
  3228. //
  3229. if (Port == MISC_OUTPUT_REG_WRITE_PORT) {
  3230. temp = VideoPortReadPortUchar(hwDeviceExtension->IOAddress +
  3231. SEQ_ADDRESS_PORT);
  3232. VideoPortWritePortUshort((PUSHORT) (hwDeviceExtension->IOAddress +
  3233. SEQ_ADDRESS_PORT),
  3234. (USHORT) (IND_SYNC_RESET +
  3235. (START_SYNC_RESET_VALUE << 8)));
  3236. VideoPortWritePortUshort((PUSHORT) (hwDeviceExtension->IOAddress +
  3237. (ULONG)Port),
  3238. (USHORT) (*Data & 0xFFF7) );
  3239. VideoPortWritePortUshort((PUSHORT) (hwDeviceExtension->IOAddress +
  3240. SEQ_ADDRESS_PORT),
  3241. (USHORT) (IND_SYNC_RESET +
  3242. (END_SYNC_RESET_VALUE << 8)));
  3243. VideoPortWritePortUchar(hwDeviceExtension->IOAddress + SEQ_ADDRESS_PORT,
  3244. temp);
  3245. return NO_ERROR;
  3246. }
  3247. if ( (Port == SEQ_ADDRESS_PORT) &&
  3248. (((*Data>> 8) & END_SYNC_RESET_VALUE) != END_SYNC_RESET_VALUE) &&
  3249. ((*Data & 0xFF) == IND_SYNC_RESET)) {
  3250. VideoPortSetTrappedEmulatorPorts(hwDeviceExtension,
  3251. NUM_FULL_VGA_VALIDATOR_ACCESS_RANGE,
  3252. FullVgaValidatorAccessRange);
  3253. hwDeviceExtension->TrappedValidatorCount = 1;
  3254. hwDeviceExtension->TrappedValidatorData[0].Port = Port;
  3255. hwDeviceExtension->TrappedValidatorData[0].AccessType =
  3256. VGA_VALIDATOR_USHORT_ACCESS;
  3257. hwDeviceExtension->TrappedValidatorData[0].Data = *Data;
  3258. //
  3259. // Start keeping track of the state of the sequencer port.
  3260. //
  3261. hwDeviceExtension->SequencerAddressValue = IND_SYNC_RESET;
  3262. } else {
  3263. VideoPortWritePortUshort((PUSHORT)(hwDeviceExtension->IOAddress +
  3264. Port),
  3265. *Data);
  3266. }
  3267. } else {
  3268. *Data = VideoPortReadPortUshort((PUSHORT)(hwDeviceExtension->IOAddress +
  3269. Port));
  3270. }
  3271. }
  3272. return NO_ERROR;
  3273. } // end VgaValidatorUshortEntry()
  3274. VP_STATUS
  3275. VgaValidatorUlongEntry(
  3276. ULONG_PTR Context,
  3277. ULONG Port,
  3278. UCHAR AccessMode,
  3279. PULONG Data
  3280. )
  3281. /*++
  3282. Routine Description:
  3283. Entry point into the validator for dword I/O operations.
  3284. The entry point will be called whenever a byte operation was performed
  3285. by a DOS application on one of the specified Video ports. The kernel
  3286. emulator will forward these requests.
  3287. Arguments:
  3288. Context - Context value that is passed to each call made to the validator
  3289. function. This is the value the miniport driver specified in the
  3290. MiniportConfigInfo->EmulatorAccessEntriesContext.
  3291. Port - Port on which the operation is to be performed.
  3292. AccessMode - Determines if it is a read or write operation.
  3293. Data - Pointer to a variable containing the data to be written or a
  3294. variable into which the read data should be stored.
  3295. Return Value:
  3296. NO_ERROR.
  3297. --*/
  3298. {
  3299. PHW_DEVICE_EXTENSION hwDeviceExtension = (PHW_DEVICE_EXTENSION) Context;
  3300. ULONG endEmulation;
  3301. UCHAR temp;
  3302. Port -= VGA_BASE_IO_PORT;
  3303. if (hwDeviceExtension->TrappedValidatorCount) {
  3304. //
  3305. // If we are processing a WRITE instruction, then store it in the
  3306. // playback buffer. If the buffer is full, then play it back right
  3307. // away, end sync reset and reinitialize the buffer with a sync
  3308. // reset instruction.
  3309. //
  3310. // If we have a READ, we must flush the buffer (which has the side
  3311. // effect of starting SyncReset), perform the read operation, stop
  3312. // sync reset, and put back a sync reset instruction in the buffer
  3313. // so we can go on appropriately
  3314. //
  3315. if (AccessMode & EMULATOR_WRITE_ACCESS) {
  3316. //
  3317. // Make sure Bit 3 of the Miscellaneous register is always 0.
  3318. // If it is 1 it could select a non-existent clock, and kill the
  3319. // system
  3320. //
  3321. if (Port == MISC_OUTPUT_REG_WRITE_PORT) {
  3322. *Data &= 0xFFFFFFF7;
  3323. }
  3324. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3325. TrappedValidatorCount].Port = Port;
  3326. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3327. TrappedValidatorCount].AccessType = VGA_VALIDATOR_ULONG_ACCESS;
  3328. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3329. TrappedValidatorCount].Data = *Data;
  3330. hwDeviceExtension->TrappedValidatorCount++;
  3331. //
  3332. // Check to see if this instruction was ending sync reset.
  3333. // If it did, we must flush the buffer and reset the trapped
  3334. // IO ports to the minimal set.
  3335. //
  3336. if (Port == SEQ_ADDRESS_PORT) {
  3337. //
  3338. // If we are accessing the seq address port, keep track of its
  3339. // value
  3340. //
  3341. hwDeviceExtension->SequencerAddressValue = (*Data & 0xFF);
  3342. }
  3343. if ((Port == SEQ_ADDRESS_PORT) &&
  3344. ( ((*Data >> 8) & END_SYNC_RESET_VALUE) ==
  3345. END_SYNC_RESET_VALUE) &&
  3346. (hwDeviceExtension->SequencerAddressValue == IND_SYNC_RESET)) {
  3347. endEmulation = 1;
  3348. } else {
  3349. //
  3350. // If the buffer is not full, then just return right away.
  3351. //
  3352. if (hwDeviceExtension->TrappedValidatorCount <
  3353. VGA_MAX_VALIDATOR_DATA - 1) {
  3354. return NO_ERROR;
  3355. }
  3356. endEmulation = 0;
  3357. }
  3358. }
  3359. //
  3360. // We are either in a READ path or a WRITE path that caused a
  3361. // a full buffer. So flush the buffer either way.
  3362. //
  3363. // To do this put an END_SYNC_RESET at the end since we want to make
  3364. // the buffer is ended sync reset ended.
  3365. //
  3366. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3367. TrappedValidatorCount].Port = SEQ_ADDRESS_PORT;
  3368. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3369. TrappedValidatorCount].AccessType = VGA_VALIDATOR_USHORT_ACCESS;
  3370. hwDeviceExtension->TrappedValidatorData[hwDeviceExtension->
  3371. TrappedValidatorCount].Data = (USHORT) (IND_SYNC_RESET +
  3372. (END_SYNC_RESET_VALUE << 8));
  3373. hwDeviceExtension->TrappedValidatorCount++;
  3374. VideoPortSynchronizeExecution(hwDeviceExtension,
  3375. VpHighPriority,
  3376. (PMINIPORT_SYNCHRONIZE_ROUTINE)
  3377. VgaPlaybackValidatorData,
  3378. hwDeviceExtension);
  3379. //
  3380. // Write back the real value of the sequencer address port.
  3381. //
  3382. VideoPortWritePortUchar(hwDeviceExtension->IOAddress +
  3383. SEQ_ADDRESS_PORT,
  3384. (UCHAR) hwDeviceExtension->SequencerAddressValue);
  3385. //
  3386. // If we are in a READ path, read the data
  3387. //
  3388. if (AccessMode & EMULATOR_READ_ACCESS) {
  3389. *Data = VideoPortReadPortUlong((PULONG) (hwDeviceExtension->IOAddress +
  3390. Port));
  3391. endEmulation = 0;
  3392. }
  3393. //
  3394. // If we are ending emulation, reset trapping to the minimal amount
  3395. // and exit.
  3396. //
  3397. if (endEmulation) {
  3398. VideoPortSetTrappedEmulatorPorts(hwDeviceExtension,
  3399. NUM_MINIMAL_VGA_VALIDATOR_ACCESS_RANGE,
  3400. MinimalVgaValidatorAccessRange);
  3401. return NO_ERROR;
  3402. }
  3403. //
  3404. // For both cases, put back a START_SYNC_RESET in the buffer.
  3405. //
  3406. hwDeviceExtension->TrappedValidatorCount = 1;
  3407. hwDeviceExtension->TrappedValidatorData[0].Port = SEQ_ADDRESS_PORT;
  3408. hwDeviceExtension->TrappedValidatorData[0].AccessType =
  3409. VGA_VALIDATOR_USHORT_ACCESS;
  3410. hwDeviceExtension->TrappedValidatorData[0].Data =
  3411. (ULONG) (IND_SYNC_RESET + (START_SYNC_RESET_VALUE << 8));
  3412. } else {
  3413. //
  3414. // Nothing trapped.
  3415. // Lets check is the IO is trying to do something that would require
  3416. // us to stop trapping
  3417. //
  3418. if (AccessMode & EMULATOR_WRITE_ACCESS) {
  3419. //
  3420. // Make sure Bit 3 of the Miscelaneous register is always 0.
  3421. // If it is 1 it could select a non-existant clock, and kill the
  3422. // system
  3423. //
  3424. if (Port == MISC_OUTPUT_REG_WRITE_PORT) {
  3425. temp = VideoPortReadPortUchar(hwDeviceExtension->IOAddress +
  3426. SEQ_ADDRESS_PORT);
  3427. VideoPortWritePortUshort((PUSHORT) (hwDeviceExtension->IOAddress +
  3428. SEQ_ADDRESS_PORT),
  3429. (USHORT) (IND_SYNC_RESET +
  3430. (START_SYNC_RESET_VALUE << 8)));
  3431. VideoPortWritePortUlong((PULONG) (hwDeviceExtension->IOAddress +
  3432. Port),
  3433. (ULONG) (*Data & 0xFFFFFFF7) );
  3434. VideoPortWritePortUshort((PUSHORT) (hwDeviceExtension->IOAddress +
  3435. SEQ_ADDRESS_PORT),
  3436. (USHORT) (IND_SYNC_RESET +
  3437. (END_SYNC_RESET_VALUE << 8)));
  3438. VideoPortWritePortUchar(hwDeviceExtension->IOAddress + SEQ_ADDRESS_PORT,
  3439. temp);
  3440. return NO_ERROR;
  3441. }
  3442. if ( (Port == SEQ_ADDRESS_PORT) &&
  3443. (((*Data>> 8) & END_SYNC_RESET_VALUE) != END_SYNC_RESET_VALUE) &&
  3444. ((*Data & 0xFF) == IND_SYNC_RESET)) {
  3445. VideoPortSetTrappedEmulatorPorts(hwDeviceExtension,
  3446. NUM_FULL_VGA_VALIDATOR_ACCESS_RANGE,
  3447. FullVgaValidatorAccessRange);
  3448. hwDeviceExtension->TrappedValidatorCount = 1;
  3449. hwDeviceExtension->TrappedValidatorData[0].Port = Port;
  3450. hwDeviceExtension->TrappedValidatorData[0].AccessType =
  3451. VGA_VALIDATOR_ULONG_ACCESS;
  3452. hwDeviceExtension->TrappedValidatorData[0].Data = *Data;
  3453. //
  3454. // Start keeping track of the state of the sequencer port.
  3455. //
  3456. hwDeviceExtension->SequencerAddressValue = IND_SYNC_RESET;
  3457. } else {
  3458. VideoPortWritePortUlong((PULONG) (hwDeviceExtension->IOAddress +
  3459. Port),
  3460. *Data);
  3461. }
  3462. } else {
  3463. *Data = VideoPortReadPortUlong((PULONG) (hwDeviceExtension->IOAddress +
  3464. Port));
  3465. }
  3466. }
  3467. return NO_ERROR;
  3468. } // end VgaValidatorUlongEntry()
  3469. BOOLEAN
  3470. VgaPlaybackValidatorData(
  3471. PVOID Context
  3472. )
  3473. /*++
  3474. Routine Description:
  3475. Performs all the DOS apps IO port accesses that were trapped by the
  3476. validator. Only IO accesses that can be processed are WRITEs
  3477. The number of outstanding IO access in deviceExtension is set to
  3478. zero as a side effect.
  3479. This function must be called via a call to VideoPortSynchronizeRoutine.
  3480. Arguments:
  3481. Context - Context parameter passed to the synchronized routine.
  3482. Must be a pointer to the miniport driver's device extension.
  3483. Return Value:
  3484. TRUE.
  3485. --*/
  3486. {
  3487. PHW_DEVICE_EXTENSION hwDeviceExtension = Context;
  3488. ULONG_PTR ioBaseAddress = (ULONG_PTR) hwDeviceExtension->IOAddress;
  3489. ULONG i;
  3490. PVGA_VALIDATOR_DATA validatorData = hwDeviceExtension->TrappedValidatorData;
  3491. //
  3492. // Loop through the array of data and do instructions one by one.
  3493. //
  3494. for (i = 0; i < hwDeviceExtension->TrappedValidatorCount;
  3495. i++, validatorData++) {
  3496. //
  3497. // Calculate base address first
  3498. //
  3499. ioBaseAddress = (ULONG_PTR)hwDeviceExtension->IOAddress +
  3500. validatorData->Port;
  3501. //
  3502. // This is a write operation. We will automatically stop when the
  3503. // buffer is empty.
  3504. //
  3505. switch (validatorData->AccessType) {
  3506. case VGA_VALIDATOR_UCHAR_ACCESS :
  3507. VideoPortWritePortUchar((PUCHAR)ioBaseAddress,
  3508. (UCHAR) validatorData->Data);
  3509. break;
  3510. case VGA_VALIDATOR_USHORT_ACCESS :
  3511. VideoPortWritePortUshort((PUSHORT)ioBaseAddress,
  3512. (USHORT) validatorData->Data);
  3513. break;
  3514. case VGA_VALIDATOR_ULONG_ACCESS :
  3515. VideoPortWritePortUlong((PULONG)ioBaseAddress,
  3516. (ULONG) validatorData->Data);
  3517. break;
  3518. default:
  3519. VideoDebugPrint((0, "InvalidValidatorAccessType\n" ));
  3520. }
  3521. }
  3522. hwDeviceExtension->TrappedValidatorCount = 0;
  3523. return TRUE;
  3524. } // end VgaPlaybackValidatorData()
  3525. VP_STATUS
  3526. VgaSetBankPosition(
  3527. PHW_DEVICE_EXTENSION hwDeviceExtension,
  3528. PBANK_POSITION BankPosition
  3529. )
  3530. {
  3531. PVIDEO_PORT_INT10_INTERFACE Int10 = &hwDeviceExtension->Int10;
  3532. INT10_BIOS_ARGUMENTS BiosArguments;
  3533. ASSERT(Int10 != NULL);
  3534. BiosArguments.Eax = 0x4f05;
  3535. BiosArguments.Ebx = 0;
  3536. BiosArguments.Edx = BankPosition->WriteBankPosition;
  3537. Int10->Int10CallBios(Int10->Context, &BiosArguments);
  3538. BiosArguments.Eax = 0x4f05;
  3539. BiosArguments.Ebx = 1;
  3540. BiosArguments.Edx = BankPosition->ReadBankPosition;
  3541. Int10->Int10CallBios(Int10->Context, &BiosArguments);
  3542. return NO_ERROR;
  3543. }