Source code of Windows XP (NT5)
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  1. //===========================================================================
  2. //
  3. // THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
  4. // KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
  5. // IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR
  6. // PURPOSE.
  7. //
  8. // Copyright (c) 1996 - 2000 Microsoft Corporation. All Rights Reserved.
  9. //
  10. //===========================================================================
  11. /*++
  12. Module Name:
  13. dcamdef.h
  14. Abstract:
  15. Header file for constants and structures used for this 1394 desktop camera driver
  16. Author:
  17. Shaun Pierce 25-May-96
  18. Environment:
  19. Kernel mode only
  20. Revision History:
  21. --*/
  22. //
  23. // Define this to support YUV444
  24. //
  25. #define SUPPORT_YUV444
  26. //
  27. // Define this to support YUV411
  28. //
  29. #define SUPPORT_YUV411
  30. //
  31. // Define this to support RGB24
  32. // This format is the most expensive to support.
  33. // It requires driver to swap R and B og RGB24.
  34. //
  35. // #define SUPPORT_RGB24
  36. //
  37. // Define this to support YMONO
  38. //
  39. #define SUPPORT_YUV800
  40. //
  41. // Various structure definitions
  42. //
  43. typedef struct _INITIALIZE_REGISTER {
  44. ULONG Reserved:31; // Bits 1-31
  45. ULONG Initialize:1; // Bit 0
  46. } INITIALIZE_REGISTER, *PINITIALIZE_REGISTER;
  47. typedef struct _V_FORMAT_INQ_REGISTER {
  48. ULONG Reserved:24; // Bits 8-31
  49. ULONG Format7:1; // Bit 7 Scaleable Image Size Format
  50. ULONG Format6:1; // Bit 6 Still Image format
  51. ULONG FormatRsv:3; // Bits 3-5 Reserved
  52. ULONG Format2:1; // Bit 2 SVGA non-compressed format(2)
  53. ULONG Format1:1; // Bit 1 SVGA non-compressed format(1)
  54. ULONG Format0:1; // Bit 0 VGA non-compressed format (Max 640x480)
  55. } V_FORMAT_INQ_REGISTER, *PV_FORMAT_INQ_REGISTER;
  56. typedef enum {
  57. VMODE0_YUV444=0,
  58. VMODE1_YUV422,
  59. VMODE2_YUV411,
  60. VMODE3_YUV422,
  61. VMODE4_RGB24,
  62. VMODE5_YUV800
  63. } VMODE_INQ0;
  64. typedef struct _V_MODE_INQ_REGISTER {
  65. ULONG Reserved:24; // Bits 8-31
  66. ULONG ModeX:2; // Bits 6-7
  67. ULONG Mode5:1; // Bit 5
  68. ULONG Mode4:1; // Bit 4
  69. ULONG Mode3:1; // Bit 3
  70. ULONG Mode2:1; // Bit 2
  71. ULONG Mode1:1; // Bit 1
  72. ULONG Mode0:1; // Bit 0
  73. } V_MODE_INQ_REGISTER; *PV_MODE_INQ_REGISTER;
  74. typedef struct _V_RATE_INQ_REGISTER {
  75. ULONG Reserved:24; // Bits 8-31
  76. ULONG FrameRateX:2; // Bits 6-7
  77. ULONG FrameRate5:1; // Bit 5
  78. ULONG FrameRate4:1; // Bit 4
  79. ULONG FrameRate3:1; // Bit 3
  80. ULONG FrameRate2:1; // Bit 2
  81. ULONG FrameRate1:1; // Bit 1
  82. ULONG FrameRate0:1; // Bit 0
  83. } V_RATE_INQ_REGISTER, *PV_RATE_INQ_REGISTER;
  84. typedef struct _FEATURE_PRESENT1 {
  85. ULONG Reserved:21; // Bits 11-31
  86. ULONG Focus:1; // Bit 10
  87. ULONG Iris:1; // Bit 9
  88. ULONG Gain:1; // Bit 8
  89. ULONG Shutter:1; // Bit 7
  90. ULONG Gamma:1; // Bit 6
  91. ULONG Saturation:1; // Bit 5
  92. ULONG Hue:1; // Bit 4
  93. ULONG White_Balance:1; // Bit 3
  94. ULONG Sharpness:1; // Bit 2
  95. ULONG Exposure:1; // Bit 1
  96. ULONG Brightness:1; // Bit 0
  97. } FEATURE_PRESENT1, *PFEATURE_PRESENT1;
  98. typedef struct _FEATURE_PRESENT2 {
  99. ULONG Reserved:29; // Bits 3-31
  100. ULONG Tile:1; // Bit 2
  101. ULONG Pan:1; // Bit 1
  102. ULONG Zoom:1; // Bit 0
  103. } FEATURE_PRESENT2, *PFEATURE_PRESENT2;
  104. typedef struct _FEATURE_REGISTER {
  105. ULONG MAX_Value:12; // Bits 20-31
  106. ULONG MIN_Value:12; // Bits 8-19
  107. ULONG ManualMode:1; // Bit 7
  108. ULONG AutoMode:1; // Bit 6
  109. ULONG OnOff:1; // Bit 5
  110. ULONG ReadOut_Inq:1; // Bit 4
  111. ULONG OnePush:1; // Bit 3
  112. ULONG Reserved:2; // Bits 1-2
  113. ULONG PresenceInq:1; // Bit 0
  114. } FEATURE_REGISTER, *PFEATURE_REGISTER;
  115. typedef struct _BRIGHTNESS_REGISTER {
  116. ULONG Value:12; // Bits 20-31
  117. ULONG Reserved1:12; // Bits 8-19
  118. ULONG AutoMode:1; // Bit 7
  119. ULONG OnOff:1; // Bit 6
  120. ULONG OnePush:1; // Bit 5
  121. ULONG Reserved2:4; // Bits 1-4
  122. ULONG PresenceInq:1; // Bit 0
  123. } BRIGHTNESS_REGISTER, *PBRIGHTNESS_REGISTER;
  124. typedef struct _WHITE_BALANCE_REGISTER {
  125. ULONG VValue:12; // Bits 20-31
  126. ULONG UValue:12; // Bits 8-19
  127. ULONG AutoMode:1; // Bit 7
  128. ULONG OnOff:1; // Bit 6
  129. ULONG OnePush:1; // Bit 5
  130. ULONG Reserved1:4; // Bits 1-4
  131. ULONG PresenceInq:1; // Bit 0
  132. } WHITE_BALANCE_REGISTER, *PWHITE_BALANCE_REGISTER;
  133. // A common structure so it is easier to access its elements.
  134. typedef union _DCamRegArea {
  135. INITIALIZE_REGISTER Initialize;
  136. V_FORMAT_INQ_REGISTER VFormat;
  137. V_MODE_INQ_REGISTER VMode;
  138. V_RATE_INQ_REGISTER VRate;
  139. BRIGHTNESS_REGISTER Brightness;
  140. WHITE_BALANCE_REGISTER WhiteBalance;
  141. FEATURE_REGISTER Feature;
  142. FEATURE_PRESENT1 CameraCap1;
  143. FEATURE_PRESENT2 CameraCap2;
  144. ULONG AsULONG;
  145. } DCamRegArea, * PDCamRegArea;
  146. //
  147. // Structure of the camera's register space
  148. //
  149. typedef struct _CAMERA_REGISTER_MAP {
  150. INITIALIZE_REGISTER Initialize; // @ 0
  151. ULONG Reserved1[63]; // @ 4
  152. V_FORMAT_INQ_REGISTER VFormat; // @ 100
  153. ULONG Reserved2[31]; // @ 104
  154. V_MODE_INQ_REGISTER VModeInq[8]; // @ 180-19f
  155. ULONG Reserved3[24]; // @ 1A0-1ff
  156. V_RATE_INQ_REGISTER VRateInq[128]; // @ 200-3ff
  157. ULONG Reserved4; // @ 400-4ff
  158. FEATURE_PRESENT1 FeaturePresent1; // @ 404
  159. FEATURE_PRESENT2 FeaturePresent2; // @ 408
  160. ULONG Reserved4b[61]; // @ 40c-4ff
  161. FEATURE_REGISTER Brightness_Inq; // @ 500-503
  162. FEATURE_REGISTER Exposure_Inq; // @ 504
  163. FEATURE_REGISTER Sharpness_Inq; // @ 508
  164. FEATURE_REGISTER WhiteBalance_Inq; // @ 50c
  165. FEATURE_REGISTER Hue_Inq; // @ 510
  166. FEATURE_REGISTER Saturation_Inq; // @ 514
  167. FEATURE_REGISTER Gamma_Inq; // @ 518
  168. FEATURE_REGISTER Shutter_Inq; // @ 51c
  169. FEATURE_REGISTER Gain_Inq; // @ 520
  170. FEATURE_REGISTER Iris_Inq; // @ 524
  171. FEATURE_REGISTER Focus_Inq; // @ 528
  172. ULONG Resreved5[(0x580-0x52c)/4]; // @ 52c-57c
  173. FEATURE_REGISTER Zoom_Inq; // @ 580
  174. FEATURE_REGISTER Pan_Inq; // @ 584
  175. FEATURE_REGISTER Tilt_Inq; // @ 588-58b
  176. ULONG Reserved6[(0x600-0x58c)/4]; // @ 58c-5ff
  177. // Status and control register for camera
  178. ULONG CurrentVFrmRate; // @ 600
  179. ULONG CurrentVMode; // @ 604
  180. ULONG CurrentVFormat; // @ 608
  181. ULONG IsoChannel; // @ 60C
  182. ULONG CameraPower; // @ 610
  183. ULONG IsoEnable; // @ 614
  184. ULONG MemorySave; // @ 618
  185. ULONG OneShot; // @ 61C
  186. ULONG MemorySaveChannel; // @ 620
  187. ULONG CurrentMemChannel; // @ 624
  188. ULONG Reserved7[(0x800-0x628)/4]; // @ 628-7ff
  189. // Status and control register for feature
  190. BRIGHTNESS_REGISTER Brightness; // @ 800
  191. BRIGHTNESS_REGISTER Exposure; // @ 804
  192. BRIGHTNESS_REGISTER Sharpness; // @ 808
  193. WHITE_BALANCE_REGISTER WhiteBalance; // @ 80C
  194. BRIGHTNESS_REGISTER Hue; // @ 810
  195. BRIGHTNESS_REGISTER Saturation; // @ 814
  196. BRIGHTNESS_REGISTER Gamma; // @ 818
  197. BRIGHTNESS_REGISTER Shutter; // @ 81C
  198. BRIGHTNESS_REGISTER Gain; // @ 820
  199. BRIGHTNESS_REGISTER Iris; // @ 824
  200. BRIGHTNESS_REGISTER Focus; // @ 828
  201. ULONG Resreved8[(0x880-0x82c)/4]; // @ 82c-87c
  202. BRIGHTNESS_REGISTER Zoom; // @ 880
  203. BRIGHTNESS_REGISTER Pan; // @ 884
  204. BRIGHTNESS_REGISTER Tilt; // @ 888
  205. } CAMERA_REGISTER_MAP, *PCAMERA_REGISTER_MAP;
  206. //
  207. // To make DCAm start streaming,
  208. // it needs to set all these step.
  209. // We will do them one by one in the
  210. // StartDCam's IoCompletionRoutine
  211. //
  212. typedef enum {
  213. DCAM_STATE_UNDEFINED = 0,
  214. DCAM_SET_INITIALIZE,
  215. DCAM_STOPSTATE_SET_REQUEST_ISOCH_STOP,
  216. DCAM_STOPSTATE_SET_STOP_ISOCH_TRANSMISSION,
  217. DCAM_PAUSESTATE_SET_REQUEST_ISOCH_STOP,
  218. DCAM_RUNSTATE_SET_REQUEST_ISOCH_LISTEN,
  219. DCAM_RUNSTATE_SET_FRAME_RATE,
  220. DCAM_RUNSTATE_SET_CURRENT_VIDEO_MODE,
  221. DCAM_RUNSTATE_SET_CURRENT_VIDEO_FORMAT,
  222. DCAM_RUNSTATE_SET_SPEED,
  223. DCAM_RUNSTATE_SET_START,
  224. DCAM_SET_DONE
  225. } DCAM_DEVICE_STATE, *PDCAM_DEVICE_STATE;
  226. //
  227. // Video formats and modes support
  228. //
  229. #define MAX_VMODES 6 // Support at most 6 modes of V_MODE_INQ_0
  230. //
  231. // Support's property, they are used as the index.
  232. //
  233. #define NUM_VIDEOPROCAMP_ITEMS 5
  234. #define NUM_CAMERACONTROL_ITEMS 2
  235. #define NUM_PROPERTY_ITEMS NUM_VIDEOPROCAMP_ITEMS + NUM_CAMERACONTROL_ITEMS
  236. typedef enum {
  237. // VideoProcAmp
  238. ENUM_BRIGHTNESS = 0,
  239. ENUM_SHARPNESS,
  240. ENUM_HUE,
  241. ENUM_SATURATION,
  242. ENUM_WHITEBALANCE,
  243. // CameraControl
  244. ENUM_FOCUS,
  245. ENUM_ZOOM,
  246. } ENUM_DEV_PROP;
  247. //
  248. // Structure for each device property
  249. //
  250. typedef struct _DEV_PROPERTY {
  251. // ReadOnly
  252. KSPROPERTY_STEPPING_LONG RangeNStep; // Range from the Feature
  253. LONG DefaultValue; // Read from the registry or midrange if not in registry
  254. #if 0
  255. ULONG ulFieldOffset; // Offset of where the CSR is located
  256. #endif
  257. // ReadOnly
  258. DCamRegArea Feature; // Register that contain the feature inquery of a property
  259. // Read/Write
  260. DCamRegArea StatusNControl; // Register that is both R/W (Addr has an 0x300 offset from the Feature's)
  261. } DEV_PROPERTY, * PDEV_PROPERTY;
  262. typedef struct _DEV_PROPERTY_DEFINE {
  263. KSPROPERTY_VALUES Value;
  264. KSPROPERTY_MEMBERSLIST Range;
  265. KSPROPERTY_MEMBERSLIST Default;
  266. } DEV_PROPERTY_DEFINE, *PDEV_PROPERTY_DEFINE;
  267. //
  268. // Device Extension for our 1394 Desktop Camera Driver
  269. //
  270. // Circular pointers DevExt<->StrmEx
  271. typedef struct _STREAMEX;
  272. typedef struct _DCAM_EXTENSION;
  273. //
  274. // Context to keep track in the IO Completion routine.
  275. //
  276. typedef struct _DCAM_IO_CONTEXT {
  277. DWORD dwSize;
  278. PHW_STREAM_REQUEST_BLOCK pSrb;
  279. struct _DCAM_EXTENSION *pDevExt;
  280. PIRB pIrb;
  281. PVOID pReserved[4]; // Maybe used for extra context information.
  282. DCAM_DEVICE_STATE DeviceState;
  283. //
  284. // Holds an area for us to read/write camera registers to/from here
  285. //
  286. union {
  287. INITIALIZE_REGISTER Initialize;
  288. V_FORMAT_INQ_REGISTER VFormat;
  289. V_MODE_INQ_REGISTER VMode;
  290. V_RATE_INQ_REGISTER VRate;
  291. BRIGHTNESS_REGISTER Brightness;
  292. WHITE_BALANCE_REGISTER WhiteBalance;
  293. FEATURE_REGISTER Feature;
  294. ULONG AsULONG;
  295. } RegisterWorkArea;
  296. } DCAM_IO_CONTEXT, *PDCAM_IO_CONTEXT;
  297. typedef struct _DCAM_EXTENSION {
  298. //
  299. // Holds the Device Object we share with the stream class
  300. //
  301. PDEVICE_OBJECT SharedDeviceObject;
  302. //
  303. // Holds the Device Object of our parent (1394 bus driver)
  304. // pass it in IoCallDriver()
  305. //
  306. PDEVICE_OBJECT BusDeviceObject;
  307. //
  308. // Holds my Physical Device Object
  309. // pass it in PnP API, such as IoOpenDeviceRegistryKey()
  310. //
  311. PDEVICE_OBJECT PhysicalDeviceObject;
  312. //
  313. // Holds the current generation count of the bus
  314. //
  315. ULONG CurrentGeneration;
  316. //
  317. // Holds the Configuration Rom for this device. Multi-functional
  318. // devices (i.e. many units) will share this same Config Rom
  319. // structure, but they are represented as a different Device Object.
  320. // This is not the entire Config Rom, but does contain the root directory
  321. // as well as everything in front of it.
  322. //
  323. PCONFIG_ROM ConfigRom;
  324. //
  325. // Holds the Unit Directory for this device. Even on multi-functional
  326. // devices (i.e. many units) this should be unique to each Device Object.
  327. //
  328. PVOID UnitDirectory;
  329. //
  330. // Holds the Unit Dependent directory for this device.
  331. //
  332. PVOID UnitDependentDirectory;
  333. //
  334. // Holds the pointer to the Vendor Leaf information
  335. //
  336. PTEXTUAL_LEAF VendorLeaf;
  337. PCHAR pchVendorName;
  338. //
  339. // Holds the pointer to the Model Leaf information
  340. //
  341. PTEXTUAL_LEAF ModelLeaf;
  342. //
  343. // Holds the Base Register of the camera (lower 32 bit portion only)
  344. //
  345. ULONG BaseRegister;
  346. //
  347. // Holds an area for us to read/write camera registers to/from here
  348. //
  349. union {
  350. INITIALIZE_REGISTER Initialize;
  351. V_FORMAT_INQ_REGISTER VFormat;
  352. V_MODE_INQ_REGISTER VMode;
  353. V_RATE_INQ_REGISTER VRate;
  354. BRIGHTNESS_REGISTER Brightness;
  355. WHITE_BALANCE_REGISTER WhiteBalance;
  356. FEATURE_REGISTER Feature;
  357. ULONG AsULONG;
  358. } RegisterWorkArea;
  359. //
  360. // Holds what frame rate we'll display at
  361. //
  362. ULONG FrameRate;
  363. //
  364. // Holds the resource for the isoch stream we got
  365. //
  366. HANDLE hResource;
  367. //
  368. // Holds the bandwidth resource handle
  369. //
  370. HANDLE hBandwidth;
  371. //
  372. // Holds the Isoch channel we'll use to receive data
  373. //
  374. ULONG IsochChannel;
  375. //
  376. // Got this from the parent's PNODE_DEVICE_EXTENSION;
  377. // Sinceit is from the 1394bus driver, it is safe to be used to set the xmit speed
  378. //
  379. ULONG SpeedCode;
  380. //
  381. // Holds the Mode Index that we currently supposed to be running at
  382. //
  383. ULONG CurrentModeIndex;
  384. //
  385. // Holds whether or not we need to listen (after we said we did)
  386. // Used only if enable isoch streaming while no buffer is attached.
  387. //
  388. BOOLEAN bNeedToListen;
  389. //
  390. // Holds the list of isoch descriptors that are currently attached
  391. //
  392. LIST_ENTRY IsochDescriptorList;
  393. //
  394. // Holds the spin lock that must be acquired before playing around with
  395. // the IsochDescriptorList
  396. //
  397. KSPIN_LOCK IsochDescriptorLock;
  398. //
  399. // Set to TRUE if isoch channel and resource have changed due to bus reset,
  400. // and we must either resubmit the pending reads or cancel them.
  401. //
  402. BOOL bStopIsochCallback;
  403. //
  404. // Holds the number of reads down at any given moment
  405. //
  406. LONG PendingReadCount;
  407. //
  408. // Holds the list of isoch descriptors that are waiting for resources
  409. //
  410. LIST_ENTRY IsochWaitingList;
  411. //
  412. // Holds the spin lock that must be acquired before playing around with
  413. // the IsochWaitingList
  414. //
  415. KSPIN_LOCK IsochWaitingLock;
  416. //
  417. // The could be an array if the device support multiple streams. But we only has one capture pin.
  418. //
  419. struct _STREAMEX * pStrmEx;
  420. //
  421. // Many IEE 1394 cameras can use the same drivers. After a streamis open, this is incremented.
  422. //
  423. LONG idxDev;
  424. //
  425. // Query type of host controller and its capabilities (like stripe Quadlets)
  426. //
  427. GET_LOCAL_HOST_INFO2 HostControllerInfomation;
  428. //
  429. // Query the DMA capabilities; mainly to determine the max DMA buffer size
  430. //
  431. GET_LOCAL_HOST_INFO7 HostDMAInformation;
  432. //
  433. // Keep track of power state; know only D0 and D3
  434. //
  435. DEVICE_POWER_STATE CurrentPowerState;
  436. //
  437. // TRUE only after SRB_SURPRIESE_REMOVAL;
  438. //
  439. BOOL bDevRemoved;
  440. //
  441. // Sometime the camera is not responding to our request;
  442. // so we retied.
  443. //
  444. LONG lRetries; // [0.. RETRY_COUNT]
  445. // ************************** //
  446. // Streams: Formats and Modes //
  447. // ************************** //
  448. //
  449. // Set in the INF to inform driver of what compression format
  450. // (VMode) is supported by the decoder installed on the system (by default)
  451. //
  452. DCamRegArea DecoderDCamVModeInq0;
  453. //
  454. // cache the device's VFormat and VModeInq0 register values
  455. //
  456. DCamRegArea DCamVFormatInq;
  457. DCamRegArea DCamVModeInq0;
  458. //
  459. // These values are retrun in the StreamHeader to advertise the stream formats supported.
  460. //
  461. ULONG ModeSupported; // 0..MAX_VMODE
  462. PKSDATAFORMAT DCamStrmModes[MAX_VMODES];
  463. // ************** //
  464. // Device control //
  465. // ************** //
  466. #if DBG
  467. //
  468. // Inquire features supported be this device
  469. //
  470. DCamRegArea DevFeature1; //Brightness, Sharpness, WhiteBalance, Hue, Saturation..Focus...
  471. DCamRegArea DevFeature2; // Zoom, Pan, Tilt...
  472. #endif
  473. //
  474. // Property sets; when sets are in contiguous memory, they forma a property table.
  475. //
  476. ULONG ulPropSetSupported; // Number of property item supported.
  477. KSPROPERTY_SET VideoProcAmpSet; // This is also the beginning of the property set table.
  478. KSPROPERTY_SET CameraControlSet;
  479. //
  480. // Property items of what device supports
  481. //
  482. KSPROPERTY_ITEM VideoProcAmpItems[NUM_VIDEOPROCAMP_ITEMS];
  483. KSPROPERTY_ITEM CameraControlItems[NUM_CAMERACONTROL_ITEMS];
  484. //
  485. // Current settings defined (supported) by the device
  486. //
  487. DEV_PROPERTY_DEFINE DevPropDefine[NUM_PROPERTY_ITEMS];
  488. //
  489. // VideoProcAmp and CameraControl (range and current value)
  490. //
  491. DEV_PROPERTY DevProperty[NUM_PROPERTY_ITEMS];
  492. //
  493. // Global nonpaged pool memory used to read/write device register values (current value)
  494. //
  495. DCamRegArea RegArea;
  496. //
  497. // Global nonpaged pool memory used to read/write device register values (verify result)
  498. //
  499. DCamRegArea RegAreaVerify;
  500. //
  501. // Seralize using the global variables. (just in case we are called from multiple threads)
  502. //
  503. KMUTEX hMutexProperty;
  504. } DCAM_EXTENSION, *PDCAM_EXTENSION;
  505. //
  506. // this structure is our per stream extension structure. This stores
  507. // information that is relevant on a per stream basis. Whenever a new stream
  508. // is opened, the stream class driver will allocate whatever extension size
  509. // is specified in the HwInitData.PerStreamExtensionSize.
  510. //
  511. typedef struct _STREAMEX {
  512. // Index to the table contain the data packet information
  513. LONG idxIsochTable;
  514. //
  515. // Holds the master clock
  516. //
  517. HANDLE hMasterClock;
  518. //
  519. // Pointer to the data that i'm supposed to be working off of
  520. //
  521. PKS_VIDEOINFOHEADER pVideoInfoHeader;
  522. //
  523. // Statistic of the frame information since last start stream
  524. //
  525. KS_FRAME_INFO FrameInfo;
  526. ULONGLONG FrameCaptured; // Number of frame return to the client
  527. ULONGLONG FirstFrameTime; // Use to calculate drop frame
  528. //
  529. // Holds state
  530. //
  531. KSSTATE KSState;
  532. KSSTATE KSStateFinal; // Final state that we want to reach using IoCompletion routine
  533. KMUTEX hMutex; // MutEx of StreamIo or StreamControl, specifically setting to stop state.
  534. //
  535. // For Power Management; valid only in DCamChangePower()
  536. //
  537. KSSTATE KSSavedState;
  538. } STREAMEX, *PSTREAMEX;
  539. typedef struct _CAMERA_ISOCH_INFO {
  540. //
  541. // Holds the number of quadlets in each Isochronous packet
  542. //
  543. ULONG QuadletPayloadPerPacket;
  544. //
  545. // Holds the speed required in order to receive this mode
  546. //
  547. ULONG SpeedRequired;
  548. //
  549. // Holds the size of a complete picture at this resolution and mode
  550. //
  551. ULONG CompletePictureSize;
  552. } CAMERA_ISOCH_INFO, *PCAMERA_ISOCH_INFO;
  553. typedef struct _ISOCH_DESCRIPTOR_RESERVED {
  554. //
  555. // Holds the list of descriptors that we have in use
  556. //
  557. LIST_ENTRY DescriptorList;
  558. //
  559. // Holds the pointer to the Srb that's associated with this descriptor
  560. //
  561. PHW_STREAM_REQUEST_BLOCK Srb;
  562. //
  563. // Holds the flags that we use to remember what state we're in
  564. //
  565. ULONG Flags;
  566. } ISOCH_DESCRIPTOR_RESERVED, *PISOCH_DESCRIPTOR_RESERVED;
  567. //
  568. // Various definitions
  569. //
  570. #define FIELDOFFSET(type, field) (int)((INT_PTR)(&((type *)1)->field)-1)
  571. #define QUERY_ADDR_OFFSET 0x0300 // 0x800 - 0x500 = 0x300
  572. #define MAX_READ_REG_RETRIES 10 // Max retries until Pres is ready
  573. #define NUM_POSSIBLE_RATES 6
  574. #define RETRY_COUNT 5
  575. #define RETRY_COUNT_IRP_SYNC 20
  576. #define DEFAULT_FRAME_RATE 3
  577. #define STOP_ISOCH_TRANSMISSION 0
  578. #define START_ISOCH_TRANSMISSION 0x80
  579. #define START_OF_PICTURE 1
  580. #define MAX_BUFFERS_SUPPLIED 8
  581. #define DCAM_DELAY_VALUE (ULONG)(-1 * 100 * 1000) // 10 ms
  582. #define DCAM_DELAY_VALUE_BUSRESET (ULONG)(-1 * 2000 * 1000) // 200 ms
  583. #define DCAM_REG_STABLE_DELAY (ULONG)(-1 * 500 * 1000) // 50 ms
  584. #define ISO_ENABLE_BIT 0x00000080
  585. //
  586. // Definitions of the Frame Rate register located at offset 0x600
  587. //
  588. #define FRAME_RATE_0 0
  589. #define FRAME_RATE_1 0x20
  590. #define FRAME_RATE_2 0x40
  591. #define FRAME_RATE_3 0x60
  592. #define FRAME_RATE_4 0x80
  593. #define FRAME_RATE_5 0xa0
  594. #define FRAME_RATE_SHIFT 5
  595. #define FORMAT_VGA_NON_COMPRESSED 0
  596. #define ISOCH_CHANNEL_SHIFT 4
  597. #define VIDEO_MODE_SHIFT 5
  598. #define REGISTERS_TO_SET_TO_AUTO 10
  599. #define STATE_SRB_IS_COMPLETE 1
  600. #define STATE_DETACHING_BUFFERS 2