Source code of Windows XP (NT5)
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

943 lines
24 KiB

  1. //***************************************************************************
  2. // Video decoder process
  3. //
  4. //***************************************************************************
  5. #include "common.h"
  6. #include "regs.h"
  7. #include "cvdec.h"
  8. extern BOOLEAN fProgrammed;
  9. void VDecoder::init( const PDEVICE_INIT_INFO pDevInit )
  10. {
  11. ioBase = pDevInit->ioBase;
  12. }
  13. void VDecoder::VIDEO_RESET( void )
  14. {
  15. UCHAR val;
  16. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_RESET );
  17. for ( ; ; )
  18. {
  19. val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
  20. if ( ( val & 0x01 ) != 0x01 )
  21. break;
  22. // wait !!
  23. }
  24. for ( ; ; )
  25. {
  26. val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
  27. if ( ( val & 0x10 ) != 0x10 )
  28. break;
  29. // wait !!
  30. }
  31. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x05 );
  32. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  33. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  34. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
  35. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x13 );
  36. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  37. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  38. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  39. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
  40. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x14 );
  41. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x05 );
  42. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  43. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  44. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
  45. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x13 );
  46. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x34 );
  47. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_RESET );
  48. for ( ; ; )
  49. {
  50. val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
  51. if ( ( val & 0x01 ) != 0x01 )
  52. break;
  53. // wait !!
  54. }
  55. for ( ; ; )
  56. {
  57. val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
  58. if ( ( val & 0x10 ) != 0x10 )
  59. break;
  60. // wait !!
  61. }
  62. }
  63. void VDecoder::VIDEO_MODE_DVD( void )
  64. {
  65. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  66. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DEC_MODE );
  67. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xe0 );
  68. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_INT_ID );
  69. VIDEO_PRSO_PS1();
  70. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xbf );
  71. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  72. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  73. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
  74. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_USER_ID );
  75. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  76. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DMODE );
  77. WRITE_PORT_UCHAR( ioBase + TC812_DSPL, 0x1f );
  78. VIDEO_VIDEOCD_OFF();
  79. }
  80. void VDecoder::VDVD_VIDEO_MODE_PS( void )
  81. {
  82. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xbd );
  83. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  84. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PRSO_ID );
  85. }
  86. void VDecoder::VIDEO_PRSO_PS1( void )
  87. {
  88. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xbd );
  89. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  90. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PRSO_ID );
  91. }
  92. void VDecoder::VIDEO_PRSO_NON( void )
  93. {
  94. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  95. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  96. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PRSO_ID );
  97. }
  98. void VDecoder::VIDEO_OUT_NTSC( void )
  99. {
  100. UCHAR val;
  101. // set video frame size mode to NTSC
  102. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  103. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VFMODE );
  104. // set STD buffer size
  105. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x40 );
  106. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x11 );
  107. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STD_SIZE );
  108. // set USER1/2 area size
  109. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xf7 );
  110. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
  111. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  112. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
  113. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_USER_SIZE );
  114. // set ext. memory mapping
  115. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_MEM_MAP );
  116. for ( ; ; )
  117. {
  118. val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
  119. if ( ( val & 0x10 ) != 0x10 )
  120. break;
  121. // wait !!! & timeout !!!
  122. }
  123. // set underflow/overflow size
  124. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x10 );
  125. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  126. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
  127. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x10 );
  128. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_UOF_SIZE );
  129. // default RHOS
  130. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  131. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  132. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_HOFFSET );
  133. // default RVOS
  134. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  135. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  136. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VOFFSET );
  137. }
  138. void VDecoder::VIDEO_ALL_INT_OFF( void )
  139. {
  140. WRITE_PORT_UCHAR( ioBase + TC812_IRM, 0xff );
  141. WRITE_PORT_UCHAR( ioBase + TC812_DEM, 0xff );
  142. WRITE_PORT_UCHAR( ioBase + TC812_WEM, 0xff );
  143. WRITE_PORT_UCHAR( ioBase + TC812_ERM, 0xff );
  144. WRITE_PORT_UCHAR( ioBase + TC812_UOM, 0xff );
  145. }
  146. void VDecoder::VIDEO_SCR_INT_ON( void )
  147. {
  148. UCHAR val;
  149. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  150. val &= 0xfd;
  151. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  152. }
  153. void VDecoder::VIDEO_SCR_INT_OFF( void )
  154. {
  155. UCHAR val;
  156. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  157. val |= 0x02;
  158. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  159. }
  160. void VDecoder::VIDEO_VERR_INT_ON( void )
  161. {
  162. UCHAR val;
  163. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  164. val &= 0xef;
  165. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  166. WRITE_PORT_UCHAR( ioBase + TC812_ERM, 0x00 );
  167. }
  168. void VDecoder::VIDEO_VERR_INT_OFF( void )
  169. {
  170. UCHAR val;
  171. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  172. val |= 0x10;
  173. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  174. WRITE_PORT_UCHAR( ioBase + TC812_ERM, 0x7f );
  175. }
  176. void VDecoder::VIDEO_UFLOW_INT_ON( void )
  177. {
  178. UCHAR val;
  179. val = READ_PORT_UCHAR( ioBase + TC812_UOM );
  180. val &= 0xfe;
  181. WRITE_PORT_UCHAR( ioBase + TC812_UOM, val );
  182. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  183. val &= 0xbf;
  184. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  185. }
  186. void VDecoder::VIDEO_UFLOW_INT_OFF( void )
  187. {
  188. UCHAR val;
  189. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  190. val |= 0x40;
  191. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  192. val = READ_PORT_UCHAR( ioBase + TC812_UOM );
  193. val |= 0x01;
  194. WRITE_PORT_UCHAR( ioBase + TC812_UOM, val );
  195. }
  196. void VDecoder::VIDEO_DECODE_INT_ON( void )
  197. {
  198. UCHAR val;
  199. val = READ_PORT_UCHAR( ioBase + TC812_DEM );
  200. val &= 0xfb;
  201. WRITE_PORT_UCHAR( ioBase + TC812_DEM, val );
  202. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  203. val &= 0xfb;
  204. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  205. }
  206. void VDecoder::VIDEO_DECODE_INT_OFF( void )
  207. {
  208. UCHAR val;
  209. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  210. val |= 0x04;
  211. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  212. val = READ_PORT_UCHAR( ioBase + TC812_DEM );
  213. val |= 0x04;
  214. WRITE_PORT_UCHAR( ioBase + TC812_DEM, val );
  215. }
  216. void VDecoder::VIDEO_USER_INT_ON( void )
  217. {
  218. UCHAR val;
  219. val = READ_PORT_UCHAR( ioBase + TC812_WEM );
  220. val &= 0xfe;
  221. WRITE_PORT_UCHAR( ioBase + TC812_WEM, val );
  222. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  223. val &= 0xf7;
  224. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  225. }
  226. void VDecoder::VIDEO_USER_INT_OFF( void )
  227. {
  228. UCHAR val;
  229. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  230. val |= 0x08;
  231. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  232. val = READ_PORT_UCHAR( ioBase + TC812_WEM );
  233. val |= 0x01;
  234. WRITE_PORT_UCHAR( ioBase + TC812_WEM, val );
  235. }
  236. //--- 97.09.23 K.Chujo
  237. void VDecoder::VIDEO_UDSC_INT_ON( void )
  238. {
  239. // user data start code interrupt on
  240. UCHAR val;
  241. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  242. val &= 0xFE;
  243. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  244. }
  245. void VDecoder::VIDEO_UDSC_INT_OFF( void )
  246. {
  247. // user data start code interrput off
  248. UCHAR val;
  249. val = READ_PORT_UCHAR( ioBase + TC812_IRM );
  250. val |= 0x01;
  251. WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
  252. }
  253. //--- End.
  254. void VDecoder::VIDEO_ALL_IFLAG_CLEAR( void )
  255. {
  256. UCHAR val;
  257. val = READ_PORT_UCHAR( ioBase + TC812_UOF );
  258. val = READ_PORT_UCHAR( ioBase + TC812_ERF );
  259. val = READ_PORT_UCHAR( ioBase + TC812_WEF );
  260. val = READ_PORT_UCHAR( ioBase + TC812_DEF );
  261. val = READ_PORT_UCHAR( ioBase + TC812_IRF );
  262. }
  263. void VDecoder::VIDEO_SET_STCA( ULONG stca )
  264. {
  265. UCHAR val;
  266. val = (UCHAR)( stca & 0xff );
  267. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, val );
  268. val = (UCHAR)( ( stca >> 8 ) & 0xff );
  269. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, val );
  270. val = (UCHAR)( ( stca >> 16 ) & 0xff );
  271. WRITE_PORT_UCHAR( ioBase + TC812_DATA5, val );
  272. val = (UCHAR)( ( stca >> 24 ) & 0xff );
  273. WRITE_PORT_UCHAR( ioBase + TC812_DATA6, val );
  274. WRITE_PORT_UCHAR( ioBase + TC812_DATA7, 0x00 );
  275. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STCA );
  276. }
  277. void VDecoder::VIDEO_SET_STCS( ULONG stcs )
  278. {
  279. UCHAR val;
  280. val = (UCHAR)( stcs & 0xff );
  281. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, val );
  282. val = (UCHAR)( ( stcs >> 8 ) & 0xff );
  283. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, val );
  284. val = (UCHAR)( ( stcs >> 16 ) & 0xff );
  285. WRITE_PORT_UCHAR( ioBase + TC812_DATA5, val );
  286. val = (UCHAR)( ( stcs >> 24 ) & 0xff );
  287. WRITE_PORT_UCHAR( ioBase + TC812_DATA6, val );
  288. WRITE_PORT_UCHAR( ioBase + TC812_DATA7, 0x00 );
  289. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STCS );
  290. }
  291. ULONG VDecoder::VIDEO_GET_STCA( void )
  292. {
  293. ULONG rval = 0, val;
  294. if (fProgrammed)
  295. {
  296. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_STCA );
  297. rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  298. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
  299. val <<= 8;
  300. rval += val;
  301. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA5 );
  302. val <<= 16;
  303. rval += val;
  304. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA6 );
  305. val <<= 24;
  306. rval += val;
  307. }
  308. return rval;
  309. }
  310. ULONG VDecoder::VIDEO_GET_STCS( void )
  311. {
  312. ULONG rval = 0, val;
  313. if (fProgrammed)
  314. {
  315. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_STCS );
  316. rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  317. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
  318. val <<= 8;
  319. rval += val;
  320. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA5 );
  321. val <<= 16;
  322. rval += val;
  323. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA6 );
  324. val <<= 24;
  325. rval += val;
  326. }
  327. return rval;
  328. }
  329. void VDecoder::VIDEO_SYSTEM_START( void )
  330. {
  331. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x07 ); // video buffer flow control
  332. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_SYS );
  333. }
  334. void VDecoder::VIDEO_SYSTEM_STOP( void )
  335. {
  336. UCHAR val;
  337. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_SYS );
  338. val = READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  339. val &= 0xfe;
  340. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, val );
  341. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_SYS );
  342. }
  343. ULONG VDecoder::VIDEO_GET_STD_CODE( void )
  344. {
  345. ULONG rval, val;
  346. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_STD_CODE );
  347. rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  348. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
  349. val <<= 8;
  350. rval += val;
  351. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  352. val <<= 16;
  353. rval += val;
  354. rval <<= 2;
  355. return rval;
  356. }
  357. BOOL VDecoder::VIDEO_GET_DECODE_STATE( void )
  358. {
  359. UCHAR val;
  360. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_DECODE );
  361. val = READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  362. if ( ( val & 0x01 ) == 0x01 )
  363. return TRUE; // Decode
  364. else
  365. return FALSE; // Non Decode
  366. }
  367. void VDecoder::VIDEO_DECODE_START( void )
  368. {
  369. UCHAR val;
  370. for ( ; ; )
  371. {
  372. val = READ_PORT_UCHAR( ioBase + TC812_STT2 );
  373. if ( ( val & 0x01 ) != 0x01 )
  374. break;
  375. }
  376. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x05 );
  377. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DECODE );
  378. }
  379. NTSTATUS VDecoder::VIDEO_DECODE_STOP( void )
  380. {
  381. UCHAR val;
  382. val = READ_PORT_UCHAR( ioBase + TC812_STT2 );
  383. if ( ( val & 0x01 ) == 0x01 )
  384. return (NTSTATUS)-1;
  385. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_DECODE );
  386. val = READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  387. val &= 0x0e;
  388. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, val );
  389. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DECODE );
  390. return 0;
  391. }
  392. void VDecoder::VIDEO_STD_CLEAR( void )
  393. {
  394. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_STD_CLEAR );
  395. }
  396. void VDecoder::VIDEO_USER_CLEAR( void )
  397. {
  398. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_USER1_CLEAR );
  399. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_USER2_CLEAR );
  400. }
  401. void VDecoder::VIDEO_PVSIN_ON( void )
  402. {
  403. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x01 );
  404. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PVSIN );
  405. }
  406. void VDecoder::VIDEO_PVSIN_OFF( void )
  407. {
  408. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  409. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PVSIN );
  410. }
  411. void VDecoder::VIDEO_SET_DTS( ULONG dts )
  412. {
  413. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, (UCHAR)( dts & 0xff ) );
  414. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, (UCHAR)( ( dts >> 8 ) & 0xff ) );
  415. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, (UCHAR)( ( dts >> 16 ) & 0xff ) );
  416. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, (UCHAR)( ( dts >> 24 ) & 0xff ) );
  417. WRITE_PORT_UCHAR( ioBase + TC812_DATA5, 0 );
  418. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DTS );
  419. }
  420. ULONG VDecoder::VIDEO_GET_DTS( void )
  421. {
  422. ULONG rval, val;
  423. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_DTS );
  424. rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  425. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
  426. val <<= 8;
  427. rval += val;
  428. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  429. val <<= 16;
  430. rval += val;
  431. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
  432. val <<= 24;
  433. rval += val;
  434. return rval;
  435. }
  436. void VDecoder::VIDEO_SET_PTS( ULONG pts )
  437. {
  438. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, (UCHAR)( pts & 0xff ) );
  439. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, (UCHAR)( ( pts >> 8 ) & 0xff ) );
  440. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, (UCHAR)( ( pts >> 16 ) & 0xff ) );
  441. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, (UCHAR)( ( pts >> 24 ) & 0xff ) );
  442. WRITE_PORT_UCHAR( ioBase + TC812_DATA5, 0x00 );
  443. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PTS );
  444. }
  445. ULONG VDecoder::VIDEO_GET_PTS( void )
  446. {
  447. ULONG rval, val;
  448. if (fProgrammed)
  449. {
  450. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_PTS );
  451. rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  452. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
  453. val <<= 8;
  454. rval += val;
  455. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  456. val <<= 16;
  457. rval += val;
  458. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
  459. val <<= 24;
  460. rval += val;
  461. }
  462. else
  463. {
  464. rval = 0;
  465. }
  466. return rval;
  467. }
  468. ULONG VDecoder::VIDEO_GET_SCR( void )
  469. {
  470. ULONG rval =0, val;
  471. if (fProgrammed)
  472. {
  473. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_SCR );
  474. rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  475. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
  476. val <<= 8;
  477. rval += val;
  478. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA5 );
  479. val <<= 16;
  480. rval += val;
  481. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA6 );
  482. val <<= 24;
  483. rval += val;
  484. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STCR_END );
  485. }
  486. return rval;
  487. }
  488. ULONG VDecoder::VIDEO_GET_STCC( void )
  489. {
  490. ULONG rval=0, val;
  491. if (fProgrammed)
  492. {
  493. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_STCC );
  494. rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  495. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
  496. val <<= 8;
  497. rval += val;
  498. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA5 );
  499. val <<= 16;
  500. rval += val;
  501. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA6 );
  502. val <<= 24;
  503. rval += val;
  504. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STCR_END );
  505. }
  506. return rval;
  507. }
  508. void VDecoder::VIDEO_SEEMLESS_ON( void )
  509. {
  510. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x01 );
  511. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_SEEMLES );
  512. }
  513. void VDecoder::VIDEO_SEEMLESS_OFF( void )
  514. {
  515. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  516. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_SEEMLES );
  517. }
  518. void VDecoder::VIDEO_VIDEOCD_OFF( void )
  519. {
  520. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  521. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VCD );
  522. }
  523. NTSTATUS VDecoder::VIDEO_GET_UDATA( PUCHAR pudata )
  524. {
  525. if ( ( READ_PORT_UCHAR( ioBase + TC812_STT1 ) & 0x80 ) != 0x80 )
  526. return (NTSTATUS)-1; // no user data
  527. *pudata = READ_PORT_UCHAR( ioBase + TC812_UDAT );
  528. return 0;
  529. }
  530. void VDecoder::VIDEO_PLAY_NORMAL( void )
  531. {
  532. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_NORMAL );
  533. }
  534. void VDecoder::VIDEO_PLAY_FAST( ULONG flag )
  535. {
  536. if ( flag == FAST_ONLYI )
  537. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  538. else if ( flag == FAST_IANDP )
  539. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x07 );
  540. else
  541. return;
  542. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_FAST );
  543. }
  544. void VDecoder::VIDEO_PLAY_SLOW( ULONG speed )
  545. {
  546. if ( speed == 0 || speed > 31 )
  547. return;
  548. speed <<= 2;
  549. speed |= 3;
  550. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, (UCHAR)speed );
  551. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_SLOW );
  552. }
  553. void VDecoder::VIDEO_PLAY_FREEZE( void )
  554. {
  555. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  556. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_FREEZE );
  557. }
  558. void VDecoder::VIDEO_PLAY_STILL( void )
  559. {
  560. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  561. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_STILL );
  562. }
  563. void VDecoder::VIDEO_LBOX_ON( void )
  564. {
  565. UCHAR val;
  566. val = READ_PORT_UCHAR( ioBase + TC812_DSPL );
  567. val &= 0xf7;
  568. val |= 0x10;
  569. WRITE_PORT_UCHAR( ioBase + TC812_DSPL, val );
  570. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x3e );
  571. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  572. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VOFFSET );
  573. }
  574. void VDecoder::VIDEO_LBOX_OFF( void )
  575. {
  576. UCHAR val;
  577. val = READ_PORT_UCHAR( ioBase + TC812_DSPL );
  578. val |= 0x18;
  579. WRITE_PORT_UCHAR( ioBase + TC812_DSPL, val );
  580. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x04 );
  581. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  582. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VOFFSET );
  583. }
  584. void VDecoder::VIDEO_PANSCAN_ON( void )
  585. {
  586. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  587. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DMODE );
  588. }
  589. void VDecoder::VIDEO_PANSCAN_OFF( void )
  590. {
  591. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x1b );
  592. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DMODE );
  593. }
  594. void VDecoder::VIDEO_UFLOW_CURB_ON( void )
  595. {
  596. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  597. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x10 );
  598. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_UF_CURB );
  599. }
  600. void VDecoder::VIDEO_UFLOW_CURB_OFF( void )
  601. {
  602. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  603. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  604. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_UF_CURB );
  605. }
  606. ULONG VDecoder::VIDEO_USER_DWORD( ULONG offset )
  607. {
  608. ULONG rval, val;
  609. for ( ; ; )
  610. {
  611. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_STT2 );
  612. if ( ( val & 0x01 ) != 0x01 )
  613. break;
  614. }
  615. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  616. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, (UCHAR)( offset & 0xff ) );
  617. WRITE_PORT_UCHAR( ioBase + TC812_DATA3, (UCHAR)( ( offset >> 8 ) & 0xff ) );
  618. WRITE_PORT_UCHAR( ioBase + TC812_DATA4, (UCHAR)( ( offset >> 16 ) & 0x07 ) );
  619. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_WRITE_MEM );
  620. for ( ; ; )
  621. {
  622. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_STT2 );
  623. if ( ( val & 0x01 ) != 0x01 )
  624. break;
  625. }
  626. rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
  627. rval <<= 8;
  628. rval += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  629. rval <<= 8;
  630. rval += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
  631. rval <<= 8;
  632. rval += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  633. rval <<= 8;
  634. return rval;
  635. }
  636. void VDecoder::VIDEO_UDAT_CLEAR( void )
  637. {
  638. UCHAR val;
  639. for ( ; ; )
  640. {
  641. val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
  642. if ( ( val & 0x08 ) != 0x08 )
  643. break;
  644. val = READ_PORT_UCHAR( ioBase + TC812_UDAT );
  645. }
  646. }
  647. ULONG VDecoder::VIDEO_GET_TRICK_MODE( void )
  648. {
  649. ULONG val;
  650. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_TRICK );
  651. val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  652. val &= 0x07;
  653. return val;
  654. }
  655. void VDecoder::VIDEO_BUG_PRE_SEARCH_01( void )
  656. {
  657. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x25 );
  658. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  659. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
  660. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x01 );
  661. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x11 );
  662. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x10 );
  663. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x02 );
  664. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  665. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
  666. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x5d );
  667. }
  668. void VDecoder::VIDEO_BUG_PRE_SEARCH_02( void )
  669. {
  670. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  671. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x02 );
  672. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x1b );
  673. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x8f );
  674. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  675. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x8f );
  676. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x42 );
  677. }
  678. void VDecoder::VIDEO_BUG_PRE_SEARCH_03( void )
  679. {
  680. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xc1 );
  681. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
  682. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
  683. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xb8 );
  684. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
  685. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
  686. }
  687. void VDecoder::VIDEO_BUG_PRE_SEARCH_04( void )
  688. {
  689. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x1b );
  690. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x8f );
  691. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
  692. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x8f );
  693. }
  694. void VDecoder::VIDEO_BUG_PRE_SEARCH_05( void )
  695. {
  696. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  697. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
  698. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x5d );
  699. }
  700. // NEEDED TO BE DEBUGGED !!!
  701. void VDecoder::VIDEO_BUG_SLIDE_01( void )
  702. {
  703. UCHAR val;
  704. ULONG ul;
  705. // check whether vdec hanged-up
  706. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x7d );
  707. val = READ_PORT_UCHAR( ioBase + TC812_DATA2 );
  708. // if( UF_FLAG == TRUE ) {
  709. // DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER STATUS = %x\r\n", val ));
  710. // }
  711. if ( ( val & 0x30 ) == 0x00 )
  712. {
  713. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x72 );
  714. ul = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
  715. ul <<= 8;
  716. ul += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  717. // if( UF_FLAG == TRUE ) {
  718. // DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER PC(1) = %x\r\n", ul ));
  719. // }
  720. if ( ul == 0x1a5 )
  721. {
  722. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xb8 );
  723. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
  724. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
  725. DebugPrint(( DebugLevelTrace, "TOSDVD: <<RE-ORDER(1)>>\r\n" ));
  726. // uf
  727. } else {
  728. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0xb0 );
  729. ul = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
  730. ul <<= 8;
  731. val = READ_PORT_UCHAR( ioBase + TC812_DATA3 );
  732. ul += (ULONG)val;
  733. ul <<= 8;
  734. val = READ_PORT_UCHAR( ioBase + TC812_DATA2 );
  735. ul += (ULONG)val;
  736. ul <<= 8;
  737. val = READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  738. ul += (ULONG)val;
  739. // if( UF_FLAG == TRUE ) {
  740. // DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER DTS = %x\r\n", ul ));
  741. // }
  742. if ( ( VIDEO_GET_STCA() - 2 ) > ul )
  743. {
  744. ul = VIDEO_GET_STD_CODE();
  745. // if( UF_FLAG == TRUE ) {
  746. // DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER STD = %x\r\n", ul ));
  747. // }
  748. if ( ul >= 0x200 )
  749. {
  750. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x72 );
  751. ul = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
  752. ul <<= 8;
  753. ul += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
  754. // if( UF_FLAG == TRUE ) {
  755. // DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER PC(2) = %x\r\n", ul ));
  756. // }
  757. if ( ul >= 0x404 && ul <= 0x409 )
  758. {
  759. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x18 );
  760. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x04 );
  761. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
  762. DebugPrint(( DebugLevelTrace, "TOSDVD: <<RE-ORDER(2)>>\r\n" ));
  763. // uf
  764. }
  765. }
  766. }
  767. }
  768. }
  769. WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
  770. WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
  771. WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x5d );
  772. }
  773. //
  774. //void VDecoder::VIDEO_DEBUG_SET_UF( void )
  775. //{
  776. // UF_FLAG = TRUE;
  777. //}
  778. //
  779. //void VDecoder::VIDEO_DEBUG_CLR_UF( void )
  780. //{
  781. // UF_FLAG = FALSE;
  782. //}
  783.