Source code of Windows XP (NT5)
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include kxamd64.inc
;; Wait Reason and Wait Type Enumerated Type Values;
WrExecutive equ 00000H
;; Bug Check Code Definitions;
APC_INDEX_MISMATCH equ 00001HATTEMPTED_SWITCH_FROM_DPC equ 000B8HDATA_BUS_ERROR equ 0002EHDATA_COHERENCY_EXCEPTION equ 00055HHAL1_INITIALIZATION_FAILED equ 00061HINSTRUCTION_BUS_ERROR equ 0002FHINSTRUCTION_COHERENCY_EXCEPTION equ 00056HINTERRUPT_EXCEPTION_NOT_HANDLED equ 0003DHINTERRUPT_UNWIND_ATTEMPTED equ 0003CHINVALID_AFFINITY_SET equ 00003HINVALID_DATA_ACCESS_TRAP equ 00004HIRQL_GT_ZERO_AT_SYSTEM_SERVICE equ 0004AHIRQL_NOT_LESS_OR_EQUAL equ 0000AHKMODE_EXCEPTION_NOT_HANDLED equ 0001EHNMI_HARDWARE_FAILURE equ 00080HNO_USER_MODE_CONTEXT equ 0000EHPAGE_FAULT_WITH_INTERRUPTS_OFF equ 00049HPANIC_STACK_SWITCH equ 0002BHSPIN_LOCK_INIT_FAILURE equ 00081HSYSTEM_EXIT_OWNED_MUTEX equ 00039HSYSTEM_SERVICE_EXCEPTION equ 0003BHSYSTEM_UNWIND_PREVIOUS_USER equ 0003AHTRAP_CAUSE_UNKNOWN equ 00012HUNEXPECTED_KERNEL_MODE_TRAP equ 0007FHHARDWARE_INTERRUPT_STORM equ 000F2H
;; Breakpoint type definitions;
DBG_STATUS_CONTROL_C equ 00001H
;; Exception Record Offset, Flag, and Enumerated Type Definitions;
EXCEPTION_NONCONTINUABLE equ 00001HEXCEPTION_UNWINDING equ 00002HEXCEPTION_EXIT_UNWIND equ 00004HEXCEPTION_STACK_INVALID equ 00008HEXCEPTION_NESTED_CALL equ 00010HEXCEPTION_TARGET_UNWIND equ 00020HEXCEPTION_COLLIDED_UNWIND equ 00040HEXCEPTION_UNWIND equ 00066HEXCEPTION_EXECUTE_HANDLER equ 00001HEXCEPTION_CONTINUE_SEARCH equ 00000HEXCEPTION_CONTINUE_EXECUTION equ 0FFFFFFFFH
ExceptionContinueExecution equ 00000HExceptionContinueSearch equ 00001HExceptionNestedException equ 00002HExceptionCollidedUnwind equ 00003H
ErExceptionCode equ 00000HErExceptionFlags equ 00004HErExceptionRecord equ 00008HErExceptionAddress equ 00010HErNumberParameters equ 00018HErExceptionInformation equ 00020HExceptionRecordLength equ 000A0H
;; Fast Mutex Structure Offset Definitions;
FmCount equ 00000HFmOwner equ 00008HFmContention equ 00010HFmEvent equ 00018HFmOldIrql equ 00030H
;; Interrupt Priority Request Level Definitions;
PASSIVE_LEVEL equ 00000HAPC_LEVEL equ 00001HDISPATCH_LEVEL equ 00002HCLOCK_LEVEL equ 0000DHIPI_LEVEL equ 0000EHPOWER_LEVEL equ 0000EHPROFILE_LEVEL equ 0000FHHIGH_LEVEL equ 0000FHSYNCH_LEVEL equ 00002H
;; Large Integer Structure Offset Definitions;
LiLowPart equ 00000HLiHighPart equ 00004H
;; List Entry Structure Offset Definitions;
LsFlink equ 00000HLsBlink equ 00008H
;; String Structure Offset Definitions;
StrLength equ 00000HStrMaximumLength equ 00002HStrBuffer equ 00008H
;; Time Structure Offset Definitions;
TmLowTime equ 00000HTmHighTime equ 00004H
;; DPC object Structure Offset Definitions;
DpType equ 00000HDpNumber equ 00002HDpImportance equ 00003HDpDpcListEntry equ 00008HDpDeferredRoutine equ 00018HDpDeferredContext equ 00020HDpSystemArgument1 equ 00028HDpSystemArgument2 equ 00030HDpLock equ 00038HDpcObjectLength equ 00040H
;; Interrupt Object Structure Offset Definitions;
InLevelSensitive equ 00000HInLatched equ 00001H
InType equ 00000HInSize equ 00002HInInterruptListEntry equ 00008HInServiceRoutine equ 00018HInServiceContext equ 00020HInSpinLock equ 00028HInTickCount equ 00030HInActualLock equ 00038HInDispatchAddress equ 00040HInVector equ 00048HInIrql equ 0004CHInSynchronizeIrql equ 0004DHInFloatingSave equ 0004EHInConnected equ 0004FHInNumber equ 00050HInShareVector equ 00051HInMode equ 00054HInServiceCount equ 00058HInDispatchCount equ 0005CHInTrapFrame equ 00060HInDispatchCode equ 00068HInterruptObjectLength equ 00210H
;; Special Register Structure Offset Definition;
SrKernelDr0 equ 00020HSrKernelDr1 equ 00028HSrKernelDr2 equ 00030HSrKernelDr3 equ 00038HSrKernelDr6 equ 00040HSrKernelDr7 equ 00048HSrGdtr equ 00050HSrIdtr equ 00060HSrTr equ 00070HSrMxCsr equ 00074H
;; Processor Control Region Structure Offset Definitions;
PcTeb equ 00030HPcCurrentPrcb equ 00038HPcSavedRcx equ 00040HPcSavedR11 equ 00048HPcIrql equ 00050HPcNumber equ 00052HPcIrr equ 00054HPcIrrActive equ 00058HPcIdr equ 0005CHPcStallScaleFactor equ 00064HPcIdt equ 00068HPcGdt equ 00070HPcTss equ 00078HPcKernel equ 00080HPcHal equ 000C0HPcSelf equ 00110HPcPrcb equ 00180HPcCurrentThread equ 00188HPcNextThread equ 00190HPcIdleThread equ 00198HPcSetMember equ 001A0HPcNotSetMember equ 001A8HPcCr0 equ 001B0HPcCr2 equ 001B8HPcCr3 equ 001C0HPcCr4 equ 001C8HPcKernelDr0 equ 001D0HPcKernelDr1 equ 001D8HPcKernelDr2 equ 001E0HPcKernelDr3 equ 001E8HPcKernelDr7 equ 001F8HPcGdtrLimit equ 00206HPcGdtrBase equ 00208HPcIdtrLimit equ 00216HPcIdtrBase equ 00218HPcTr equ 00220HPcLdtr equ 00222HPcMxCsr equ 00224HPcCpuType equ 004A0HPcCpuID equ 004A1HPcCpuStep equ 004A2HPcInterruptCount equ 00E80HPcSystemCalls equ 00F38HPcDpcRoutineActive equ 00DA8HPcSkipTick equ 00E9CH
;; Defines for user shared data;
USER_SHARED_DATA equ 0FFFFF78000000000HMM_SHARED_USER_DATA_VA equ 07FFE0000HUsTickCountLow equ 00000HUsTickCountMultiplier equ 00004HUsInterruptTime equ 00008HUsSystemTime equ 00014H
;; Tss Structure Offset Definitions;
TssRsp0 equ 00004HTssRsp1 equ 0000CHTssRsp2 equ 00014HTssIoMapBase equ 00064HTssIoMapEnd equ 02068HTssPanicStack equ 00024HTssMcaStack equ 0002CHTssLength equ 02070H
;; Gdt Descriptor Offset Definitions;
KGDT64_NULL equ 00000HKGDT64_R0_CODE equ 00010HKGDT64_R0_DATA equ 00018HKGDT64_R3_CMCODE equ 00020HKGDT64_R3_DATA equ 00028HKGDT64_R3_CODE equ 00030HKGDT64_SYS_TSS equ 00040HKGDT64_R3_CMTEB equ 00050H
;; GDT Entry Offset Definitions;
KgdtBaseLow equ 00002HKgdtBaseMiddle equ 00004HKgdtBaseHigh equ 00007HKgdtBaseUpper equ 00008HKgdtLimitHigh equ 00006HKgdtLimitLow equ 00000H
;; Processor Block Structure Offset Definitions;
PbMinorVersion equ 00000HPbMajorVersion equ 00002HPbNumber equ 00004HPbBuildType equ 00006HPbCurrentThread equ 00008HPbNextThread equ 00010HPbIdleThread equ 00018HPbSetMember equ 00020HPbNotSetMember equ 00028HPbProcessorState equ 00030HPbCpuType equ 00320HPbCpuID equ 00321HPbCpuStep equ 00322HPbKernelReserved equ 00364HPbHalReserved equ 00364H
;; Time Fields (TIME_FIELDS) Structure Offset Definitions;
TfSecond equ 0000AHTfMinute equ 00008HTfHour equ 00006HTfWeekday equ 0000EHTfDay equ 00004HTfMonth equ 00002HTfYear equ 00000HTfMilliseconds equ 0000CH
;; Define constants for system IRQL and IDT vector conversion;
MAXIMUM_IDTVECTOR equ 000FFHMAXIMUM_PRIMARY_VECTOR equ 000FFHPRIMARY_VECTOR_BASE equ 00030HRPL_MASK equ 00003HMODE_BIT equ 00000HMODE_MASK equ 00001H
;; Flags in the CR0 register;
CR0_PG equ 080000000HCR0_ET equ 00010HCR0_TS equ 00008HCR0_EM equ 00004HCR0_MP equ 00002HCR0_PE equ 00001HCR0_CD equ 040000000HCR0_NW equ 020000000HCR0_AM equ 040000HCR0_WP equ 010000HCR0_NE equ 00020H
;; Flags in the CR4 register;
CR4_VME equ 00001HCR4_PVI equ 00002HCR4_TSD equ 00004HCR4_DE equ 00008HCR4_PSE equ 00010HCR4_PAE equ 00020HCR4_MCE equ 00040HCR4_PGE equ 00080HCR4_FXSR equ 00200HCR4_XMMEXCPT equ 00400H
;; Legacy Floating Status Bit Masks;
FSW_INVALID_OPERATION equ 00001HFSW_DENORMAL equ 00002HFSW_ZERO_DIVIDE equ 00004HFSW_OVERFLOW equ 00008HFSW_UNDERFLOW equ 00010HFSW_PRECISION equ 00020HFSW_STACK_FAULT equ 00040HFSW_CONDITION_CODE_0 equ 00100HFSW_CONDITION_CODE_1 equ 00200HFSW_CONDITION_CODE_2 equ 00400HFSW_CONDITION_CODE_3 equ 04000HFSW_ERROR_MASK equ 0007FH
;; MXCSR Floating Control/Status Bit Masks;
XSW_INVALID_OPERATION equ 00001HXSW_DENORMAL equ 00002HXSW_ZERO_DIVIDE equ 00004HXSW_OVERFLOW equ 00008HXSW_UNDERFLOW equ 00010HXSW_PRECISION equ 00020HXSW_ERROR_MASK equ 0003FHXSW_ERROR_SHIFT equ 00007HXCW_INVALID_OPERATION equ 00080HXCW_DENORMAL equ 00100HXCW_ZERO_DIVIDE equ 00200HXCW_OVERFLOW equ 00400HXCW_UNDERFLOW equ 00800HXCW_PRECISION equ 01000HXCW_ROUND_CONTROL equ 06000HXCW_FLUSH_ZERO equ 08000HINITIAL_MXCSR equ 01F80H
;; Machine Specific Register Numbers;
MSR_EFER equ 0C0000080HMSR_FS_BASE equ 0C0000100HMSR_GS_BASE equ 0C0000101HMSR_GS_SWAP equ 0C0000102H
;; Flags within MSR_EFER;
MSR_LMA equ 00400H
;; Miscellaneous Definitions;
MAXIMUM_PROCESSORS equ 00040HINITIAL_STALL_COUNT equ 00064HIRQL_NOT_GREATER_OR_EQUAL equ 00009HIRQL_NOT_LESS_OR_EQUAL equ 0000AHMUTEX_ALREADY_OWNED equ 000BFHTHREAD_NOT_MUTEX_OWNER equ 00011HSPIN_LOCK_ALREADY_OWNED equ 0000FHSPIN_LOCK_NOT_OWNED equ 00010HExecutive equ 00000HKernelMode equ 00000HUserMode equ 00001HFALSE equ 00000HTRUE equ 00001H
;; Exception Frame Offset Definitions and Length;
ExP1Home equ 00000HExP2Home equ 00008HExP3Home equ 00010HExP4Home equ 00018HExP5 equ 00020HExXmm6 equ 00030HExXmm7 equ 00040HExXmm8 equ 00050HExXmm9 equ 00060HExXmm10 equ 00070HExXmm11 equ 00080HExXmm12 equ 00090HExXmm13 equ 000A0HExXmm14 equ 000B0HExXmm15 equ 000C0HExRbp equ 000F8HExRbx equ 00100HExRdi equ 00108HExRsi equ 00110HExR12 equ 00118HExR13 equ 00120HExR14 equ 00128HExR15 equ 00130HExReturn equ 00138H
KEXCEPTION_FRAME_LENGTH equ 00140H
;; Jump Offset Definitions and Length;
JbFrame equ 00000HJbRbx equ 00008HJbRsp equ 00010HJbRbp equ 00018HJbRsi equ 00020HJbRdi equ 00028HJbR12 equ 00030HJbR13 equ 00038HJbR14 equ 00040HJbR15 equ 00048HJbRip equ 00050HJbXmm6 equ 00060HJbXmm7 equ 00070HJbXmm8 equ 00080HJbXmm9 equ 00090HJbXmm10 equ 000A0HJbXmm11 equ 000B0HJbXmm12 equ 000C0HJbXmm13 equ 000D0HJbXmm14 equ 000E0HJbXmm15 equ 000F0H
;; Switch Frame Offset Definitions and Length;
SwMxCsr equ 00008HSwApcBypass equ 0000CHSwNpxSave equ 0000DHSwRbp equ 00010HSwReturn equ 00018H
KSWITCH_FRAME_LENGTH equ 00020H
;; Trap Frame Offset and EFLAG Definitions and Length;
EFLAGS_TF_MASK equ 00100HEFLAGS_TF_SHIFT equ 00008HEFLAGS_IF_MASK equ 00200HEFLAGS_IF_SHIFT equ 00009HEFLAGS_USER_SANITIZE equ 040DD5H
TrP1Home equ 0FFFFFF80HTrP2Home equ 0FFFFFF88HTrP3Home equ 0FFFFFF90HTrP4Home equ 0FFFFFF98HTrP5 equ 0FFFFFFA0HTrPreviousMode equ 0FFFFFFA8HTrPreviousIrql equ 0FFFFFFA9HTrMxCsr equ 0FFFFFFACHTrRax equ 0FFFFFFB0HTrRcx equ 0FFFFFFB8HTrRdx equ 0FFFFFFC0HTrR8 equ 0FFFFFFC8HTrR9 equ 0FFFFFFD0HTrR10 equ 0FFFFFFD8HTrR11 equ 0FFFFFFE0HTrXmm0 equ 0FFFFFFF0HTrXmm1 equ 00000HTrXmm2 equ 00010HTrXmm3 equ 00020HTrXmm4 equ 00030HTrXmm5 equ 00040HTrDr0 equ 00050HTrDr1 equ 00058HTrDr2 equ 00060HTrDr3 equ 00068HTrDr6 equ 00070HTrDr7 equ 00078HTrSegDs equ 00080HTrSegEs equ 00082HTrSegFs equ 00084HTrSegGs equ 00086HTrTrapFrame equ 00088HTrExceptionRecord equ 00090HTrRbx equ 00130HTrRdi equ 00138HTrRsi equ 00140HTrRbp equ 00148HTrErrorCode equ 00150HTrRip equ 00158HTrSegCs equ 00160HTrEFlags equ 00168HTrRsp equ 00170HTrSegSs equ 00178H
KTRAP_FRAME_LENGTH equ 00200H
;; CPU information structure offset definitions;
CpuEax equ 00000HCpuEbx equ 00004HCpuEcx equ 00008HCpuEdx equ 0000CH
;; Usermode Callout User Frame Definitions;
CkBuffer equ 00020HCkLength equ 00028HCkApiNumber equ 0002CHCkRsp equ 00048HCkRip equ 00030HCalloutFrameLength equ 00058H
;; Machine Frame Offset Definitions;
MfRip equ 00000HMfSegCs equ 00008HMfEFlags equ 00010HMfRsp equ 00018HMfSegSs equ 00020HMachineFrameLength equ 00028H
;; Floating Save Offset Definitions;
FsMxCsr equ 00000H
;; LPC Structure Offset Definitions;
PmLength equ 00000HPmZeroInit equ 00004HPmClientId equ 00008HPmProcess equ 00008HPmThread equ 00010HPmMessageId equ 00018HPmClientViewSize equ 00020HPortMessageLength equ 00028H
;; Client Id Structure Offset Definitions;
CidUniqueProcess equ 00000HCidUniqueThread equ 00008H
;; Context Frame Offset and Flag Definitions;
CONTEXT_FULL equ 010000BHCONTEXT_CONTROL equ 0100001HCONTEXT_INTEGER equ 0100002HCONTEXT_SEGMENTS equ 0100004HCONTEXT_FLOATING_POINT equ 0100008HCONTEXT_DEBUG_REGISTERS equ 0100010H
CxP1Home equ 00000HCxP2Home equ 00008HCxP3Home equ 00010HCxP4Home equ 00018HCxP5Home equ 00020HCxP6Home equ 00028HCxContextFlags equ 00030HCxMxCsr equ 00034HCxSegCs equ 00038HCxSegDs equ 0003AHCxSegEs equ 0003CHCxSegFs equ 0003EHCxSegGs equ 00040HCxSegSs equ 00042HCxEFlags equ 00044HCxDr0 equ 00048HCxDr1 equ 00050HCxDr2 equ 00058HCxDr3 equ 00060HCxDr6 equ 00068HCxDr7 equ 00070HCxRax equ 00078HCxRcx equ 00080HCxRdx equ 00088HCxRbx equ 00090HCxRsp equ 00098HCxRbp equ 000A0HCxRsi equ 000A8HCxRdi equ 000B0HCxR8 equ 000B8HCxR9 equ 000C0HCxR10 equ 000C8HCxR11 equ 000D0HCxR12 equ 000D8HCxR13 equ 000E0HCxR14 equ 000E8HCxR15 equ 000F0HCxRip equ 000F8HCxXmm0 equ 00100HCxXmm1 equ 00110HCxXmm2 equ 00120HCxXmm3 equ 00130HCxXmm4 equ 00140HCxXmm5 equ 00150HCxXmm6 equ 00160HCxXmm7 equ 00170HCxXmm8 equ 00180HCxXmm9 equ 00190HCxXmm10 equ 001A0HCxXmm11 equ 001B0HCxXmm12 equ 001C0HCxXmm13 equ 001D0HCxXmm14 equ 001E0HCxXmm15 equ 001F0HCxFltSave equ 00200HCONTEXT_FRAME_LENGTH equ 00270HDR7_ACTIVE equ 00055H
;; Dispatcher Context Structure Offset Definitions;
DcControlPc equ 00000HDcImageBase equ 00008HDcFunctionEntry equ 00010HDcEstablisherFrame equ 00018HDcTargetIp equ 00020HDcContextRecord equ 00028HDcLanguageHandler equ 00030HDcHandlerData equ 00038H
;; Legacy Floating save area field offset definitions;
LfControlWord equ 00000HLfStatusWord equ 00004HLfTagWord equ 00008HLfErrorOffset equ 0000CHLfErrorOpcode equ 00012HLfErrorSelector equ 00010HLfDataOffset equ 00014HLfDataSelector equ 00018HLfFloatRegisters equ 0001CH
LEGACY_SAVE_AREA_LENGTH equ 00070H
;; Processor State Frame Offset Definitions;
PsSpecialRegisters equ 00000HPsCr0 equ 00000HPsCr2 equ 00008HPsCr3 equ 00010HPsCr4 equ 00018HPsKernelDr0 equ 00020HPsKernelDr1 equ 00028HPsKernelDr2 equ 00030HPsKernelDr3 equ 00038HPsKernelDr6 equ 00040HPsKernelDr7 equ 00048HPsGdtr equ 00056HPsIdtr equ 00066HPsTr equ 00070HPsLdtr equ 00072HPsContextFrame equ 00080HProcessorStateLength equ 002F0H
;; Processor Start Block Offset Definitions;
PsbCompletionFlag equ 00004HPsbGdt32 equ 00008HPsbIdt32 equ 0000EHPsbGdt equ 00018HPsbTiledCr3 equ 00058HPsbPmTarget equ 00060HPsbLmTarget equ 00066HPsbSelfMap equ 00070HPsbProcessorState equ 00080HProcessorStartBlockLength equ 00370H
;; Machine type definitions (Temporarily);
MACHINE_TYPE_ISA equ 00000HMACHINE_TYPE_EISA equ 00001HMACHINE_TYPE_MCA equ 00002H
;; LoaderParameterBlock offsets relative to base;
LpbLoadOrderListHead equ 00000HLpbMemoryDescriptorListHead equ 00010HLpbKernelStack equ 00030HLpbPrcb equ 00038HLpbProcess equ 00040HLpbThread equ 00048HLpbI386 equ 000B8HLpbRegistryLength equ 00050HLpbRegistryBase equ 00058HLpbConfigurationRoot equ 00060HLpbArcBootDeviceName equ 00068HLpbArcHalDeviceName equ 00070H
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