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637 lines
11 KiB
637 lines
11 KiB
#include "stdafx.h"
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#pragma hdrstop
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/***************************************************************************
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*
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* INTEL Corporation Proprietary Information
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*
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*
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* Copyright (c) 1996 Intel Corporation.
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* All rights reserved.
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*
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***************************************************************************
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AUTHOR: Kumar Balasubramanian
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***************************************************************************
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** Pentium version of the "integer LLM mode" within IJG decompressor code.
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** The following is a non-MMX Pentium implementation of the integer slow mode
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** IDCT within the IJG code.
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*/
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#define JPEG_INTERNALS
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#include "jinclude.h"
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#include "jpeglib.h"
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#include "jdct.h" /* Private declarations for DCT subsystem */
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#ifdef DCT_ISLOW_SUPPORTED
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/*
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* This module is specialized to the case DCTSIZE = 8.
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*/
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#if DCTSIZE != 8
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Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
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#endif
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#if BITS_IN_JSAMPLE == 8
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#define CONST_BITS 13
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#define PASS1_BITS 2
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#else
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#define CONST_BITS 13
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#define PASS1_BITS 1 /* lose a little precision to avoid overflow */
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#endif
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/* Define the constants for the case BITS_IN_JSAMPLE = 8 */
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static const INT32 const_0_2986 = 0x0000098E ;
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static const INT32 const_0_3901 = 0x0fffff384;
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static const INT32 const_0_54119 = 0x00001151;
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static const INT32 const_0_7653 = 0x0000187E;
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static const INT32 const_0_899 = 0x0ffffe333;
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static const INT32 const_1_175 = 0x000025a1;
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static const INT32 const_1_501 = 0x0000300b;
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static const INT32 const_1_8477 = 0x0ffffc4df;
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static const INT32 const_1_961 = 0x0ffffc13b;
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static const INT32 const_2_053 = 0x000041b3;
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static const INT32 const_2_562 = 0x0ffffadfd;
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static const INT32 const_3_072 = 0x00006254;
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static const INT32 const_round = 0x00000400;
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static const INT32 const_round_row = 0x00020000;
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static const INT32 const_mask = 0x000003ff;
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/*
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* Perform dequantization and inverse DCT on one block of coefficients.
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*/
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GLOBAL(void)
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pidct8x8llm (JCOEFPTR inptr, short *quantptr, short *wsptr,
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JSAMPARRAY output_buf, JDIMENSION output_col, JSAMPLE *range_limit )
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{
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INT32 locdwinptr, locdwqptr, locdwwsptr, locdwtmp0, locdwtmp1 ;
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INT32 locdwtmp2, locdwtmp3, locdwtmp00, locdwtmp01, locdwtmp02 ;
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INT32 locdwtmp03, locdwtmp10, locdwtmp11, locdwtmp12 ;
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INT32 locdwtmp13, locdwcounter, locdwrowctr ;
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// Inline assembly to do the IDCT and store the result */
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__asm {
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mov esi, inptr ; point to start of source
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mov edi, quantptr ;
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mov eax, wsptr
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mov locdwinptr, esi ; point to start of source
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mov locdwqptr, edi ;
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mov locdwwsptr, eax
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mov locdwcounter, 8
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mov eax, [esi] ; warm up the cache
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mov ebx, [esi+32]
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mov ecx, [esi+64]
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mov edx, [esi+96]
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mov eax, [edi]
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mov ebx, [edi+32]
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mov ecx, [edi+64]
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mov edx, [edi+96]
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;; 1D-IDCT of all the eight columns
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idct_column:
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mov esi, locdwinptr ; point to start of source
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mov edi, locdwqptr ;
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;; do the even part
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mov ax, [esi+16*2]
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mov bx, [edi+16*2]
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shl eax, 16 ; sign extend the i/p
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mov cx, [esi+16*6]
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sar eax, 16
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mov dx, [edi+16*6]
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shl ebx, 16 ; sign extend the quant factor
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sar ebx, 16
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imul eax, ebx ; dequantized C2 = z2
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shl ecx, 16
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sar ecx, 16
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shl edx, 16
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sar edx, 16
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imul ecx, edx ; dequantized C6 = z3
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mov ebx, eax ; copy of z2
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imul eax, const_0_7653
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add ebx, ecx ; z2 + z3
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imul ecx, const_1_8477
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imul ebx, const_0_54119 ; z1
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mov dx, [edi+16*4] ; quant factor for C4
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add ecx, ebx ; tmp2
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add eax, ebx ; tmp3
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mov locdwtmp2, ecx
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mov locdwtmp3, eax
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mov cx, [esi+16*4] ; C4
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mov ax, [esi+16*0] ; C0
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mov bx, [edi+16*0] ; quant factor for C0
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movsx edx, dx
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movsx ecx, cx
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movsx eax, ax
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movsx ebx, bx
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imul ecx, edx ; dequantize C4 = z3
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imul eax, ebx ; dequantize C0 = z2
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mov edx, ecx ; copy of z3
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add ecx, eax ; z2 + z3
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shl ecx, 13 ; tmp0
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sub eax, edx ; z2 - z3
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shl eax, 13 ; tmp1
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mov ebx, ecx ; copy of tmp0
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add ecx, locdwtmp3 ; tmp10
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mov edx, eax ; copy of tmp1
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add eax, locdwtmp2 ; tmp11
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mov locdwtmp00, ecx
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sub ebx, locdwtmp3 ; tmp13
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mov locdwtmp01, eax
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sub edx, locdwtmp2 ; tmp12
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mov locdwtmp03, ebx
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mov ax, [esi+16*7] ; C7 for the odd part
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mov locdwtmp02, edx
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mov bx, [edi+16*7] ; quant factor for C7
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;; now do the odd part
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shl eax, 16
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mov cx, [esi+16*3]
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sar eax, 16
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mov dx, [edi+16*3]
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shl ebx, 16
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sar ebx, 16
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imul eax, ebx ; dequantized C7 = tmp0
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shl ecx, 16
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sar ecx, 16
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shl edx, 16
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sar edx, 16
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mov bx, [esi+16*1]
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imul ecx, edx ; dequantized C3 = tmp2
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shl ebx, 16
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mov dx, [edi+16*1]
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sar ebx, 16
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shl edx, 16
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sar edx, 16
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imul ebx, edx ; dequantized C1 = tmp3
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mov locdwtmp0, eax
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mov locdwtmp2, ecx
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mov ax, [esi+16*5]
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mov dx, [edi+16*5]
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shl eax, 16
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sar eax, 16
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shl edx, 16
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sar edx, 16
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imul eax, edx ; dequantized C5 = tmp1
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imul ecx, const_3_072 ; tmp2
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mov locdwtmp3, ebx
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mov edx, locdwtmp0
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imul ebx, const_1_501 ; tmp3
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imul edx, const_0_2986 ; tmp0
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mov locdwtmp1, eax ; store tmp1
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mov locdwtmp10, edx
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imul eax, const_2_053 ; tmp1
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mov locdwtmp11, eax
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mov locdwtmp12, ecx
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mov locdwtmp13, ebx
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mov eax, locdwtmp0
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mov ebx, locdwtmp1
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mov ecx, eax
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mov edx, ebx
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add eax, locdwtmp3 ; z1
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add ebx, locdwtmp3 ; z4
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add ecx, locdwtmp2 ; z3
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add edx, locdwtmp2 ; z2
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mov esi, ecx ; copy of z3
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imul eax, const_0_899 ; z1
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imul edx, const_2_562 ; z2
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add esi, ebx ; z3 + z4
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imul esi, const_1_175 ; z5
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imul ecx, const_1_961 ; z3
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imul ebx, const_0_3901 ; z4
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add ecx, esi ; z3
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add ebx, esi ; z4
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mov esi, eax ; copy of z1
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add eax, ecx ; z1 + z3
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add esi, ebx ; z1 + z4
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add ecx, edx ; z3 + z2
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add edx, ebx ; z2 + z4
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add eax, locdwtmp10 ; tmp0
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add edx, locdwtmp11 ; tmp1
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add ecx, locdwtmp12 ; tmp2
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add esi, locdwtmp13 ; tmp3
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mov ebx, locdwtmp03
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sub ebx, eax ; w4
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add eax, locdwtmp03 ; w3
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add ebx, const_round
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mov edi, locdwwsptr ; keep in mind that wsptr stores 32 bit values
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sar ebx, 11 ; So store/update the pointer accordingly
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add eax, const_round
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sar eax, 11
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mov [edi+32*4], ebx
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mov [edi+32*3], eax
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mov ebx, locdwtmp02
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mov eax, locdwtmp01
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sub ebx, edx ; w5
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add edx, locdwtmp02 ; w2
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sub eax, ecx ; w6
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add ecx, locdwtmp01 ; w1
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add ebx, const_round
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sar ebx, 11
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add eax, const_round
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sar eax, 11
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add edx, const_round
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add ecx, const_round
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mov [edi+32*5], ebx
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sar edx, 11
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mov [edi+32*6], eax
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sar ecx, 11
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mov [edi+32*2], edx
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mov eax, locdwtmp00
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mov [edi+32*1], ecx
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mov ebx, eax
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sub eax, esi ; w7
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add ebx, esi ; w0
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add eax, const_round
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sar eax, 11
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add ebx, const_round
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sar ebx, 11
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mov [edi+32*7], eax
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mov [edi+32*0], ebx
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mov eax, locdwcounter
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add locdwinptr, 2
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add locdwwsptr, 4 ; wsptr stores 32 bit quantities
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add locdwqptr, 2
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dec eax
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mov locdwcounter, eax
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jnz idct_column
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;; End of 1D-idct of all the columns
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;; get ready for the 1D-idct of the rows
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mov esi, wsptr
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mov locdwcounter, 8
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mov locdwrowctr, 0
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mov locdwwsptr, esi
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;; 1D-IDCT of all the eight rows
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idct_row:
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mov esi, locdwwsptr ; point to start of source
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mov edi, output_buf
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add edi, locdwrowctr
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mov edi, [edi]
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add locdwrowctr, 4
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add edi, output_col ; this is the dest start addr for this row
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;; do the even part
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mov eax, [esi+4*2]
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mov ecx, [esi+4*6]
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mov ebx, eax ; copy of z2
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mov edx, [edi] ; warm up the cache for writing this output row
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imul eax, const_0_7653
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add ebx, ecx ; z2 + z3
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imul ecx, const_1_8477
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imul ebx, const_0_54119 ; z1
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add ecx, ebx ; tmp2
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add eax, ebx ; tmp3
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mov locdwtmp2, ecx
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mov locdwtmp3, eax
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mov ecx, [esi+4*4] ; C4
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mov eax, [esi+4*0] ; C0
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mov edx, ecx ; copy of z3
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add ecx, eax ; z2 + z3
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sub eax, edx ; z2 - z3
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shl ecx, 13 ; tmp0
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shl eax, 13 ; tmp1
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mov ebx, ecx ; copy of tmp0
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add ecx, locdwtmp3 ; tmp10
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mov edx, eax ; copy of tmp1
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add eax, locdwtmp2 ; tmp11
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mov locdwtmp00, ecx
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sub ebx, locdwtmp3 ; tmp13
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mov locdwtmp01, eax
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sub edx, locdwtmp2 ; tmp12
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mov locdwtmp03, ebx
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mov eax, [esi+4*7] ; C7 for the odd part
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mov locdwtmp02, edx
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;; now do the odd part
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mov ecx, [esi+4*3]
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mov ebx, [esi+4*1]
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mov locdwtmp0, eax
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mov locdwtmp2, ecx
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mov eax, [esi+4*5]
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mov locdwtmp3, ebx
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imul ecx, const_3_072 ; tmp2
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mov edx, locdwtmp0
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imul ebx, const_1_501 ; tmp3
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imul edx, const_0_2986 ; tmp0
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mov locdwtmp1, eax ; store tmp1
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imul eax, const_2_053 ; tmp1
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mov locdwtmp10, edx
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mov locdwtmp11, eax
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mov locdwtmp12, ecx
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mov locdwtmp13, ebx
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mov eax, locdwtmp0
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mov ebx, locdwtmp1
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mov ecx, eax
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mov edx, ebx
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add eax, locdwtmp3 ; z1
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add edx, locdwtmp2 ; z2
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add ebx, locdwtmp3 ; z4
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add ecx, locdwtmp2 ; z3
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mov esi, ecx ; copy of z3
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imul eax, const_0_899 ; z1
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imul edx, const_2_562 ; z2
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add esi, ebx ; z3 + z4
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imul esi, const_1_175 ; z5
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imul ecx, const_1_961 ; z3
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imul ebx, const_0_3901 ; z4
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add ecx, esi ; z3
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add ebx, esi ; z4
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mov esi, eax ; copy of z1
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add eax, ecx ; z1 + z3
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add esi, ebx ; z1 + z4
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add ecx, edx ; z3 + z2
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add edx, ebx ; z2 + z4
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add eax, locdwtmp10 ; tmp0
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add edx, locdwtmp11 ; tmp1
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add ecx, locdwtmp12 ; tmp2
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add esi, locdwtmp13 ; tmp3
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mov locdwtmp0, eax
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mov locdwtmp1, edx
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mov locdwtmp2, ecx
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mov locdwtmp3, esi
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mov ebx, locdwtmp03
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add ebx, locdwtmp0 ; out3
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mov ecx, locdwtmp00
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sub ecx, locdwtmp3 ; out7
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add ebx, const_round_row
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sar ebx, 18
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add ecx, const_round_row
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sar ecx, 18
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mov esi, range_limit
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and ebx, const_mask
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and ecx, const_mask
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mov al, [esi][ebx]
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mov dl, [esi][ecx]
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mov ebx, locdwtmp02
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mov ecx, locdwtmp01
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add ebx, locdwtmp1 ; out2
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sub ecx, locdwtmp2 ; out6
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shl eax, 8 ; get ready to receive next output byte
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add ebx, const_round_row
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shl edx, 8 ; get ready to receive next output byte
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add ecx, const_round_row
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sar ebx, 18
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sar ecx, 18
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and ebx, const_mask
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and ecx, const_mask
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mov al, [esi][ebx]
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mov dl, [esi][ecx]
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mov ebx, locdwtmp01
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mov ecx, locdwtmp02
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add ebx, locdwtmp2 ; out1
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shl eax, 8 ; get ready to receive next output byte
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sub ecx, locdwtmp1 ; out5
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shl edx, 8 ; get ready to receive next output byte
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add ebx, const_round_row
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sar ebx, 18
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add ecx, const_round_row
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sar ecx, 18
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and ebx, const_mask
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and ecx, const_mask
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mov al, [esi][ebx] ; out1
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mov dl, [esi][ecx] ; out5
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mov ebx, locdwtmp00
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mov ecx, locdwtmp03
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add ebx, locdwtmp3 ; out0
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shl eax, 8 ; get ready to receive next output byte
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sub ecx, locdwtmp0 ; out4
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shl edx, 8 ; get ready to receive next output byte
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add ebx, const_round_row
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sar ebx, 18
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add ecx, const_round_row
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sar ecx, 18
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and ebx, const_mask
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and ecx, const_mask
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mov al, [esi][ebx] ; out0
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mov dl, [esi][ecx] ; out4
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mov [edi], eax ; store the first four bytes
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mov [edi+4], edx ; store the next four bytes of this row
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mov eax, locdwcounter
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add locdwwsptr, 32 ; wsptr stores 32 bit quantities
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dec eax
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mov locdwcounter, eax
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jnz idct_row
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} //end of __asm
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}
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#endif /* DCT_ISLOW_SUPPORTED */
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