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747 lines
22 KiB
747 lines
22 KiB
/*
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* $Log: P:/user/amir/lite/vcs/amdmtd.c_v $
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*
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* Rev 1.21 03 Nov 1997 16:07:06 danig
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* Support RFA
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*
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* Rev 1.20 02 Nov 1997 11:06:38 ANDRY
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* bug fix in AMDErase() for RFA on PowerPC
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*
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* Rev 1.19 20 Oct 1997 14:08:56 danig
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* Resume erase only when needed
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*
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* Rev 1.18 19 Oct 1997 16:39:50 danig
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* Deal with the last word in interleaving 4
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*
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* Rev 1.17 29 Sep 1997 18:21:08 danig
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* Try different interleavings in amdMTDIdentify()
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*
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* Rev 1.16 24 Sep 1997 17:45:52 danig
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* Default interleaving value is 4
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*
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* Rev 1.15 10 Sep 1997 16:22:00 danig
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* Got rid of generic names
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*
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* Rev 1.14 08 Sep 1997 18:56:50 danig
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* Support interleaving 4
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*
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* Rev 1.13 04 Sep 1997 17:39:34 danig
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* Debug messages
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*
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* Rev 1.12 31 Aug 1997 14:53:48 danig
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* Registration routine return status
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*
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* Rev 1.11 10 Aug 1997 17:56:02 danig
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* Comments
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*
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* Rev 1.10 24 Jul 1997 17:51:54 amirban
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* FAR to FAR0
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*
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* Rev 1.9 20 Jul 1997 17:16:54 amirban
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* No watchDogTimer
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*
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* Rev 1.8 07 Jul 1997 15:20:54 amirban
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* Ver 2.0
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*
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* Rev 1.5 06 Feb 1997 18:18:34 danig
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* Different unlock addresses for series C
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*
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* Rev 1.4 17 Nov 1996 15:45:16 danig
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* added LV017 support.
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*
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* Rev 1.3 14 Oct 1996 17:57:00 danig
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* new IDs and eraseFirstBlockLV008.
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*
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* Rev 1.2 09 Sep 1996 11:38:26 amirban
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* Correction for Fujitsu 8-mbit
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*
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* Rev 1.1 29 Aug 1996 14:14:46 amirban
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* Warnings
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*
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* Rev 1.0 15 Aug 1996 15:16:38 amirban
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* Initial revision.
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*/
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/************************************************************************/
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/* */
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/* FAT-FTL Lite Software Development Kit */
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/* Copyright (C) M-Systems Ltd. 1995-1996 */
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/* */
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/************************************************************************/
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/*----------------------------------------------------------------------*/
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/* */
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/* This MTD supports the following Flash technologies: */
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/* */
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/* - AMD Am29F080 8-mbit devices */
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/* - AMD Am29LV080 8-mbit devices */
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/* - AMD Am29F016 16-mbit devices */
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/* - Fujitsu MBM29F080 8-mbit devices */
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/* */
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/* And (among others) the following Flash media and cards: */
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/* */
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/* - AMD Series-D PCMCIA cards */
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/* - AMD AmMC0XXA Miniature cards */
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/* - AMD AmMCL0XXA Miniature cards */
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/* */
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/*----------------------------------------------------------------------*/
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#include "flflash.h"
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#ifdef FL_BACKGROUND
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#include "backgrnd.h"
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#endif
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#define NO_UNLOCK_ADDR 0xffffffffL
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typedef struct {
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ULONG unlockAddr1,
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unlockAddr2;
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ULONG baseMask;
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} Vars;
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Vars mtdVars_amdmtd[SOCKETS];
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#define thisVars ((Vars *) vol.mtdVars)
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#define SETUP_ERASE 0x80
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#define SETUP_WRITE 0xa0
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#define READ_ID 0x90
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#define SUSPEND_ERASE 0xb0
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#define SECTOR_ERASE 0x30
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#define RESUME_ERASE 0x30
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#define READ_ARRAY 0xf0
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#define UNLOCK_1 0xaa
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#define UNLOCK_2 0x55
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#define UNLOCK_ADDR1 0x5555u
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#define UNLOCK_ADDR2 0x2aaau
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#define D2 4 /* Toggles when erase suspended */
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#define D5 0x20 /* Set when programming timeout */
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#define D6 0x40 /* Toggles when programming */
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/* JEDEC ids for this MTD */
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#define Am29F040_FLASH 0x01a4
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#define Am29F080_FLASH 0x01d5
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#define Am29LV080_FLASH 0x0138
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#define Am29LV008_FLASH 0x0137
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#define Am29F016_FLASH 0x01ad
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#define Am29F016C_FLASH 0x013d
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#define Am29LV017_FLASH 0x01c8
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#define Fuj29F040_FLASH 0x04a4
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#define Fuj29F080_FLASH 0x04d5
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#define Fuj29LV080_FLASH 0x0438
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#define Fuj29LV008_FLASH 0x0437
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#define Fuj29F016_FLASH 0x04ad
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#define Fuj29F016C_FLASH 0x043d
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#define Fuj29LV017_FLASH 0x04c8
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|
|
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/*----------------------------------------------------------------------*/
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/* m a p B a s e */
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/* */
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/* Map the window to a page base (page is 4KB or 32KB depends on the */
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/* media type) and return a pointer to the base. Also return the offset */
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/* of the given address from the base. */
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/* */
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/* Parameters: */
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/* vol : Pointer identifying drive */
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/* address : Card address to map */
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/* offset : receives the offset from the base */
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/* length : length to map */
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/* */
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/* Returns: */
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/* FlashPTR : pointer to the page base. */
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/* */
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/*----------------------------------------------------------------------*/
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FlashPTR mapBase(FLFlash vol,
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CardAddress address,
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ULONG *offset,
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LONG length)
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{
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CardAddress base = address & thisVars->baseMask;
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*offset = (ULONG)(address - base);
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return (FlashPTR)flMap(vol.socket, base);
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}
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/*----------------------------------------------------------------------*/
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/* a m d C o m m a n d */
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/* */
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/* Writes an AMD command with the required unlock sequence */
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/* */
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/* Parameters: */
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/* vol : Pointer identifying drive */
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/* address : Card address at which to write command */
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/* command : command to write */
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/* flashPtr : pointer to the window */
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/* */
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/*----------------------------------------------------------------------*/
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VOID amdCommand(FLFlash vol,
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CardAddress address,
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UCHAR command,
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FlashPTR flashPtr)
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{
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if (thisVars->unlockAddr1 != NO_UNLOCK_ADDR) {
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tffsWriteByteFlash(flAddLongToFarPointer((VOID FAR0 *)flashPtr,
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((LONG) address & (vol.interleaving - 1)) + thisVars->unlockAddr1)
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,UNLOCK_1);
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tffsWriteByteFlash(flAddLongToFarPointer((VOID FAR0 *)flashPtr,
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((LONG) address & (vol.interleaving - 1)) + thisVars->unlockAddr2)
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,UNLOCK_2);
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tffsWriteByteFlash(flAddLongToFarPointer((VOID FAR0 *)flashPtr,
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((LONG) address & (vol.interleaving - 1)) + thisVars->unlockAddr1)
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,command);
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}
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else {
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CardAddress baseAddress = address & (-0x10000l | (vol.interleaving - 1));
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tffsWriteByteFlash(flMap(vol.socket,baseAddress + vol.interleaving * UNLOCK_ADDR1),
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UNLOCK_1);
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tffsWriteByteFlash(flMap(vol.socket,baseAddress + vol.interleaving * UNLOCK_ADDR2),
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UNLOCK_2);
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tffsWriteByteFlash(flMap(vol.socket,baseAddress + vol.interleaving * UNLOCK_ADDR1),
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command);
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flMap(vol.socket, address);
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}
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}
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/*----------------------------------------------------------------------*/
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/* a m d M T D W r i t e */
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/* */
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/* Write a block of bytes to Flash */
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/* */
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/* This routine will be registered as the MTD vol.write routine */
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/* */
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/* Parameters: */
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/* vol : Pointer identifying drive */
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/* address : Card address to write to */
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/* buffer : Address of data to write */
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/* length : Number of bytes to write */
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/* overwrite : TRUE if overwriting old Flash contents */
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/* FALSE if old contents are known to be erased */
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/* */
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/* Returns: */
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/* FLStatus : 0 on success, failed otherwise */
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/*----------------------------------------------------------------------*/
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FLStatus amdMTDWrite(FLFlash vol,
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CardAddress address,
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const VOID FAR1 *buffer,
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dword length,
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word overwrite)
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{
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/* Set timeout to 5 seconds from now */
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ULONG writeTimeout = flMsecCounter + 5000;
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LONG cLength, i;
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FlashPTR flashPtr, unlockAddr1, unlockAddr2;
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ULONG offset;
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if (flWriteProtected(vol.socket))
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return flWriteProtect;
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flashPtr = mapBase(&vol, address, &offset, length);
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unlockAddr1 = (FlashPTR) flAddLongToFarPointer((VOID FAR0 *)flashPtr,
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thisVars->unlockAddr1);
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unlockAddr2 = (FlashPTR) flAddLongToFarPointer((VOID FAR0 *)flashPtr,
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thisVars->unlockAddr2);
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flashPtr = (FlashPTR) flAddLongToFarPointer((VOID FAR0 *)flashPtr,
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offset);
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cLength = length;
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if (vol.interleaving == 1) {
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lastByte:
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#ifdef __cplusplus
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#define bFlashPtr flashPtr
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#define bBuffer ((const UCHAR FAR1 * &) buffer)
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#else
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#define bFlashPtr flashPtr
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#define bBuffer ((const UCHAR FAR1 *) buffer)
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#endif
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while (cLength >= 1) {
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tffsWriteByteFlash(unlockAddr1, UNLOCK_1);
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tffsWriteByteFlash(unlockAddr2, UNLOCK_2);
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tffsWriteByteFlash(unlockAddr1,SETUP_WRITE);
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tffsWriteByteFlash(bFlashPtr, *bBuffer);
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cLength--;
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bBuffer++;
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bFlashPtr++;
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while (tffsReadByteFlash(bFlashPtr-1) != bBuffer[-1] && flMsecCounter < writeTimeout) {
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if ((tffsReadByteFlash(bFlashPtr-1) & D5) &&
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tffsReadByteFlash(bFlashPtr-1) != bBuffer[-1]) {
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tffsWriteByteFlash(bFlashPtr-1, READ_ARRAY);
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DEBUG_PRINT(("Debug: write failed in AMD MTD.\n"));
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return flWriteFault;
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}
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}
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}
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}
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else if (vol.interleaving == 2) {
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lastWord:
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#ifdef __cplusplus
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#define wFlashPtr ((FlashWPTR &) flashPtr)
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#define wBuffer ((const USHORT FAR1 * &) buffer)
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#define wUnlockAddr1 ((FlashWPTR &) unlockAddr1)
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#define wUnlockAddr2 ((FlashWPTR &) unlockAddr2)
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#else
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#define wFlashPtr ((FlashWPTR) flashPtr)
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#define wBuffer ((const USHORT FAR1 *) buffer)
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#define wUnlockAddr1 ((FlashWPTR) unlockAddr1)
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#define wUnlockAddr2 ((FlashWPTR) unlockAddr2)
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#endif
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while (cLength >= 2) {
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tffsWriteWordFlash(wUnlockAddr1, UNLOCK_1 * 0x101);
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tffsWriteWordFlash(wUnlockAddr2, UNLOCK_2 * 0x101);
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tffsWriteWordFlash(wUnlockAddr1, SETUP_WRITE * 0x101);
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tffsWriteWordFlash(wFlashPtr, *wBuffer);
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cLength -= 2;
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wBuffer++;
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wFlashPtr++;
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while ((tffsReadWordFlash(wFlashPtr-1) != wBuffer[-1]) && (flMsecCounter < writeTimeout)) {
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if (((tffsReadWordFlash(wFlashPtr-1) & D5) &&
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((tffsReadWordFlash(wFlashPtr-1) ^ wBuffer[-1]) & 0xff))
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||
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((tffsReadWordFlash(wFlashPtr-1) & (D5 * 0x100)) &&
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((tffsReadWordFlash(wFlashPtr-1) ^ wBuffer[-1]) & 0xff00))) {
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tffsWriteWordFlash(wFlashPtr-1, READ_ARRAY * 0x101);
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DEBUG_PRINT(("Debug: write failed in AMD MTD.\n"));
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return flWriteFault;
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}
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}
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}
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if (cLength > 0)
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goto lastByte;
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}
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else /* if (vol.interleaving >= 4) */ {
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#ifdef __cplusplus
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#define dFlashPtr ((FlashDPTR &) flashPtr)
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#define dBuffer ((const ULONG FAR1 * &) buffer)
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#define dUnlockAddr1 ((FlashDPTR &) unlockAddr1)
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#define dUnlockAddr2 ((FlashDPTR &) unlockAddr2)
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#else
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#define dFlashPtr ((FlashDPTR) flashPtr)
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#define dBuffer ((const ULONG FAR1 *) buffer)
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#define dUnlockAddr1 ((FlashDPTR) unlockAddr1)
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#define dUnlockAddr2 ((FlashDPTR) unlockAddr2)
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#endif
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while (cLength >= 4) {
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tffsWriteDwordFlash(dUnlockAddr1, UNLOCK_1 * 0x1010101lu);
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tffsWriteDwordFlash(dUnlockAddr2, UNLOCK_2 * 0x1010101lu);
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tffsWriteDwordFlash(dUnlockAddr1, SETUP_WRITE * 0x1010101lu);
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tffsWriteDwordFlash(dFlashPtr, *dBuffer);
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cLength -= 4;
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dBuffer++;
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dFlashPtr++;
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while ((tffsReadDwordFlash(dFlashPtr-1) != dBuffer[-1]) && (flMsecCounter < writeTimeout)) {
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if (((tffsReadDwordFlash(dFlashPtr-1) & D5) &&
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((tffsReadDwordFlash(dFlashPtr-1) ^ dBuffer[-1]) & 0xff))
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||
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((tffsReadDwordFlash(dFlashPtr-1) & (D5 * 0x100)) &&
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((tffsReadDwordFlash(dFlashPtr-1) ^ dBuffer[-1]) & 0xff00))
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||
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((tffsReadDwordFlash(dFlashPtr-1) & (D5 * 0x10000lu)) &&
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((tffsReadDwordFlash(dFlashPtr-1) ^ dBuffer[-1]) & 0xff0000lu))
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||
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((tffsReadDwordFlash(dFlashPtr-1) & (D5 * 0x1000000lu)) &&
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((tffsReadDwordFlash(dFlashPtr-1) ^ dBuffer[-1]) & 0xff000000lu))) {
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tffsWriteDwordFlash(dFlashPtr-1, READ_ARRAY * 0x1010101lu);
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DEBUG_PRINT(("Debug: write failed in AMD MTD.\n"));
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return flWriteFault;
|
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}
|
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}
|
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}
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if (cLength > 0)
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goto lastWord;
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}
|
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|
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flashPtr -= length;
|
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bBuffer -= length;
|
|
|
|
|
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/* compare double words */
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for(;length >= 4; length -= 4, dFlashPtr++, dBuffer++) {
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if (tffsReadDwordFlash(dFlashPtr) != *dBuffer) {
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DEBUG_PRINT(("Debug: write failed in AMD MTD on verification.\n"));
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return flWriteFault;
|
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}
|
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}
|
|
|
|
/* compare the last bytes */
|
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for(; length; length--, bFlashPtr++, bBuffer++) {
|
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if (tffsReadByteFlash(bFlashPtr) != *bBuffer) {
|
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DEBUG_PRINT(("Debug: write failed in AMD MTD on verification.\n"));
|
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return flWriteFault;
|
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}
|
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}
|
|
|
|
|
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return flOK;
|
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}
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
/* e r a s e F i r s t B l o c k L V 0 0 8 */
|
|
/* */
|
|
/* Erase the first block in LV008 chip. This block is devided into four */
|
|
/* subblocks 16, 8, 8, and 32 kbytes in size. */
|
|
/* */
|
|
/* Parameters: */
|
|
/* vol : Pointer identifying drive */
|
|
/* firstErasableBlock : Number of block to erase */
|
|
/* */
|
|
/* Returns: */
|
|
/* FLStatus : 0 on success, failed otherwise */
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
FLStatus eraseFirstBlockLV008(FLFlash vol, LONG firstErasableBlock)
|
|
{
|
|
LONG iSubBlock;
|
|
LONG subBlockSize = 0;
|
|
|
|
for (iSubBlock = 0; iSubBlock < 4; iSubBlock++) {
|
|
LONG i;
|
|
FlashPTR flashPtr;
|
|
FLBoolean finished;
|
|
|
|
switch (iSubBlock) {
|
|
case 1:
|
|
subBlockSize = 0x4000;
|
|
break;
|
|
case 2:
|
|
case 3:
|
|
subBlockSize = 0x2000;
|
|
break;
|
|
}
|
|
|
|
flashPtr = (FlashPTR)
|
|
flMap(vol.socket,
|
|
firstErasableBlock + subBlockSize * vol.interleaving);
|
|
|
|
for (i = 0; i < vol.interleaving; i++) {
|
|
amdCommand(&vol, i,SETUP_ERASE, flashPtr);
|
|
tffsWriteByteFlash((FlashPTR) flAddLongToFarPointer((VOID FAR0 *)flashPtr,
|
|
i + thisVars->unlockAddr1), UNLOCK_1);
|
|
tffsWriteByteFlash((FlashPTR) flAddLongToFarPointer((VOID FAR0 *)flashPtr,
|
|
i + thisVars->unlockAddr2), UNLOCK_2);
|
|
tffsWriteByteFlash(flashPtr+i, SECTOR_ERASE);
|
|
}
|
|
|
|
do {
|
|
#ifdef FL_BACKGROUND
|
|
while (flForeground(1) == BG_SUSPEND) { /* suspend */
|
|
for (i = 0; i < vol.interleaving; i++) {
|
|
tffsWriteByteFlash(flashPtr+i, SUSPEND_ERASE);
|
|
/* Wait for D6 to stop toggling */
|
|
while ((tffsReadByteFlash(flashPtr+i) ^ tffsReadByteFlash(flashPtr+i))
|
|
& D6)
|
|
;
|
|
}
|
|
}
|
|
#endif
|
|
finished = TRUE;
|
|
for (i = 0; i < vol.interleaving; i++) {
|
|
tffsWriteByteFlash(flashPtr+i, RESUME_ERASE);
|
|
if (tffsReadByteFlash(flashPtr+i) != 0xff) {
|
|
if ((tffsReadByteFlash(flashPtr+i) & D5) &&
|
|
tffsReadByteFlash(flashPtr+i) != 0xff) {
|
|
tffsWriteByteFlash(flashPtr+i, READ_ARRAY);
|
|
return flWriteFault;
|
|
}
|
|
finished = FALSE;
|
|
}
|
|
}
|
|
} while (!finished);
|
|
}
|
|
|
|
return flOK;
|
|
}
|
|
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
/* a m d M T D E r a s e */
|
|
/* */
|
|
/* Erase one or more contiguous Flash erasable blocks */
|
|
/* */
|
|
/* This routine will be registered as the MTD vol.erase routine */
|
|
/* */
|
|
/* Parameters: */
|
|
/* vol : Pointer identifying drive */
|
|
/* firstErasableBlock : Number of first block to erase */
|
|
/* numOfErasableBlocks: Number of blocks to erase */
|
|
/* */
|
|
/* Returns: */
|
|
/* FLStatus : 0 on success, failed otherwise */
|
|
/*----------------------------------------------------------------------*/
|
|
FLStatus amdMTDErase(FLFlash vol,
|
|
word firstErasableBlock,
|
|
word numOfErasableBlocks)
|
|
{
|
|
LONG iBlock;
|
|
|
|
if (flWriteProtected(vol.socket))
|
|
return flWriteProtect;
|
|
|
|
for (iBlock = 0; iBlock < numOfErasableBlocks; iBlock++) {
|
|
LONG i;
|
|
FLBoolean finished;
|
|
FlashPTR flashPtr;
|
|
|
|
/* The first block in an LV008 chip requires special care.*/
|
|
if ((vol.type == Am29LV008_FLASH) || (vol.type == Fuj29LV008_FLASH))
|
|
if ((firstErasableBlock + iBlock) % (vol.chipSize / 0x10000l) == 0) {
|
|
checkStatus(eraseFirstBlockLV008(&vol, firstErasableBlock + iBlock));
|
|
continue;
|
|
}
|
|
|
|
/* No need to call mapBase because we know we are on a unit boundary */
|
|
flashPtr = (FlashPTR)
|
|
flMap(vol.socket,
|
|
(firstErasableBlock + iBlock) * vol.erasableBlockSize);
|
|
|
|
for (i = 0; i < vol.interleaving; i++) {
|
|
amdCommand(&vol, i,SETUP_ERASE, flashPtr);
|
|
tffsWriteByteFlash((FlashPTR) flAddLongToFarPointer((VOID FAR0 *)flashPtr,
|
|
i + thisVars->unlockAddr1), UNLOCK_1);
|
|
tffsWriteByteFlash((FlashPTR) flAddLongToFarPointer((VOID FAR0 *)flashPtr,
|
|
i + thisVars->unlockAddr2), UNLOCK_2);
|
|
tffsWriteByteFlash(flashPtr+i, SECTOR_ERASE);
|
|
}
|
|
|
|
do {
|
|
#ifdef FL_BACKGROUND
|
|
FLBoolean eraseSuspended = FALSE;
|
|
|
|
while (flForeground(1) == BG_SUSPEND) { /* suspend */
|
|
eraseSuspended = TRUE;
|
|
for (i = 0; i < vol.interleaving; i++) {
|
|
tffsWriteByteFlash(flashPtr+i, SUSPEND_ERASE);
|
|
/* Wait for D6 to stop toggling */
|
|
while ((tffsReadByteFlash(flashPtr+i) ^
|
|
tffsReadByteFlash(flashPtr+i)) & D6)
|
|
;
|
|
}
|
|
}
|
|
|
|
if (eraseSuspended) { /* resume */
|
|
eraseSuspended = FALSE;
|
|
for(i = 0; i < vol.interleaving; i++)
|
|
tffsWriteByteFlash(flashPtr+i, RESUME_ERASE);
|
|
}
|
|
#endif
|
|
finished = TRUE;
|
|
for (i = 0; i < vol.interleaving; i++) {
|
|
if (tffsReadByteFlash(flashPtr+i) != 0xff) {
|
|
if ((tffsReadByteFlash(flashPtr+i) & D5) && tffsReadByteFlash(flashPtr+i) != 0xff) {
|
|
tffsWriteByteFlash(flashPtr+i, READ_ARRAY);
|
|
DEBUG_PRINT(("Debug: erase failed in AMD MTD.\n"));
|
|
return flWriteFault;
|
|
}
|
|
finished = FALSE;
|
|
flDelayMsecs(10);
|
|
}
|
|
}
|
|
} while (!finished);
|
|
}
|
|
|
|
return flOK;
|
|
}
|
|
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
/* a m d M T D M a p */
|
|
/* */
|
|
/* Map through buffer. This routine will be registered as the map */
|
|
/* routine for this MTD. */
|
|
/* */
|
|
/* Parameters: */
|
|
/* vol : Pointer identifying drive */
|
|
/* address : Flash address to be mapped. */
|
|
/* length : number of bytes to map. */
|
|
/* */
|
|
/* Returns: */
|
|
/* Pointer to the buffer data was mapped to. */
|
|
/* */
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
VOID FAR0 *amdMTDMap (FLFlash vol, CardAddress address, int length)
|
|
{
|
|
vol.socket->remapped = TRUE;
|
|
return mapThroughBuffer(&vol,address,length);
|
|
}
|
|
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
/* a m d M T D R e a d */
|
|
/* */
|
|
/* Read some data from the flash. This routine will be registered as */
|
|
/* the read routine for this MTD. */
|
|
/* */
|
|
/* Parameters: */
|
|
/* vol : Pointer identifying drive */
|
|
/* address : Address to read from. */
|
|
/* buffer : buffer to read to. */
|
|
/* length : number of bytes to read (up to sector size). */
|
|
/* modes : EDC flag etc. */
|
|
/* */
|
|
/* Returns: */
|
|
/* FLStatus : 0 on success, otherwise failed. */
|
|
/* */
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
FLStatus amdMTDRead(FLFlash vol,
|
|
CardAddress address,
|
|
VOID FAR1 *buffer,
|
|
dword length,
|
|
word modes)
|
|
{
|
|
ULONG i;
|
|
UCHAR * byteBuffer;
|
|
FlashPTR byteFlashPtr;
|
|
ULONG * dwordBuffer = (ULONG *)buffer;
|
|
FlashDPTR dwordFlashPtr = (FlashDPTR)flMap(vol.socket, address);
|
|
|
|
for (i = 0; i < length - 4; i += 4, dwordBuffer++, dwordFlashPtr++) {
|
|
*dwordBuffer = tffsReadDwordFlash(dwordFlashPtr);
|
|
}
|
|
byteBuffer = (UCHAR *)dwordBuffer;
|
|
byteFlashPtr = (FlashPTR)dwordFlashPtr;
|
|
for(; i < length; i++, byteBuffer++, byteFlashPtr++) {
|
|
*byteBuffer = tffsReadByteFlash(byteFlashPtr);
|
|
}
|
|
return flOK ;
|
|
}
|
|
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
/* a m d M T D I d e n t i f y */
|
|
/* */
|
|
/* Identifies AMD and Fujitsu flash media and registers as an MTD for */
|
|
/* such. */
|
|
/* */
|
|
/* On successful identification, the Flash structure is filled out and */
|
|
/* the write and erase routines registered. */
|
|
/* */
|
|
/* Parameters: */
|
|
/* vol : Pointer identifying drive */
|
|
/* */
|
|
/* Returns: */
|
|
/* FLStatus : 0 on positive identificaion, failed otherwise */
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
FLStatus amdMTDIdentify(FLFlash vol)
|
|
{
|
|
LONG inlv;
|
|
|
|
DEBUG_PRINT(("Debug: entering AMD MTD identification routine.\n"));
|
|
flSetWindowBusWidth(vol.socket,16);/* use 16-bits */
|
|
flSetWindowSpeed(vol.socket,150); /* 120 nsec. */
|
|
flSetWindowSize(vol.socket,2); /* 8 KBytes */
|
|
|
|
vol.mtdVars = &mtdVars_amdmtd[flSocketNoOf(vol.socket)];
|
|
thisVars->unlockAddr1 = NO_UNLOCK_ADDR;
|
|
|
|
/* try different interleavings */
|
|
for (inlv = 4; inlv > 0; inlv >>= 1) {
|
|
if (inlv == 1)
|
|
flSetWindowBusWidth(vol.socket,8); /* use 8-bits */
|
|
vol.interleaving = (unsigned short)inlv;
|
|
flIntelIdentify(&vol, amdCommand,0);
|
|
if (vol.type == Am29F016_FLASH ||
|
|
vol.type == Fuj29F016_FLASH ||
|
|
vol.type == Am29F016C_FLASH ||
|
|
vol.type == Fuj29F016C_FLASH ||
|
|
vol.type == Am29F080_FLASH ||
|
|
vol.type == Fuj29F080_FLASH ||
|
|
vol.type == Am29LV080_FLASH ||
|
|
vol.type == Fuj29LV080_FLASH ||
|
|
vol.type == Am29LV008_FLASH ||
|
|
vol.type == Fuj29LV008_FLASH ||
|
|
vol.type == Am29F040_FLASH ||
|
|
vol.type == Fuj29F040_FLASH ||
|
|
vol.type == Am29LV017_FLASH ||
|
|
vol.type == Fuj29LV017_FLASH)
|
|
break;
|
|
}
|
|
|
|
if (vol.type == Am29F016_FLASH ||
|
|
vol.type == Fuj29F016_FLASH ||
|
|
vol.type == Am29F016C_FLASH ||
|
|
vol.type == Fuj29F016C_FLASH ||
|
|
vol.type == Am29LV017_FLASH ||
|
|
vol.type == Fuj29LV017_FLASH)
|
|
vol.chipSize = 0x200000l;
|
|
else if (vol.type == Fuj29F080_FLASH ||
|
|
vol.type == Am29F080_FLASH ||
|
|
vol.type == Fuj29LV080_FLASH ||
|
|
vol.type == Am29LV080_FLASH ||
|
|
vol.type == Fuj29LV008_FLASH ||
|
|
vol.type == Am29LV008_FLASH)
|
|
vol.chipSize = 0x100000l;
|
|
else if (vol.type == Fuj29F040_FLASH ||
|
|
vol.type == Am29F040_FLASH)
|
|
vol.chipSize = 0x80000l;
|
|
else {
|
|
DEBUG_PRINT(("Debug: did not identify AMD or Fujitsu flash media.\n"));
|
|
return flUnknownMedia;
|
|
}
|
|
|
|
if ((vol.type == Am29F016C_FLASH) || (vol.type == Fuj29F016C_FLASH)) {
|
|
thisVars->unlockAddr1 = thisVars->unlockAddr2 = 0L;
|
|
thisVars->baseMask = 0xfffff800L * vol.interleaving;
|
|
}
|
|
else if ((vol.type == Am29F040_FLASH) || (vol.type == Fuj29F040_FLASH)){
|
|
flSetWindowSize(vol.socket,8 * vol.interleaving);
|
|
thisVars->unlockAddr1 = 0x5555u * vol.interleaving;
|
|
thisVars->unlockAddr2 = 0x2aaau * vol.interleaving;
|
|
thisVars->baseMask = 0xffff8000L * vol.interleaving;
|
|
}
|
|
else {
|
|
thisVars->unlockAddr1 = 0x555 * vol.interleaving;
|
|
thisVars->unlockAddr2 = 0x2aa * vol.interleaving;
|
|
thisVars->baseMask = 0xfffff800L * vol.interleaving;
|
|
}
|
|
|
|
checkStatus(flIntelSize(&vol,amdCommand,0));
|
|
|
|
vol.erasableBlockSize = 0x10000l * vol.interleaving;
|
|
vol.flags |= SUSPEND_FOR_WRITE;
|
|
|
|
/* Register our flash handlers */
|
|
vol.write = amdMTDWrite;
|
|
vol.erase = amdMTDErase;
|
|
vol.map = amdMTDMap;
|
|
vol.read = amdMTDRead;
|
|
|
|
DEBUG_PRINT(("Debug: Identified AMD or Fujitsu flash media.\n"));
|
|
return flOK;
|
|
}
|
|
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
/* f l R e g i s t e r A M D M T D */
|
|
/* */
|
|
/* Registers this MTD for use */
|
|
/* */
|
|
/* Parameters: */
|
|
/* None */
|
|
/* */
|
|
/* Returns: */
|
|
/* FLStatus : 0 on success, otherwise failure */
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
FLStatus flRegisterAMDMTD(VOID)
|
|
{
|
|
if (noOfMTDs >= MTDS)
|
|
return flTooManyComponents;
|
|
|
|
mtdTable[noOfMTDs++] = amdMTDIdentify;
|
|
|
|
return flOK;
|
|
}
|
|
|