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553 lines
12 KiB
553 lines
12 KiB
/*++
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Copyright (c) 1989 Microsoft Corporation
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Module Name:
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hypermap.c
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Abstract:
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This module contains the routines which map physical pages into
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reserved PTEs within hyper space.
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Author:
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Lou Perazzoli (loup) 5-Apr-1989
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Landy Wang (landyw) 02-June-1997
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Revision History:
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--*/
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#include "mi.h"
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PMMPTE MiFirstReservedZeroingPte;
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KEVENT MiImageMappingPteEvent;
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#pragma alloc_text(PAGE,MiMapImageHeaderInHyperSpace)
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#pragma alloc_text(PAGE,MiUnmapImageHeaderInHyperSpace)
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PVOID
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MiMapPageInHyperSpace (
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IN PEPROCESS Process,
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IN PFN_NUMBER PageFrameIndex,
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IN PKIRQL OldIrql
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)
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/*++
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Routine Description:
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This procedure maps the specified physical page into hyper space
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and returns the virtual address which maps the page.
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************************************
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* *
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* Returns with a spin lock held!!! *
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* *
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************************************
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Arguments:
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Process - Supplies the current process.
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PageFrameIndex - Supplies the physical page number to map.
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OldIrql - Supplies a pointer in which to return the entry IRQL.
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Return Value:
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Returns the address where the requested page was mapped.
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RETURNS WITH THE HYPERSPACE SPIN LOCK HELD!!!!
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The routine MiUnmapHyperSpaceMap MUST be called to release the lock!!!!
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Environment:
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Kernel mode.
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--*/
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{
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MMPTE TempPte;
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PMMPTE PointerPte;
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PFN_NUMBER offset;
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ASSERT (PageFrameIndex != 0);
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PointerPte = MmFirstReservedMappingPte;
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UNREFERENCED_PARAMETER (Process); // Workaround compiler W4 bug.
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LOCK_HYPERSPACE (Process, OldIrql);
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//
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// Get offset to first free PTE.
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//
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offset = MI_GET_PAGE_FRAME_FROM_PTE (PointerPte);
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if (offset == 0) {
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//
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// All the reserved PTEs have been used, make them all invalid.
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//
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MI_MAKING_MULTIPLE_PTES_INVALID (FALSE);
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#if DBG
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{
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PMMPTE LastPte;
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LastPte = PointerPte + NUMBER_OF_MAPPING_PTES;
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do {
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ASSERT (LastPte->u.Long == 0);
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LastPte -= 1;
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} while (LastPte > PointerPte);
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}
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#endif
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//
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// Use the page frame number field of the first PTE as an
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// offset into the available mapping PTEs.
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//
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offset = NUMBER_OF_MAPPING_PTES;
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//
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// Flush entire TB only on processors executing this process.
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//
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KeFlushEntireTb (TRUE, FALSE);
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}
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//
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// Change offset for next time through.
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//
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PointerPte->u.Hard.PageFrameNumber = offset - 1;
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//
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// Point to free entry and make it valid.
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//
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PointerPte += offset;
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ASSERT (PointerPte->u.Hard.Valid == 0);
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TempPte = ValidPtePte;
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TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
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*PointerPte = TempPte;
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//
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// Return the VA that maps the page.
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//
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return MiGetVirtualAddressMappedByPte (PointerPte);
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}
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PVOID
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MiMapPageInHyperSpaceAtDpc (
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IN PEPROCESS Process,
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IN PFN_NUMBER PageFrameIndex
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)
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/*++
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Routine Description:
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This procedure maps the specified physical page into hyper space
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and returns the virtual address which maps the page.
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************************************
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* *
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* Returns with a spin lock held!!! *
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* *
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************************************
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Arguments:
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Process - Supplies the current process.
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PageFrameIndex - Supplies the physical page number to map.
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Return Value:
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Returns the address where the requested page was mapped.
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RETURNS WITH THE HYPERSPACE SPIN LOCK HELD!!!!
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The routine MiUnmapHyperSpaceMap MUST be called to release the lock!!!!
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Environment:
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Kernel mode, DISPATCH_LEVEL on entry.
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--*/
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{
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MMPTE TempPte;
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PMMPTE PointerPte;
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PFN_NUMBER offset;
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UNREFERENCED_PARAMETER (Process); // Workaround compiler W4 bug.
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ASSERT (KeGetCurrentIrql() == DISPATCH_LEVEL);
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ASSERT (PageFrameIndex != 0);
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LOCK_HYPERSPACE_AT_DPC (Process);
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//
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// Get offset to first free PTE.
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//
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PointerPte = MmFirstReservedMappingPte;
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offset = MI_GET_PAGE_FRAME_FROM_PTE (PointerPte);
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if (offset == 0) {
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//
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// All the reserved PTEs have been used, make them all invalid.
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//
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MI_MAKING_MULTIPLE_PTES_INVALID (FALSE);
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#if DBG
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{
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PMMPTE LastPte;
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LastPte = PointerPte + NUMBER_OF_MAPPING_PTES;
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do {
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ASSERT (LastPte->u.Long == 0);
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LastPte -= 1;
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} while (LastPte > PointerPte);
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}
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#endif
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//
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// Use the page frame number field of the first PTE as an
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// offset into the available mapping PTEs.
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//
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offset = NUMBER_OF_MAPPING_PTES;
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//
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// Flush entire TB only on processors executing this process.
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//
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KeFlushEntireTb (TRUE, FALSE);
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}
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//
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// Change offset for next time through.
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//
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PointerPte->u.Hard.PageFrameNumber = offset - 1;
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//
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// Point to free entry and make it valid.
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//
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PointerPte += offset;
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ASSERT (PointerPte->u.Hard.Valid == 0);
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TempPte = ValidPtePte;
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TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
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*PointerPte = TempPte;
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//
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// Return the VA that maps the page.
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//
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return MiGetVirtualAddressMappedByPte (PointerPte);
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}
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PVOID
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MiMapImageHeaderInHyperSpace (
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IN PFN_NUMBER PageFrameIndex
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)
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/*++
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Routine Description:
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This procedure maps the specified physical page into the
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PTE within hyper space reserved explicitly for image page
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header mapping. By reserving an explicit PTE for mapping
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the PTE, page faults can occur while the PTE is mapped within
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hyperspace and no other hyperspace maps will affect this PTE.
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Note that if another thread attempts to map an image at the
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same time, it will be forced into a wait state until the
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header is "unmapped".
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Arguments:
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PageFrameIndex - Supplies the physical page number to map.
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Return Value:
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Returns the virtual address where the specified physical page was
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mapped.
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Environment:
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Kernel mode.
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--*/
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{
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MMPTE TempPte;
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MMPTE OriginalPte;
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PMMPTE PointerPte;
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PVOID FlushVaPointer;
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ASSERT (PageFrameIndex != 0);
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TempPte = ValidPtePte;
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TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
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FlushVaPointer = (PVOID) IMAGE_MAPPING_PTE;
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//
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// Ensure both modified and accessed bits are set so the hardware doesn't
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// ever write this PTE.
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//
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ASSERT (TempPte.u.Hard.Dirty == 1);
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ASSERT (TempPte.u.Hard.Accessed == 1);
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PointerPte = MiGetPteAddress (IMAGE_MAPPING_PTE);
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do {
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OriginalPte.u.Long = 0;
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OriginalPte.u.Long = InterlockedCompareExchangePte (
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PointerPte,
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TempPte.u.Long,
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OriginalPte.u.Long);
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if (OriginalPte.u.Long == 0) {
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break;
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}
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//
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// Another thread modified the PTE just before us or the PTE was
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// already in use. This should be very rare - go the long way.
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//
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InterlockedIncrement ((PLONG)&MmWorkingSetList->NumberOfImageWaiters);
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//
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// Deliberately wait with a timeout since the PTE release runs
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// without lock synchronization so there is the extremely rare
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// race window which the timeout saves us from.
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//
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KeWaitForSingleObject (&MiImageMappingPteEvent,
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Executive,
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KernelMode,
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FALSE,
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(PLARGE_INTEGER)&MmOneSecond);
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InterlockedDecrement ((PLONG)&MmWorkingSetList->NumberOfImageWaiters);
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} while (TRUE);
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//
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// Use KeFlushMultiple even though only one PTE is being flushed
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// because this interface provides a way to just flush the
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// specified TB entry without writing a PTE and we always want
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// to do interlocked writes to this PTE.
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//
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// Note the flush must be made across all processors as this thread
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// may migrate. Also this must be done here instead of in the unmap
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// in order to support lock-free operation.
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//
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KeFlushMultipleTb (1,
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&FlushVaPointer,
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TRUE,
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TRUE,
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NULL,
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TempPte.u.Flush);
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return (PVOID) MiGetVirtualAddressMappedByPte (PointerPte);
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}
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VOID
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MiUnmapImageHeaderInHyperSpace (
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VOID
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)
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/*++
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Routine Description:
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This procedure unmaps the PTE reserved for mapping the image
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header, flushes the TB, and, if the WaitingForImageMapping field
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is not NULL, sets the specified event.
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Arguments:
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None.
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Return Value:
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None.
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Environment:
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Kernel mode.
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--*/
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{
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PMMPTE PointerPte;
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PointerPte = MiGetPteAddress (IMAGE_MAPPING_PTE);
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//
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// Capture the number of waiters.
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//
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ASSERT (PointerPte->u.Long != 0);
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#if defined (_WIN64)
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InterlockedExchange64 ((PLONG64)PointerPte, ZeroPte.u.Long);
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#elif defined(_X86PAE_)
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KeInterlockedSwapPte ((PHARDWARE_PTE)PointerPte,
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(PHARDWARE_PTE)&ZeroPte.u.Long);
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#else
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InterlockedExchange ((PLONG)PointerPte, ZeroPte.u.Long);
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#endif
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if (MmWorkingSetList->NumberOfImageWaiters != 0) {
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//
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// If there are any threads waiting, wake them all now. Note this
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// will wake threads in other processes as well, but it is very
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// rare that there are any waiters in the entire system period.
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//
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KePulseEvent (&MiImageMappingPteEvent, 0, FALSE);
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}
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return;
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}
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PVOID
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MiMapPageToZeroInHyperSpace (
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IN PFN_NUMBER PageFrameIndex
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)
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/*++
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Routine Description:
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This procedure maps the specified physical page into hyper space
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and returns the virtual address which maps the page.
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This is only to be used by THE zeroing page thread.
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Arguments:
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PageFrameIndex - Supplies the physical page number to map.
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Return Value:
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Returns the virtual address where the specified physical page was
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mapped.
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Environment:
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PASSIVE_LEVEL.
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--*/
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{
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PFN_NUMBER offset;
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MMPTE TempPte;
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PMMPTE PointerPte;
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ASSERT (PageFrameIndex != 0);
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ASSERT (KeGetCurrentIrql() == PASSIVE_LEVEL);
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PointerPte = MiFirstReservedZeroingPte;
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//
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// Get offset to first free PTE.
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//
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offset = MI_GET_PAGE_FRAME_FROM_PTE (PointerPte);
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if (offset == 0) {
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//
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// All the reserved PTEs have been used, make them all invalid.
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//
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MI_MAKING_MULTIPLE_PTES_INVALID (FALSE);
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#if DBG
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{
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PMMPTE LastPte;
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LastPte = PointerPte + NUMBER_OF_ZEROING_PTES;
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do {
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ASSERT (LastPte->u.Long == 0);
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LastPte -= 1;
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} while (LastPte > PointerPte);
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}
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#endif
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//
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// Use the page frame number field of the first PTE as an
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// offset into the available zeroing PTEs.
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//
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offset = NUMBER_OF_ZEROING_PTES;
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PointerPte->u.Hard.PageFrameNumber = offset;
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//
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// Flush entire TB only on processors executing this process as this
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// thread may migrate there at any time.
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//
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KeFlushEntireTb (TRUE, FALSE);
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}
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//
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// Change offset for next time through.
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//
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PointerPte->u.Hard.PageFrameNumber = offset - 1;
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//
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// Point to free entry and make it valid.
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//
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PointerPte += offset;
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ASSERT (PointerPte->u.Hard.Valid == 0);
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TempPte = ValidPtePte;
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TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
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*PointerPte = TempPte;
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//
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// Return the VA that maps the page.
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//
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return MiGetVirtualAddressMappedByPte (PointerPte);
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}
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