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32 lines
576 B
32 lines
576 B
#ifndef MONITOR
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#ifdef A3CPU
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#include <nt.h>
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#include <ntrtl.h>
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#include <nturtl.h>
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#include <windows.h>
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#include "insignia.h"
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#include "host_def.h"
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#include "xt.h"
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#include "ica.h"
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void npx_interrupt_line_waggled()
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{
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ica_hw_interrupt(1, 5, 1);
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}
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// MIPS interface from CPU cacheflush request
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void cacheflush(long base_addr, long length)
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{
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// should check return, but what is correct action (Exit??) if failure?
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NtFlushInstructionCache(GetCurrentProcess(), (PVOID) base_addr, length);
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}
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void host_sigio_event()
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{
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}
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#endif /* A3CPU */
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#endif /* ! MONITOR */
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