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506 lines
9.2 KiB
506 lines
9.2 KiB
/*++
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Copyright (c) 2000 Microsoft Corporation
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Module Name:
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mpprofil.c
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Abstract:
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This module implements the code necessary to initialize, field and
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process the profile interrupt.
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Author:
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Shie-Lin Tzong (shielint) 12-Jan-1990
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Environment:
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Kernel mode only.
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Revision History:
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bryanwi 20-Sep-90
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Forrest Foltz (forrestf) 28-Oct-2000
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Ported from ixprofil.asm to ixprofil.c
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--*/
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#include "halcmn.h"
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#define APIC_TIMER_ENABLED (PERIODIC_TIMER | APIC_PROFILE_VECTOR)
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#define APIC_TIMER_DISABLED (INTERRUPT_MASKED | \
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PERIODIC_TIMER | \
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APIC_PROFILE_VECTOR)
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#define TIMER_ROUND(x) ((((x) + 10000 / 2) / 10000) * 10000)
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ULONG HalpProfileRunning;
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VOID (*HalpPerfInterruptHandler)(PKTRAP_FRAME);
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VOID
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HalStartProfileInterrupt(
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IN ULONG Reserved
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)
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/*++
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Routine Description:
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What we do here is set the interrupt rate to the value that's been set
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by the KeSetProfileInterval routine. Then enable the APIC Timer interrupt.
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This function gets called on every processor so the hal can enable
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a profile interrupt on each processor.
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Arguments:
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Reserved - Not used, must be zero.
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Return Value:
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None.
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--*/
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{
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ULONG initialCount;
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ASSERT(Reserved == 0);
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initialCount = HalpGetCurrentHalPcr()->ProfileCountDown;
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LOCAL_APIC(LU_INITIAL_COUNT) = initialCount;
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HalpProfileRunning = TRUE;
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//
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// Set the Local APIC Timer to interrupt periodically at
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// APIC_PROFILE_VECTOR
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//
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LOCAL_APIC(LU_TIMER_VECTOR) = APIC_TIMER_ENABLED;
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}
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VOID
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HalStopProfileInterrupt (
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IN ULONG Reserved
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)
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/*++
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Routine Description:
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Stop the profile interrupt that was started with
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HalpStartProfileInterrupt;
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This function gets called on every processor so the hal can disable
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a profile interrupt on each processor.
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Arguments:
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Reserved - Not used, must be zero.
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Return Value:
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None.
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--*/
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{
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ASSERT(Reserved == 0);
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HalpProfileRunning = FALSE;
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LOCAL_APIC(LU_TIMER_VECTOR) = APIC_TIMER_DISABLED;
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}
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ULONG_PTR
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HalSetProfileInterval (
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ULONG_PTR Interval
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)
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/*++
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Routine Description:
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This procedure sets the interrupt rate (and thus the sampling
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interval) for the profiling interrupt.
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Arguments:
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Interval - Supplies the desired profile interrupt interval in 100ns
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units (MINIMUM is 1221 or 122.1 uS) see ke\profobj.c
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Return Value:
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Interval actually used
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--*/
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{
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ULONG64 period;
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ULONG apicFreqency;
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PHAL_PCR halPcr;
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ULONG countDown;
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halPcr = HalpGetCurrentHalPcr();
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//
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// Limit the interrupt period to 1 second
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//
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if (Interval > TIME_UNITS_PER_SECOND) {
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period = TIME_UNITS_PER_SECOND;
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} else {
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period = Interval;
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}
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//
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// Compute the countdown value corresponding to the desired period.
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// The calculation is done with 64-bit intermediate values.
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//
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countDown =
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(ULONG)(period * halPcr->ApicClockFreqHz) / TIME_UNITS_PER_SECOND;
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halPcr->ProfileCountDown = countDown;
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LOCAL_APIC(LU_INITIAL_COUNT) = countDown;
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return period;
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}
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VOID
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#if defined(MMTIMER)
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HalpAcpiTimerCalibratePerfCount (
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#else
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HalCalibratePerformanceCounter (
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#endif
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IN LONG volatile *Number,
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IN ULONGLONG NewCount
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)
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/*++
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Routine Description:
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This routine calibrates the performance counter value for a
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multiprocessor system. The calibration can be done by zeroing
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the current performance counter, or by calculating a per-processor
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skewing between each processors counter.
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Arguments:
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Number - Supplies a pointer to count of the number of processors in
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the configuration.
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NewCount - Supplies the value to synchronize the counter too
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Return Value:
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None.
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--*/
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{
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ULONG flags;
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PHAL_PCR halPcr;
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flags = HalpDisableInterrupts();
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//
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// Store the count in the PCR
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//
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halPcr = HalpGetCurrentHalPcr();
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halPcr->PerfCounter = NewCount;
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//
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// Wait here until all processors arrive
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//
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InterlockedDecrement(Number);
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while (*Number > 0) {
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;
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}
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PROCESSOR_FENCE;
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//
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// Zero the time stamp counter, restore interrupts and return.
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//
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WriteMSR(MSR_TSC,0);
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HalpRestoreInterrupts(flags);
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}
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VOID
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HalpWaitForCmosRisingEdge (
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VOID
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)
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/*++
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Routine Description:
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Waits until the rising edge of the CMOS_STATUS_BUSY bit is detected.
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Note - The CMOS spin lock must be acquired before calling this routine.
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Arguments:
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None.
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Return Value:
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None.
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--*/
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{
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UCHAR value;
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//
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// The simulator takes about a day to go through this, so for right
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//
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#if !defined(_AMD64_SIMULATOR_)
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//
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// We're going to be polling the CMOS_STATUS_A register. Program
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// that register address here, outside of the loop.
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//
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WRITE_PORT_UCHAR(CMOS_ADDRESS_PORT,CMOS_STATUS_A);
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//
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// Wait for the status bit to be clear
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//
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do {
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value = READ_PORT_UCHAR(CMOS_DATA_PORT);
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} while ((value & CMOS_STATUS_BUSY) != 0);
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//
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// Now wait for the rising edge of the status bit
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//
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do {
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value = READ_PORT_UCHAR(CMOS_DATA_PORT);
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} while ((value & CMOS_STATUS_BUSY) == 0);
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#endif
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}
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ULONG
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HalpScaleTimers (
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VOID
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)
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/*++
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Routine Description:
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Determines the frequency of the APIC timer. This routine is run
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during initialization
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Arguments:
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None.
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Return Value:
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None.
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--*/
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{
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ULONG flags;
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ULONG passCount;
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ULONG64 cpuFreq;
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ULONG apicFreq;
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UCHAR value;
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PHAL_PCR halPcr;
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HalpAcquireCmosSpinLock();
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flags = HalpDisableInterrupts();
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LOCAL_APIC(LU_TIMER_VECTOR) = APIC_TIMER_DISABLED;
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LOCAL_APIC(LU_DIVIDER_CONFIG) = LU_DIVIDE_BY_1;
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passCount = 2;
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while (passCount > 0) {
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//
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// Make sure the write has occured
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//
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LOCAL_APIC(LU_TIMER_VECTOR);
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//
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// Wait for the rising edge of the UIP bit, this is the start of the
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// cycle.
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//
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HalpWaitForCmosRisingEdge();
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//
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// At this point the UIP bit has just changed to the set state.
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// Clear the time stamp counter and start the APIC counting down
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// from it's maximum value.
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//
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PROCESSOR_FENCE;
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LOCAL_APIC(LU_INITIAL_COUNT) = 0xFFFFFFFF;
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cpuFreq = ReadTimeStampCounter();
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//
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// Wait for the next rising edge, this marks the end of the CMOS
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// clock update cycle.
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//
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HalpWaitForCmosRisingEdge();
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PROCESSOR_FENCE;
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apicFreq = 0xFFFFFFFF - LOCAL_APIC(LU_CURRENT_COUNT);
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cpuFreq = ReadTimeStampCounter() - cpuFreq;
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passCount -= 1;
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}
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halPcr = HalpGetCurrentHalPcr();
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//
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// cpuFreq is elapsed timestamp in one second. Round to nearest
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// 10Khz and store.
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//
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halPcr->TSCHz = TIMER_ROUND(cpuFreq);
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//
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// Calculate the apic frequency, rounding to the nearest 10Khz
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//
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apicFreq = TIMER_ROUND(apicFreq);
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halPcr->ApicClockFreqHz = apicFreq;
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//
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// Store microsecond representation of TSC frequency.
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//
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halPcr->StallScaleFactor = (ULONG)(halPcr->TSCHz / 1000000);
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if ((halPcr->TSCHz % 1000000) != 0) {
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halPcr->StallScaleFactor += 1;
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}
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HalpReleaseCmosSpinLock();
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halPcr->ProfileCountDown = apicFreq;
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//
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// Set the interrupt rate in the chip and return the apic frequency
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//
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LOCAL_APIC(LU_INITIAL_COUNT) = apicFreq;
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HalpRestoreInterrupts(flags);
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return halPcr->ApicClockFreqHz;
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}
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BOOLEAN
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HalpProfileInterrupt (
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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)
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/*++
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Routine Description:
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This routine is entered as the result of a profile interrupt. Its
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function is to dismiss the interrupt, raise system Irql to
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HAL_PROFILE_LEVEL and transfer control to the standard system routine
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to process any active profiles.
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Arguments:
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Interrupt - Supplies a pointer to the kernel interrupt object
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ServiceContext - Supplies the service context
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Return Value:
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TRUE
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--*/
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{
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UNREFERENCED_PARAMETER(ServiceContext);
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if (HalpProfileRunning != FALSE) {
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//
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// BUGBUG what do we use for source?
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//
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KeProfileInterruptWithSource(Interrupt->TrapFrame,0);
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}
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return TRUE;
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}
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BOOLEAN
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HalpPerfInterrupt (
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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)
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/*++
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Routine Description:
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This routine is entered as the result of a perf interrupt. Its
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function is to dismiss the interrupt, raise system Irql to
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HAL_PROFILE_LEVEL and transfer control to the standard system routine
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to process any active profiles.
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Arguments:
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Interrupt - Supplies a pointer to the kernel interrupt object
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ServiceContext - Supplies the service context
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Return Value:
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TRUE
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--*/
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{
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UNREFERENCED_PARAMETER(Interrupt);
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if (HalpPerfInterruptHandler != NULL) {
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HalpPerfInterruptHandler(Interrupt->TrapFrame);
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} else {
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ASSERT(FALSE);
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}
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//
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// Starting with the Willamette processor, the perf interrupt gets masked
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// on interrupting. Need to clear the mask before leaving the interrupt
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// handler.
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//
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LOCAL_APIC(LU_PERF_VECTOR), ~INTERRUPT_MASKED;
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return TRUE;
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}
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