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677 lines
17 KiB
677 lines
17 KiB
/*++
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Copyright (c) 1991 Microsoft Corporation
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Copyright (c) 1992 Intel Corporation
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All rights reserved
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INTEL CORPORATION PROPRIETARY INFORMATION
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This software is supplied to Microsoft under the terms
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of a license agreement with Intel Corporation and may not be
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copied nor disclosed except in accordance with the terms
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of that agreement.
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Module Name:
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mpdebug.c
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Abstract:
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This module has some useful modules for debug aid.
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Author:
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Ron Mosgrove (Intel) - Aug 1993.
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Environment:
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Kernel mode or from textmode setup.
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Revision History:
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--*/
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#ifndef _NTOS_
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#include "halp.h"
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#endif
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#include "apic.inc"
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#include "pcmp_nt.inc"
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#include "stdio.h"
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#define PCMP_TABLE_PTR_BASE 0x09f000
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#define PCMP_TABLE_PTR_OFFSET 0x00000c00
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// Create dummy PC+MP table at physical address 400K
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#define PCMP_TEST_TABLE 0x64000
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#define TEST_FLOAT_PTR 0x7d000
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extern struct PcMpTable *PcMpTablePtr, *PcMpDefaultTablePtrs[];
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//extern struct HalpMpInfo *HalpMpInfoPtr;
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CHAR Cbuf[120];
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UCHAR
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ComputeCheckSum(
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IN PUCHAR SourcePtr,
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IN USHORT NumOfBytes
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);
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#ifdef OLD_DEBUG
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extern struct PcMpConfigTable *PcMpTablePtr;
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#endif
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#ifdef DEBUGGING
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ULONG HalpUseDbgPrint = 0;
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void
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HalpDisplayString(
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IN PVOID String
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)
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{
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if (!HalpUseDbgPrint) {
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HalDisplayString(String);
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} else {
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DbgPrint(String);
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}
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}
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void
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HalpDisplayItemBuf(
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IN UCHAR Length,
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IN PUCHAR Buffer,
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IN PVOID Name
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)
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{
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ULONG i;
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CHAR TmpBuf[80];
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sprintf(TmpBuf, " %s -", Name);
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HalpDisplayString(TmpBuf);
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for (i=0; i< Length; i++) {
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sprintf(TmpBuf, " 0x%x", Buffer[i]);
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HalpDisplayString(TmpBuf);
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}
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HalpDisplayString("\n");
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}
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void
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HalpDisplayULItemBuf(
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IN UCHAR Length,
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IN PULONG Buffer,
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IN PVOID Name
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)
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{
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ULONG i;
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CHAR TmpBuf[80];
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sprintf(TmpBuf, " %s -", Name);
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HalpDisplayString(TmpBuf);
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for (i=0; i< Length; i++) {
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sprintf(TmpBuf, " 0x%lx", Buffer[i]);
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HalpDisplayString(TmpBuf);
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}
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HalpDisplayString("\n");
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}
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void
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HalpDisplayItem(
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IN ULONG Item,
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IN PVOID ItemStr
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)
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{
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CHAR TmpBuf[80];
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sprintf(TmpBuf, " %s - 0x%x\n", ItemStr, Item);
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HalpDisplayString(TmpBuf);
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}
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VOID
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HalpDisplayBIOSSysCfg(
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IN struct SystemConfigTable *SysCfgPtr
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)
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{
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HalpDisplayString("BIOS System Configuration Table\n");
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HalpDisplayItem(SysCfgPtr->ModelType, "ModelType");
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HalpDisplayItem(SysCfgPtr->SubModelType, "SubModelType");
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HalpDisplayItem(SysCfgPtr->BIOSRevision, "BIOSRevision");
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HalpDisplayItemBuf(3,SysCfgPtr->FeatureInfoByte,"FeatureInfoByte");
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HalpDisplayItem(SysCfgPtr->MpFeatureInfoByte1, "MpFeatureInfoByte1");
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HalpDisplayItem(SysCfgPtr->MpFeatureInfoByte2, "MpFeatureInfoByte2");
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}
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VOID
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HalpDisplayLocalUnit(
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)
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{
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ULONG Data;
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PKPCR pPCR;
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pPCR = KeGetPcr();
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sprintf(Cbuf, "\nLocal Apic for P%d\n", pPCR->Prcb->Number);
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HalpDisplayString(Cbuf);
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#define DisplayLuReg(Reg, RegStr) Data = *((PVULONG) (LOCALAPIC+Reg)); \
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HalpDisplayItem(Data , RegStr);
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DisplayLuReg( LU_ID_REGISTER , "LU_ID_REGISTER" );
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DisplayLuReg( LU_VERS_REGISTER, "LU_VERS_REGISTER" );
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DisplayLuReg( LU_TPR, "LU_TPR");
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DisplayLuReg( LU_APR, "LU_APR");
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DisplayLuReg( LU_PPR, "LU_PPR");
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DisplayLuReg( LU_EOI, "LU_EOI");
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DisplayLuReg( LU_REMOTE_REGISTER, "LU_REMOTE_REGISTER");
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DisplayLuReg( LU_LOGICAL_DEST, "LU_LOGICAL_DEST");
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DisplayLuReg( LU_DEST_FORMAT, "LU_DEST_FORMAT");
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DisplayLuReg( LU_SPURIOUS_VECTOR , "LU_SPURIOUS_VECTOR" );
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DisplayLuReg( LU_ISR_0, "LU_ISR_0");
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DisplayLuReg( LU_TMR_0, "LU_TMR_0");
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DisplayLuReg( LU_IRR_0, "LU_IRR_0");
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DisplayLuReg( LU_ERROR_STATUS, "LU_ERROR_STATUS");
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DisplayLuReg( LU_INT_CMD_LOW, "LU_INT_CMD_LOW");
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DisplayLuReg( LU_INT_CMD_HIGH, "LU_INT_CMD_HIGH");
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DisplayLuReg( LU_TIMER_VECTOR, "LU_TIMER_VECTOR");
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DisplayLuReg( LU_INT_VECTOR_0, "LU_INT_VECTOR_0");
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DisplayLuReg( LU_INT_VECTOR_1, "LU_INT_VECTOR_1");
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DisplayLuReg( LU_INITIAL_COUNT, "LU_INITIAL_COUNT");
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DisplayLuReg( LU_CURRENT_COUNT, "LU_CURRENT_COUNT");
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DisplayLuReg( LU_DIVIDER_CONFIG, "LU_DIVIDER_CONFIG");
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HalpDisplayString("\n");
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}
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VOID
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HalpDisplayIoUnit(
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)
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/*++
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Routine Description:
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Verify that an IO Unit exists at the specified address
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Arguments:
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BaseAddress - Address of the IO Unit to test.
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Return Value:
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BOOLEAN - TRUE if a IO Unit was found at the passed address
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- FALSE otherwise
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--*/
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{
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#if 0
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struct ApicIoUnit *IoUnitPtr;
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ULONG Data,i,j;
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PKPCR pPCR;
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pPCR = KeGetPcr();
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//
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// The documented detection mechanism is to write all zeros to
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// the Version register. Then read it back. The IO Unit exists if the
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// same result is read both times and the Version is valid.
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//
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for (j=0; j<HalpMpInfoPtr->IOApicCount; j++) {
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IoUnitPtr = (struct ApicIoUnit *) HalpMpInfoPtr->IoApicBase[j];
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sprintf(Cbuf,"\nIoApic %d at Vaddr 0x%x\n",j,(ULONG) IoUnitPtr);
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HalpDisplayString(Cbuf);
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IoUnitPtr->RegisterSelect = IO_ID_REGISTER;
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HalpDisplayItem(IoUnitPtr->RegisterWindow, "IO_ID_REGISTER");
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IoUnitPtr->RegisterSelect = IO_VERS_REGISTER;
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HalpDisplayItem(IoUnitPtr->RegisterWindow, "IO_VERS_REGISTER");
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for (i=0; i<16; i++) {
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IoUnitPtr->RegisterSelect = IO_REDIR_00_LOW+(i*2);
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Data = IoUnitPtr->RegisterWindow;
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sprintf(Cbuf, " Redir [0x%x] - 0x%x, ", i, Data);
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HalpDisplayString(Cbuf);
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IoUnitPtr->RegisterSelect = IO_REDIR_00_LOW+(i*2)+1;
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Data = IoUnitPtr->RegisterWindow;
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sprintf(Cbuf, "0x%x\n", Data);
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HalpDisplayString(Cbuf);
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} // for each Redirection entry
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} // for all Io Apics
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#endif
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}
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void
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HalpDisplayConfigTable ()
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/*+++
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Debug routine to display the PC+MP config table
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--*/
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{
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struct PcMpTable *MpPtr = PcMpTablePtr;
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PPCMPPROCESSOR ProcPtr;
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ULONG EntriesInTable = MpPtr->NumOfEntries;
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union PL {
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USHORT us;
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POLARITYANDLEVEL PnL;
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};
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HalpDisplayString("PcMp Configuration Table\n");
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HalpDisplayItem(MpPtr->Signature, "Signature");
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HalpDisplayItem(MpPtr->TableLength, "TableLength");
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HalpDisplayItem(MpPtr->Revision, "Revision");
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HalpDisplayItem(MpPtr->Checksum, "Checksum");
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HalpDisplayItemBuf(sizeof(MpPtr->OemId),
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MpPtr->OemId,"OemId");
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HalpDisplayItemBuf(sizeof(MpPtr->OemProductId),
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MpPtr->OemProductId,"OemProductId");
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HalpDisplayItem((ULONG) MpPtr->OemTablePtr, "OemTablePtr");
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HalpDisplayItem(MpPtr->OemTableSize, "OemTableSize");
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HalpDisplayItem(MpPtr->NumOfEntries, "NumOfEntries");
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HalpDisplayItem((ULONG) MpPtr->LocalApicAddress, "LocalApicAddress");
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HalpDisplayItem(MpPtr->Reserved, "Reserved");
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ProcPtr = (PPCMPPROCESSOR) ((PUCHAR) MpPtr + HEADER_SIZE);
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while (EntriesInTable) {
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EntriesInTable--;
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switch ( ProcPtr->EntryType ) {
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case ENTRY_PROCESSOR: {
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union xxx {
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ULONG ul;
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CPUIDENTIFIER CpuId;
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} u;
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sprintf (Cbuf, "Proc..: ApicId %x, Apic ver %x, Flags %x\n",
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ProcPtr->LocalApicId,
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ProcPtr->LocalApicVersion,
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ProcPtr->CpuFlags
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);
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HalpDisplayString (Cbuf);
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ProcPtr++;
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break;
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}
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case ENTRY_BUS: {
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PPCMPBUS BusPtr = (PPCMPBUS) ProcPtr;
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sprintf (Cbuf, "Bus...: id %02x, type '%.6s'\n",
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BusPtr->BusId, BusPtr->BusType);
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HalpDisplayString (Cbuf);
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BusPtr++;
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ProcPtr = (PPCMPPROCESSOR) BusPtr;
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break;
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}
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case ENTRY_IOAPIC: {
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PPCMPIOAPIC IoApPtr = (PPCMPIOAPIC) ProcPtr;
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sprintf (Cbuf, "IoApic: id %02x, ver %x, Flags %x, Address %x\n",
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IoApPtr->IoApicId,
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IoApPtr->IoApicVersion,
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IoApPtr->IoApicFlag,
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(ULONG) IoApPtr->IoApicAddress
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);
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HalpDisplayString (Cbuf);
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IoApPtr++;
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ProcPtr = (PPCMPPROCESSOR) IoApPtr;
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break;
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}
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case ENTRY_INTI: {
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PPCMPINTI IntiPtr = (PPCMPINTI) ProcPtr;
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union PL u;
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u.PnL = IntiPtr->Signal;
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sprintf (Cbuf, "Inti..: t%x, s%x, SInt %x-%x, Inti %x-%x\n",
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IntiPtr->IntType,
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u.us,
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IntiPtr->SourceBusId,
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IntiPtr->SourceBusIrq,
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IntiPtr->IoApicId,
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IntiPtr->IoApicInti
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);
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HalpDisplayString (Cbuf);
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IntiPtr++;
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ProcPtr = (PPCMPPROCESSOR) IntiPtr;
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break;
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}
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case ENTRY_LINTI: {
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PPCMPLINTI LIntiPtr = (PPCMPLINTI) ProcPtr;
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union PL u;
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u.PnL = LIntiPtr->Signal;
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sprintf (Cbuf, "Linti.: t%x, s%x, SInt %x-%x, Linti %x-%x\n",
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LIntiPtr->IntType,
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u.us,
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LIntiPtr->SourceBusId,
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LIntiPtr->SourceBusIrq,
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LIntiPtr->DestLocalApicId,
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LIntiPtr->DestLocalApicInti
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);
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HalpDisplayString (Cbuf);
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LIntiPtr++;
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ProcPtr = (PPCMPPROCESSOR) LIntiPtr;
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break;
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}
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default: {
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HalpDisplayItem(ProcPtr->EntryType, "Unknown Type");
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return;
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}
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}
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}
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}
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void
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HalpDisplayExtConfigTable ()
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{
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PMPS_EXTENTRY ExtTable;
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extern struct HalpMpInfo HalpMpInfoTable;
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ExtTable = HalpMpInfoTable.ExtensionTable;
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while (ExtTable < HalpMpInfoTable.EndOfExtensionTable) {
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switch (ExtTable->Type) {
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case EXTTYPE_BUS_ADDRESS_MAP:
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sprintf (Cbuf, "BusMap: id %02x, t%x Base %08x Len %08x\n",
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ExtTable->u.AddressMap.BusId,
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ExtTable->u.AddressMap.Type,
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(ULONG) ExtTable->u.AddressMap.Base,
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(ULONG) ExtTable->u.AddressMap.Length
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);
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HalpDisplayString (Cbuf);
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break;
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case EXTTYPE_BUS_HIERARCHY:
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sprintf (Cbuf, "BusHie: id %02x, Parent:%x sd:%x\n",
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ExtTable->u.BusHierarchy.BusId,
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ExtTable->u.BusHierarchy.ParentBusId,
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ExtTable->u.BusHierarchy.SubtractiveDecode
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);
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HalpDisplayString (Cbuf);
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break;
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case EXTTYPE_BUS_COMPATIBLE_MAP:
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sprintf (Cbuf, "ComBus: id %02x %c List %x\n",
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ExtTable->u.CompatibleMap.BusId,
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ExtTable->u.CompatibleMap.Modifier ? '-' : '+',
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ExtTable->u.CompatibleMap.List
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);
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HalpDisplayString (Cbuf);
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break;
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case EXTTYPE_PERSISTENT_STORE:
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sprintf (Cbuf, "PreSTR: Address %08x Len %08x\n",
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(ULONG) ExtTable->u.PersistentStore.Address,
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(ULONG) ExtTable->u.PersistentStore.Length
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);
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HalpDisplayString (Cbuf);
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break;
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default:
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HalpDisplayItem(ExtTable->Type, "Unknown Type");
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break;
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}
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ExtTable = (PMPS_EXTENTRY) (((PUCHAR) ExtTable) + ExtTable->Length);
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}
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}
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void
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HalpDisplayMpInfo()
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{
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#if 0
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struct HalpMpInfo *MpPtr = HalpMpInfoPtr;
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HalpDisplayString("\nHAL: Private Mp Info\n");
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HalpDisplayItem(MpPtr->ApicVersion, "ApicVersion");
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HalpDisplayItem(MpPtr->ProcessorCount, "ProcessorCount");
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HalpDisplayItem(MpPtr->BusCount, "BusCount");
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HalpDisplayItem(MpPtr->IOApicCount, "IOApicCount");
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HalpDisplayItem(MpPtr->IntiCount, "IntiCount");
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HalpDisplayItem(MpPtr->LintiCount, "LintiCount");
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HalpDisplayItem(MpPtr->IMCRPresent, "IMCRPresent");
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HalpDisplayULItemBuf(4,(PULONG) MpPtr->IoApicBase,"IoApicBase");
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HalpDisplayString("\n");
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HalpDisplayConfigTable();
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#endif
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}
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#ifdef OLD_DEBUG
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BOOLEAN
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HalpVerifyLocalUnit(
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IN UCHAR ApicID
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)
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/*++
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Routine Description:
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Verify that a Local Apic has the specified Apic Id.
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Arguments:
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ApicId - Id to verify.
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Return Value:
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BOOLEAN - TRUE if found
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- FALSE otherwise
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--*/
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{
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union ApicUnion Temp;
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//
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// The remote read command must be:
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//
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// Vector - Bits 4-9 of the Version register
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// Destination Mode - Physical
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// Trigger Mode - Edge
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// Delivery Mode - Remote Read
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// Destination Shorthand - Destination Field
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//
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#define LU_READ_REMOTE_VERSION ( (LU_VERS_REGISTER >> 4) | \
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DELIVER_REMOTE_READ | \
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ICR_USE_DEST_FIELD)
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#define DEFAULT_DELAY 100
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PVULONG LuDestAddress = (PVULONG) (LOCALAPIC + LU_INT_CMD_HIGH);
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PVULONG LuICR = (PVULONG) (LOCALAPIC + LU_INT_CMD_LOW);
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PVULONG LuRemoteReg = (PVULONG) (LOCALAPIC + LU_REMOTE_REGISTER);
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ULONG RemoteReadStatus;
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ULONG DelayCount = DEFAULT_DELAY;
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//
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// First make sure we can get to the Apic Bus
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//
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while ( ( DelayCount-- ) && ( *LuICR & DELIVERY_PENDING ) );
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if (DelayCount == 0) {
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//
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// We're toast, can't gain access to the APIC Bus
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//
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return (FALSE);
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}
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//
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// Set the Address of the APIC we're looking for
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//
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*LuDestAddress = (ApicID << DESTINATION_SHIFT);
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//
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// Issue the request
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//
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*LuICR = LU_READ_REMOTE_VERSION;
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//
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// Reset the Delay so we can get out of here just in case...
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//
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DelayCount = DEFAULT_DELAY;
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while (DelayCount--) {
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RemoteReadStatus = *LuICR & ICR_RR_STATUS_MASK;
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if ( RemoteReadStatus == ICR_RR_INVALID) {
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//
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|
// No One responded, device timed out
|
|
//
|
|
return (FALSE);
|
|
}
|
|
|
|
if ( RemoteReadStatus == ICR_RR_VALID) {
|
|
//
|
|
// Someone is there and the Remote Register is valid
|
|
//
|
|
Temp.Raw = *LuRemoteReg;
|
|
|
|
//
|
|
// Do what we can to verify the Version
|
|
//
|
|
|
|
if (Temp.Ver.Version > 0x1f) {
|
|
//
|
|
// Only known devices are 0.x and 1.x
|
|
//
|
|
return (FALSE);
|
|
}
|
|
|
|
return (TRUE);
|
|
|
|
} // RemoteRead Successfull
|
|
|
|
} // While DelayCount
|
|
|
|
//
|
|
// No One responded, and the device did not time out
|
|
// This should never happen
|
|
//
|
|
|
|
return (FALSE);
|
|
}
|
|
|
|
#endif // OLD_DEBUG
|
|
|
|
VOID
|
|
CreateBIOSTables(
|
|
VOID)
|
|
/*++
|
|
|
|
Routine Description:
|
|
This routine is used to test the PC+MP detect code in the HAL.
|
|
It creates the PC+MP structures that are really created by the
|
|
BIOS. Since we presently do not have a BIOS that builds a PC+MP
|
|
table, we need this for now.
|
|
|
|
Arguments:
|
|
None.
|
|
|
|
Return Value:
|
|
None.
|
|
|
|
--*/
|
|
|
|
{
|
|
PUCHAR TempPtr, BytePtr;
|
|
UCHAR CheckSum;
|
|
PULONG TraversePtr;
|
|
USHORT BytesToCopy;
|
|
|
|
HalpDisplayString("CreateBIOSTables : Entered\n");
|
|
// First, copy default PC+MP configuration 2 table at physical
|
|
// address PCMP_TEST_TABLE
|
|
TempPtr = (PUCHAR) HalpMapPhysicalMemory(
|
|
(PVOID) PCMP_TEST_TABLE, 1);
|
|
|
|
BytesToCopy = (PcMpDefaultTablePtrs[1])->TableLength;
|
|
RtlMoveMemory(TempPtr, (PUCHAR)PcMpDefaultTablePtrs[1],
|
|
BytesToCopy);
|
|
|
|
// Populate the checksum entry for the table.
|
|
CheckSum = ComputeCheckSum(TempPtr, BytesToCopy);
|
|
|
|
sprintf(Cbuf, "CreateBIOSTables: PC+MP table computed checksum = %x\n",
|
|
CheckSum);
|
|
HalpDisplayString(Cbuf);
|
|
|
|
CheckSum = ~CheckSum + 1;
|
|
((struct PcMpTable *)TempPtr)->Checksum = CheckSum;
|
|
|
|
sprintf(Cbuf, "CreateBIOSTables: PC+MP table written checksum = %x\n",
|
|
CheckSum);
|
|
HalpDisplayString(Cbuf);
|
|
|
|
|
|
// Now create the floating pointer structure for the table.
|
|
|
|
TraversePtr = (PULONG) HalpMapPhysicalMemory( (PVOID) TEST_FLOAT_PTR, 1);
|
|
TempPtr = (PUCHAR) TraversePtr;
|
|
|
|
*TraversePtr++ = MP_PTR_SIGNATURE;
|
|
*TraversePtr++ = PCMP_TEST_TABLE;
|
|
BytePtr = (PUCHAR)TraversePtr;
|
|
*BytePtr++ = 1; // Length in number of 16 byte paragraphs
|
|
*BytePtr++ = 1; // Spec Rev.
|
|
*BytePtr++ = 0; // CheckSum
|
|
*BytePtr++ = 0; // Reserved
|
|
TraversePtr = (PULONG)BytePtr;
|
|
*TraversePtr = 0; // Reserved
|
|
|
|
CheckSum = ComputeCheckSum(TempPtr,16);
|
|
|
|
sprintf(Cbuf, "CreateBIOSTables: FLOAT_PTR computed checksum = %x\n",
|
|
CheckSum);
|
|
HalpDisplayString(Cbuf);
|
|
|
|
CheckSum = ~CheckSum + 1;
|
|
|
|
sprintf(Cbuf, "CreateBIOSTables: FLOAT_PTR written checksum = %x\n",
|
|
CheckSum);
|
|
HalpDisplayString(Cbuf);
|
|
|
|
((struct PcMpTableLocator *)TempPtr)->TableChecksum = CheckSum;
|
|
|
|
HalpDisplayString("CreateBIOSTables : Done\n");
|
|
|
|
}
|
|
|
|
#endif // DEBUGGING
|