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790 lines
17 KiB
790 lines
17 KiB
/*++
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Copyright (c) 1989 Microsoft Corporation
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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tbflush.c
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Abstract:
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This module implements machine dependent functions to flush
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the translation buffers in an Intel x86 system.
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N.B. This module contains only MP versions of the TB flush routines.
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The UP versions are macros in ke.h
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KeFlushEntireTb remains a routine for the UP system since it is
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exported from the kernel for backwards compatibility.
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Author:
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David N. Cutler (davec) 13-May-1989
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Environment:
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Kernel mode only.
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Revision History:
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Shie-Lin Tzong (shielint) 30-Aug-1990
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Implement MP version of KeFlushSingleTb and KeFlushEntireTb.
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--*/
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#include "ki.h"
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VOID
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KiFlushTargetEntireTb (
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IN PKIPI_CONTEXT SignalDone,
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IN PVOID Invalid,
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IN PVOID Parameter2,
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IN PVOID Parameter3
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);
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VOID
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KiFlushTargetMultipleTb (
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IN PKIPI_CONTEXT SignalDone,
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IN PVOID Parameter1,
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IN PVOID Parameter2,
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IN PVOID Parameter3
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);
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VOID
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KiFlushTargetSingleTb (
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IN PKIPI_CONTEXT SignalDone,
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IN PVOID Parameter1,
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IN PVOID Parameter2,
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IN PVOID Parameter3
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);
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HARDWARE_PTE
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KiFlushSingleTbSynchronous (
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IN PVOID Virtual,
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IN BOOLEAN Invalid,
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IN BOOLEAN AllProcessors,
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IN PHARDWARE_PTE PtePointer,
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IN HARDWARE_PTE PteValue
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);
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VOID
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KiFlushTargetSingleTbSynchronous (
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IN PKIPI_CONTEXT SignalDone,
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IN PVOID Parameter1,
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IN PVOID Parameter2,
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IN PVOID Parameter3
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);
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VOID
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Ki386UseSynchronousTbFlush (
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IN volatile PLONG Number
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);
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(INIT,Ki386UseSynchronousTbFlush)
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#endif
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#if !defined(NT_UP)
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VOID
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KeFlushEntireTb (
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IN BOOLEAN Invalid,
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IN BOOLEAN AllProcessors
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)
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/*++
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Routine Description:
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This function flushes the entire translation buffer (TB) on all processors
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that are currently running threads which are child of the current process
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or flushes the entire translation buffer on all processors in the host
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configuration.
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Arguments:
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Invalid - Supplies a boolean value that specifies the reason for flushing
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the translation buffer.
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AllProcessors - Supplies a boolean value that determines which translation
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buffers are to be flushed.
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Return Value:
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None.
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--*/
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{
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KAFFINITY EntireSet;
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KIRQL OldIrql;
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PKPRCB Prcb;
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PKPROCESS Process;
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KAFFINITY TargetProcessors;
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//
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// Compute the target set of processors, disable context switching,
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// and send the flush entire parameters to the target processors,
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// if any, for execution.
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//
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if (AllProcessors != FALSE) {
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OldIrql = KeRaiseIrqlToSynchLevel();
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Prcb = KeGetCurrentPrcb();
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TargetProcessors = KeActiveProcessors;
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} else {
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KiLockContextSwap(&OldIrql);
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Prcb = KeGetCurrentPrcb();
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Process = Prcb->CurrentThread->ApcState.Process;
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TargetProcessors = Process->ActiveProcessors;
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}
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EntireSet = KeActiveProcessors & ~Prcb->SetMember;
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TargetProcessors &= ~Prcb->SetMember;
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//
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// If the target set of processors is equal to the full set of processors,
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// then set the TB flush time stamp busy.
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//
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if (TargetProcessors == EntireSet) {
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KiSetTbFlushTimeStampBusy();
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}
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//
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// Send packet to target processors.
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//
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if (TargetProcessors != 0) {
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KiIpiSendPacket(TargetProcessors,
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KiFlushTargetEntireTb,
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NULL,
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NULL,
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NULL);
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IPI_INSTRUMENT_COUNT (Prcb->Number, FlushEntireTb);
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}
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//
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// Flush TB on current processor.
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//
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KeFlushCurrentTb();
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//
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// Wait until all target processors have finished and complete packet.
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//
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if (TargetProcessors != 0) {
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KiIpiStallOnPacketTargets(TargetProcessors);
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}
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//
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// If the target set of processors is equal to the full set of processors,
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// then clear the TB flush time stamp busy.
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//
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if (TargetProcessors == EntireSet) {
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KiClearTbFlushTimeStampBusy();
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}
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//
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// Lower IRQL and unlock as appropriate.
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//
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if (AllProcessors != FALSE) {
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KeLowerIrql(OldIrql);
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} else {
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KiUnlockContextSwap(OldIrql);
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}
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return;
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}
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VOID
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KiFlushTargetEntireTb (
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IN PKIPI_CONTEXT SignalDone,
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IN PVOID Parameter1,
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IN PVOID Parameter2,
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IN PVOID Parameter3
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)
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/*++
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Routine Description:
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This is the target function for flushing the entire TB.
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Arguments:
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SignalDone - Supplies a pointer to a variable that is cleared when the
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requested operation has been performed.
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Parameter1 - Parameter3 - Not used.
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Return Value:
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None.
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--*/
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{
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//
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// Flush the entire TB on the current processor.
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//
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KiIpiSignalPacketDone(SignalDone);
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KeFlushCurrentTb();
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return;
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}
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VOID
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KeFlushMultipleTb (
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IN ULONG Number,
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IN PVOID *Virtual,
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IN BOOLEAN Invalid,
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IN BOOLEAN AllProcessors,
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IN PHARDWARE_PTE *PtePointer OPTIONAL,
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IN HARDWARE_PTE PteValue
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)
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/*++
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Routine Description:
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This function flushes multiple entries from the translation buffer
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on all processors that are currently running threads which are
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children of the current process or flushes a multiple entries from
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the translation buffer on all processors in the host configuration.
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Arguments:
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Number - Supplies the number of TB entries to flush.
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Virtual - Supplies a pointer to an array of virtual addresses that
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are within the pages whose translation buffer entries are to be
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flushed.
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Invalid - Supplies a boolean value that specifies the reason for
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flushing the translation buffer.
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AllProcessors - Supplies a boolean value that determines which
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translation buffers are to be flushed.
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PtePointer - Supplies an optional pointer to an array of pointers to
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page table entries that receive the specified page table entry
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value.
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PteValue - Supplies the the new page table entry value.
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Return Value:
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The previous contents of the specified page table entry is returned
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as the function value.
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--*/
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{
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ULONG Index;
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KIRQL OldIrql;
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PKPRCB Prcb;
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PKPROCESS Process;
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KAFFINITY TargetProcessors;
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//
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// Compute target set of processors.
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//
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if (AllProcessors != FALSE) {
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OldIrql = KeRaiseIrqlToSynchLevel();
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Prcb = KeGetCurrentPrcb();
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TargetProcessors = KeActiveProcessors;
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} else {
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KiLockContextSwap(&OldIrql);
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Prcb = KeGetCurrentPrcb();
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Process = Prcb->CurrentThread->ApcState.Process;
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TargetProcessors = Process->ActiveProcessors;
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}
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TargetProcessors &= ~Prcb->SetMember;
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//
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// If a page table entry address array is specified, then set the
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// specified page table entries to the specific value.
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//
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if (ARGUMENT_PRESENT(PtePointer)) {
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for (Index = 0; Index < Number; Index += 1) {
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KI_FILL_PTE(PtePointer[Index], PteValue);
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}
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}
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//
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// If any target processors are specified, then send a flush multiple
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// packet to the target set of processors.
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//
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if (TargetProcessors != 0) {
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KiIpiSendPacket(TargetProcessors,
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KiFlushTargetMultipleTb,
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(PVOID)Invalid,
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(PVOID)Number,
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(PVOID)Virtual);
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IPI_INSTRUMENT_COUNT (Prcb->Number, FlushMultipleTb);
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}
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//
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// Flush the specified entries from the TB on the current processor.
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//
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for (Index = 0; Index < Number; Index += 1) {
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KiFlushSingleTb(Invalid, Virtual[Index]);
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}
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//
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// Wait until all target processors have finished and complete packet.
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//
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if (TargetProcessors != 0) {
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KiIpiStallOnPacketTargets(TargetProcessors);
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}
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//
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// Release the context swap lock.
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//
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if (AllProcessors != FALSE) {
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KeLowerIrql(OldIrql);
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} else {
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KiUnlockContextSwap(OldIrql);
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}
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return;
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}
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VOID
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KiFlushTargetMultipleTb (
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IN PKIPI_CONTEXT SignalDone,
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IN PVOID Invalid,
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IN PVOID Number,
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IN PVOID Virtual
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)
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/*++
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Routine Description:
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This is the target function for flushing multiple TB entries.
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Arguments:
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SignalDone - Supplies a pointer to a variable that is cleared when the
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requested operation has been performed.
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Invalid - Supplies a bollean value that determines whether the virtual
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address is invalid.
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Number - Supplies the number of TB entries to flush.
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Virtual - Supplies a pointer to an array of virtual addresses that
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are within the pages whose translation buffer entries are to be
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flushed.
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Return Value:
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None.
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--*/
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{
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ULONG Index;
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PVOID VirtualAddress[FLUSH_MULTIPLE_MAXIMUM];
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//
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// Capture the virtual addresses that are to be flushed from the TB
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// on the current processor and signal pack done.
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//
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for (Index = 0; Index < (ULONG) Number; Index += 1) {
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VirtualAddress[Index] = ((PVOID *)(Virtual))[Index];
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}
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KiIpiSignalPacketDone(SignalDone);
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//
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// Flush the specified virtual address for the TB on the current
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// processor.
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//
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for (Index = 0; Index < (ULONG) Number; Index += 1) {
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KiFlushSingleTb((BOOLEAN)Invalid, VirtualAddress [Index]);
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}
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}
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HARDWARE_PTE
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KeFlushSingleTb (
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IN PVOID Virtual,
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IN BOOLEAN Invalid,
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IN BOOLEAN AllProcessors,
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IN PHARDWARE_PTE PtePointer,
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IN HARDWARE_PTE PteValue
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)
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/*++
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Routine Description:
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This function flushes a single entry from translation buffer (TB) on all
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processors that are currently running threads which are child of the current
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process or flushes the entire translation buffer on all processors in the
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host configuration.
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Arguments:
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Virtual - Supplies a virtual address that is within the page whose
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translation buffer entry is to be flushed.
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Invalid - Supplies a boolean value that specifies the reason for flushing
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the translation buffer.
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AllProcessors - Supplies a boolean value that determines which translation
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buffers are to be flushed.
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PtePointer - Address of Pte to update with new value.
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PteValue - New value to put in the Pte. Will simply be assigned to
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*PtePointer, in a fashion correct for the hardware.
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Return Value:
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Returns the contents of the PtePointer before the new value
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is stored.
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--*/
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{
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KIRQL OldIrql;
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PKPRCB Prcb;
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PKPROCESS Process;
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HARDWARE_PTE OldPteValue;
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KAFFINITY TargetProcessors;
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//
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// Compute target set of processors.
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//
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if (AllProcessors != FALSE) {
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OldIrql = KeRaiseIrqlToSynchLevel();
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Prcb = KeGetCurrentPrcb();
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TargetProcessors = KeActiveProcessors;
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} else {
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KiLockContextSwap(&OldIrql);
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Prcb = KeGetCurrentPrcb();
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Process = Prcb->CurrentThread->ApcState.Process;
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TargetProcessors = Process->ActiveProcessors;
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}
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TargetProcessors &= ~Prcb->SetMember;
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//
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// Capture the previous contents of the page table entry and set the
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// page table entry to the new value.
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//
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KI_SWAP_PTE(PtePointer, PteValue, OldPteValue);
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//
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// If any target processors are specified, then send a flush single
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// packet to the target set of processors.
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//
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if (TargetProcessors != 0) {
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KiIpiSendPacket(TargetProcessors,
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KiFlushTargetSingleTb,
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(PVOID)Invalid,
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(PVOID)Virtual,
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NULL);
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IPI_INSTRUMENT_COUNT(Prcb->Number, FlushSingleTb);
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}
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//
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// Flush the specified entry from the TB on the current processor.
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//
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KiFlushSingleTb(Invalid, Virtual);
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//
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// Wait until all target processors have finished and complete packet.
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//
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if (TargetProcessors != 0) {
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KiIpiStallOnPacketTargets(TargetProcessors);
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}
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//
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// Release the context swap lock.
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//
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if (AllProcessors != FALSE) {
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KeLowerIrql(OldIrql);
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} else {
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KiUnlockContextSwap(OldIrql);
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}
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return(OldPteValue);
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}
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VOID
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KiFlushTargetSingleTb (
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IN PKIPI_CONTEXT SignalDone,
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IN PVOID Invalid,
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IN PVOID VirtualAddress,
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IN PVOID Parameter3
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)
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/*++
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Routine Description:
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This is the target function for flushing a single TB entry.
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Arguments:
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SignalDone Supplies a pointer to a variable that is cleared when the
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requested operation has been performed.
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Invalid - Supplies a bollean value that determines whether the virtual
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address is invalid.
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Virtual - Supplies a virtual address that is within the page whose
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translation buffer entry is to be flushed.
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Parameter3 - Not used.
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Return Value:
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None.
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--*/
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{
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//
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// Flush a single entry from the TB on the current processor.
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//
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KiIpiSignalPacketDone(SignalDone);
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KiFlushSingleTb((BOOLEAN)Invalid, (PVOID)VirtualAddress);
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}
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HARDWARE_PTE
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KiFlushSingleTbSynchronous (
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IN PVOID Virtual,
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IN BOOLEAN Invalid,
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IN BOOLEAN AllProcessors,
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IN PHARDWARE_PTE PtePointer,
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IN HARDWARE_PTE PteValue
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)
|
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/*++
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Routine Description:
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This function is a slow synchronous version of KeFlushSingleTb. We need
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this function as many P6's don't actually know how to deal with PTEs in
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an MP safe manner.
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Arguments:
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See KeFlushSingleTb
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Return Value:
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See KeFlushSingleTb
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--*/
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{
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KIRQL OldIrql;
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PKPRCB Prcb;
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PKPROCESS Process;
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HARDWARE_PTE OldPteValue;
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KAFFINITY TargetProcessors;
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//
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// Synchronize will all other single flush calls (and other
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// IPIs which use reverse stalls)
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//
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KiLockContextSwap(&OldIrql);
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//
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// Compute target set of processors.
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//
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Prcb = KeGetCurrentPrcb();
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if (AllProcessors != FALSE) {
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TargetProcessors = KeActiveProcessors;
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} else {
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Process = Prcb->CurrentThread->ApcState.Process;
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TargetProcessors = Process->ActiveProcessors;
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}
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TargetProcessors &= ~Prcb->SetMember;
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|
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//
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// If any target processors are specified, then send a flush single
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// packet to the target set of processors.
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//
|
|
|
|
if (TargetProcessors != 0) {
|
|
KiIpiSendSynchronousPacket(Prcb,
|
|
TargetProcessors,
|
|
KiFlushTargetSingleTbSynchronous,
|
|
(PVOID)Invalid,
|
|
(PVOID)Virtual,
|
|
(PVOID)&Prcb->ReverseStall
|
|
);
|
|
|
|
IPI_INSTRUMENT_COUNT(Prcb->Number, FlushSingleTb);
|
|
|
|
//
|
|
// Wait for the target processors to stall
|
|
//
|
|
|
|
KiIpiStallOnPacketTargets(TargetProcessors);
|
|
|
|
//
|
|
// Capture the previous contents of the page table entry and set the
|
|
// page table entry to the new value.
|
|
//
|
|
|
|
KI_SWAP_PTE(PtePointer, PteValue, OldPteValue);
|
|
|
|
//
|
|
// Notify all prcessors it's time to go
|
|
//
|
|
|
|
Prcb->ReverseStall += 1;
|
|
|
|
} else {
|
|
|
|
//
|
|
// Capture the previous contents of the page table entry and set the
|
|
// page table entry to the new value.
|
|
//
|
|
|
|
KI_SWAP_PTE(PtePointer, PteValue, OldPteValue);
|
|
}
|
|
|
|
//
|
|
// Flush the specified entry from the TB on the current processor.
|
|
//
|
|
|
|
KiFlushSingleTb(Invalid, Virtual);
|
|
|
|
//
|
|
// Done
|
|
//
|
|
|
|
KiUnlockContextSwap(OldIrql);
|
|
return(OldPteValue);
|
|
}
|
|
|
|
VOID
|
|
KiFlushTargetSingleTbSynchronous (
|
|
IN PKIPI_CONTEXT SignalDone,
|
|
IN PVOID Invalid,
|
|
IN PVOID VirtualAddress,
|
|
IN PVOID Proceed
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This is the target function for flushing a single TB entry synchronously.
|
|
|
|
Arguments:
|
|
|
|
SignalDone Supplies a pointer to a variable that is cleared when the
|
|
requested operation has been performed.
|
|
|
|
Invalid - Supplies a bollean value that determines whether the virtual
|
|
address is invalid.
|
|
|
|
Virtual - Supplies a virtual address that is within the page whose
|
|
translation buffer entry is to be flushed.
|
|
|
|
Parameter3 - Not used.
|
|
|
|
Return Value:
|
|
|
|
None.
|
|
|
|
--*/
|
|
|
|
{
|
|
|
|
//
|
|
// Flush a single entry from the TB on the current processor.
|
|
//
|
|
|
|
KiIpiSignalPacketDoneAndStall(SignalDone, Proceed);
|
|
KiFlushSingleTb((BOOLEAN)Invalid, (PVOID)VirtualAddress);
|
|
}
|
|
|
|
|
|
VOID
|
|
Ki386UseSynchronousTbFlush (
|
|
IN volatile PLONG Number
|
|
)
|
|
{
|
|
PKPRCB Prcb;
|
|
volatile PUCHAR Patch;
|
|
|
|
Prcb = KeGetCurrentPrcb();
|
|
Patch = (PUCHAR) KeFlushSingleTb;
|
|
|
|
//
|
|
// Signal we're here and wait for others
|
|
//
|
|
|
|
InterlockedDecrement (Number);
|
|
while (*Number) ;
|
|
|
|
//
|
|
// If this is processor 0 apply the patch
|
|
//
|
|
|
|
if (Prcb->Number == 0) {
|
|
*((PULONG) &Patch[1]) = ((ULONG) &KiFlushSingleTbSynchronous) - ((ULONG) Patch) - 5;
|
|
Patch[0] = 0xe9;
|
|
}
|
|
|
|
//
|
|
// Wait for processor 0 to complete installation of handler
|
|
//
|
|
|
|
while (Patch[0] != 0xe9) ;
|
|
}
|
|
|
|
#endif
|