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718 lines
13 KiB
718 lines
13 KiB
/*++
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Copyright (c) 1993, 1994 Weitek Corporation
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Module Name:
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p91bt489.c
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Abstract:
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This module contains code specific to the Bt489 DAC on P9x0x adapters.
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Environment:
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Kernel mode
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Revision History may be found at the end of this file.
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--*/
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#include "p9.h"
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#include "p9gbl.h"
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#include "p9000.h"
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#include "bt485.h"
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#include "p91regs.h"
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#include "p91dac.h"
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#define PIX_PORT_15 0x30
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//
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// external functions in p91bt485.c
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//
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extern UCHAR
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ReadDAC(
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PHW_DEVICE_EXTENSION HwDeviceExtension,
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ULONG ulIndex
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);
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extern VOID
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WriteDAC(
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PHW_DEVICE_EXTENSION HwDeviceExtension,
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ULONG ulIndex,
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UCHAR ucValue
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);
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//
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// Bt489 DAC specific functions.
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//
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VOID
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P91Bt489SetPalette(
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PHW_DEVICE_EXTENSION HwDeviceExtension,
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ULONG *pPal,
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ULONG StartIndex,
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ULONG Count
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);
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VOID
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P91Bt489SetPointerPos(
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PHW_DEVICE_EXTENSION HwDeviceExtension,
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ULONG ptlX,
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ULONG ptlY
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);
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VOID
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P91Bt489SetPointerShape(
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PHW_DEVICE_EXTENSION HwDeviceExtension,
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PUCHAR pHWCursorShape
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);
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VOID
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P91Bt489PointerOn(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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);
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VOID
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P91Bt489PointerOff(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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);
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VOID
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P91Bt489ClearPalette(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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);
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BOOLEAN
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P91Bt489SetMode(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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);
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VOID
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P91Bt489RestoreMode(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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);
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VOID
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P91Bt489SetClkDoubler(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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);
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VOID
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P91Bt489ClrClkDoubler(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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);
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//
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// Define the DAC support routines structure for the Bt489 DAC.
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//
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DAC P91Bt489 = {
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DAC_ID_BT489,
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NUM_DAC_REGS,
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P91Bt489SetMode,
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P91Bt489RestoreMode,
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P91Bt489SetPalette,
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P91Bt489ClearPalette,
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P91Bt489PointerOn,
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P91Bt489PointerOff,
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P91Bt489SetPointerPos,
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P91Bt489SetPointerShape,
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CLK489_MAX_FREQ,
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P91Bt489SetClkDoubler,
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P91Bt489ClrClkDoubler,
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DAC_ID_BT489,
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64,
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FALSE,
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FALSE,
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TRUE // TRUE == Supports 24BPP
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};
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VOID
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P91Bt489SetPalette(
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PHW_DEVICE_EXTENSION HwDeviceExtension,
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ULONG *pPal,
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ULONG StartIndex,
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ULONG Count
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)
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/*++
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Routine Description:
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Sets the Device palette
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Arguments:
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HwDeviceExtension - Pointer to the miniport driver's device extension.
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pPal - Pointer to the array of pallete entries.
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StartIndex - Specifies the first pallete entry provided in pPal.
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Count - Number of palette entries in pPal
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Return Value:
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None.
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--*/
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{
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UCHAR *pBytePal;
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PAL_WR_ADDR((UCHAR) StartIndex);
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pBytePal = (PUCHAR) pPal;
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//
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// Load the palette with RGB values. The input palette has 4 bytes
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// per entry, the last of which is ignored.
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//
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while (Count--)
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{
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PAL_WR_DATA(*pBytePal++);
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PAL_WR_DATA(*pBytePal++);
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PAL_WR_DATA(*pBytePal++);
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pBytePal++;
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}
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}
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VOID
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P91Bt489SetPointerPos(
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PHW_DEVICE_EXTENSION HwDeviceExtension,
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ULONG ptlX,
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ULONG ptlY
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)
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/*++
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Routine Description:
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Move Hardware Pointer.
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Arguments:
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HwDeviceExtension - Pointer to the miniport driver's device extension.
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ptlX, ptlY - Requested X,Y position for the pointer.
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Return Value:
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TRUE
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--*/
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{
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//
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// Strip off the invalid bits and update the cursor position regs.
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//
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WR_CURS_POS_X(((ptlX + CURSOR_WIDTH) & 0xFFF));
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WR_CURS_POS_Y(((ptlY + CURSOR_HEIGHT) & 0xFFF));
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return;
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}
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VOID
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P91Bt489SetPointerShape(
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PHW_DEVICE_EXTENSION HwDeviceExtension,
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PUCHAR pHWCursorShape
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)
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/*++
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Routine Description:
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Sets the hardware cursor shape.
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Arguments:
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HwDeviceExtension - Pointer to the miniport driver's device extension.
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pHWCursorShape - Pointer to the cursor bitmap.
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Return Value:
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None.
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--*/
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{
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ULONG iCount;
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//
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// The # of bytes of cursor bitmap data to send *= 2 for and/xor mask
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// *= 8 for 8bit/byte
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// *= 2 for 2 loops
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//
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ULONG iLoop = (CURSOR_WIDTH * CURSOR_HEIGHT * 2) / (8 * 2);
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//
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// AND mask will be loaded to plane 1.
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//
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PAL_WR_ADDR(0x80);
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iCount = iLoop;
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WAIT_FOR_RETRACE();
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while (iCount--)
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{
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WR_CURS_DATA(*pHWCursorShape++);
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}
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//
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// XOR mask will be loaded to plane 0.
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//
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PAL_WR_ADDR(0x00);
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iCount = iLoop;
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WAIT_FOR_RETRACE();
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while (iCount--)
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{
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WR_CURS_DATA(*pHWCursorShape++);
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}
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return;
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}
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VOID
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P91Bt489PointerOn(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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)
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/*++
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Routine Description:
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Turn on the hardware cursor.
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Arguments:
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HwDeviceExtension - Pointer to the miniport driver's device extension.
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Return Value:
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None.
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--*/
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{
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//
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// Turn the cursor on only if it was disabled.
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//
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if (!CURS_IS_ON())
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{
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WAIT_FOR_RETRACE();
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CURS_ON();
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}
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return;
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}
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VOID
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P91Bt489PointerOff(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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)
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/*++
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Routine Description:
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Turn off the hardware cursor.
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Arguments:
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HwDeviceExtension - Pointer to the miniport driver's device extension.
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Return Value:
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None.
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--*/
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{
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//
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// Turn the cursor off only if it was enabled.
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//
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if (CURS_IS_ON())
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{
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WAIT_FOR_RETRACE();
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CURS_OFF();
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}
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return;
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}
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VOID
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P91Bt489ClearPalette(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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)
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/*++
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Routine Description:
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Clears the palette to all 0's
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Arguments:
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HwDeviceExtension - Pointer to the miniport driver's device extension.
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Return Value:
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None.
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--*/
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{
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int Count;
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//
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// Calculate the number of palette entries. It is assumed that the
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// caller has already determined that the current mode makes use
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// of the palette,
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//
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Count = 1 << HwDeviceExtension->usBitsPixel;
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//
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// Fill the palette with RGB values of 0.
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//
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while (Count--)
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{
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PAL_WR_DATA(0);
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PAL_WR_DATA(0);
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PAL_WR_DATA(0);
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}
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return;
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}
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BOOLEAN
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P91Bt489SetMode(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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)
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/*++
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Routine Description:
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Initializes the DAC for the current mode.
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Arguments:
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HwDeviceExtension - Pointer to the miniport driver's device extension.
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Return Value:
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None.
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--*/
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{
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USHORT usLoadClock;
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UCHAR ucCurState;
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VideoDebugPrint((1, "P91Bt489SetMode----------\n"));
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// Added per code received from R. Embry
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WriteDAC(HwDeviceExtension, PIXEL_MSK_REG, 0xff);
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//
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// Enable 8bit dacs, allow access to Command Register 3.
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//
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//
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// Enable accesses to CMD_REG_3. For the Power 9100, to access command
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// register 3, you must have CR07 TRUE and you must load a one into
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// the address register.
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//
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if (IS_DEV_P9100)
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P9_WR_REG(P9100_RAMWRITE, 0x01);
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WriteDAC(HwDeviceExtension, CMD_REG_0, ENB_CMD_REG_3 | MODE_8_BIT);
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//
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// Set the DAC Pixel port value for the current bit depth.
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// Note: The BT485 does not support 24bpp mode.
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//
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switch (HwDeviceExtension->usBitsPixel)
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{
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case 8:
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WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_8);
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WR_CMD_REG_4( CR4_MUX_81 );
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break;
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case 16: // This is really 555, not 565...
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WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_15);
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WR_CMD_REG_4( CR4_MUX_41 );
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break;
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case 24:
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WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_32);
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WR_CMD_REG_4(CR4_MUX_24BPP);
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break;
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case 32:
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WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_32);
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WR_CMD_REG_4( CR4_MUX_21 );
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break;
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default:
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//
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// Oops..invalid BPP value. Use 8BPP value for now.
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//
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WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_8);
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WR_CMD_REG_4( CR4_MUX_81 );
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break;
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};
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// This code added per R. Embry from ECR 2/95
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usLoadClock = (USHORT) ((HwDeviceExtension->VideoData.dotfreq1 /
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HwDeviceExtension->Dac.usRamdacWidth) *
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HwDeviceExtension->usBitsPixel);
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if ( usLoadClock > 4850 )
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{
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ucCurState = SCLK_INV; // Bt489 - invert SCLK if in forbidden region
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}
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else
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{
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ucCurState = 0;
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}
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//
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// Select P9x00 video clock, disable cursor
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//
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WriteDAC( HwDeviceExtension, CMD_REG_2,
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(UCHAR)(ucCurState | ((PORTSEL_MSKD | PCLK1_SEL) & DIS_CURS)) );
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//
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// Select 32x32x2 cursor mode, and clock doubler mode if neccessary.
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//
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RD_CMD_REG_3(ucCurState);
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if (HwDeviceExtension->VideoData.dotfreq1 >
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HwDeviceExtension->Dac.ulMaxClkFreq)
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{
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//
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// Enable the DAC clock doubler mode.
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//
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HwDeviceExtension->Dac.DACSetClkDblMode(HwDeviceExtension);
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}
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else
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{
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//
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// Disable the DAC clock doubler mode.
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//
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HwDeviceExtension->Dac.DACClrClkDblMode(HwDeviceExtension);
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}
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//
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// Set the pixel read mask.
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//
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WriteDAC(HwDeviceExtension, PIXEL_MSK_REG, 0xff);
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//
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// Set cursor colors 1 and 2.
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//
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WriteDAC(HwDeviceExtension, CURS_CLR_ADDR, 1);
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WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0x00);
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WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0x00);
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WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0x00);
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WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0xFF);
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WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0xFF);
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WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0xFF);
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return(TRUE);
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}
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VOID
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P91Bt489RestoreMode(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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)
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/*++
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routine description:
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Restore the DAC to its pristine state.
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arguments:
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hwdeviceextension - pointer to the miniport driver's device extension.
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return value:
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--*/
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{
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UCHAR ucCurState;
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VideoDebugPrint((1, "P91Bt489RestoreMode----------\n"));
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//
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// Enable accesses to CMD_REG_3. For the Power 9100, to access command
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// register 3, you must have CR07 TRUE and you must load a one into
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// the address register.
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//
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if (IS_DEV_P9100)
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{
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// Added per code received from R. Embry
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WriteDAC(HwDeviceExtension, CMD_REG_0, ENB_CMD_REG_3);
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P9_WR_REG(P9100_RAMWRITE, 0x02);
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WR_CMD_REG_3(0x00);
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// end added code
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P9_WR_REG(P9100_RAMWRITE, 0x01);
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WriteDAC(HwDeviceExtension, CMD_REG_0, ENB_CMD_REG_3);
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// ucCurState = ReadDAC(HwDeviceExtension, CMD_REG_1);
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// ucCurState = ReadDAC(HwDeviceExtension, CMD_REG_2);
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// RD_CMD_REG_3(ucCurState);
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// RD_CMD_REG_4(ucCurState);
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WR_CMD_REG_4(0x00); // zero out cmd reg 4 on Bt489
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WriteDAC(HwDeviceExtension, CMD_REG_0, 0x00);
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WriteDAC(HwDeviceExtension, CMD_REG_1, 0x00);
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WriteDAC(HwDeviceExtension, CMD_REG_2, 0x00);
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return;
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}
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WriteDAC(HwDeviceExtension, CMD_REG_0, ENB_CMD_REG_3);
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//
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// Set pixel port for 8bit pixels.
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//
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WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_8);
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//
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// Select VGA video clock, disable cursor.
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//
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WriteDAC(HwDeviceExtension, (ULONG) CMD_REG_2,
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(UCHAR)(ReadDAC(HwDeviceExtension, (ULONG) CMD_REG_2) & DIS_CURS));
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//
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// Select 32x32 cursor, clear clock doubler bit.
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//
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RD_CMD_REG_3(ucCurState);
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WR_CMD_REG_3(ucCurState & (~(DAC_CLK_2X | DAC_CLK_2X_489) & CUR_MODE_32));
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//
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// Set pixel read mask.
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//
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WriteDAC(HwDeviceExtension, PIXEL_MSK_REG, 0xff);
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return;
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}
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VOID
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P91Bt489SetClkDoubler(
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PHW_DEVICE_EXTENSION HwDeviceExtension
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)
|
|
|
|
/*++
|
|
|
|
routine description:
|
|
|
|
Enable the DAC's internal clock doubler.
|
|
|
|
arguments:
|
|
|
|
hwdeviceextension - pointer to the miniport driver's device extension.
|
|
|
|
|
|
return value:
|
|
|
|
--*/
|
|
|
|
{
|
|
UCHAR ucCurState;
|
|
|
|
VideoDebugPrint((1, "P91Bt489SetClkDoubler----------\n"));
|
|
RD_CMD_REG_3(ucCurState);
|
|
// per os/2 driver, write undocumented bit too
|
|
if (HwDeviceExtension->usBitsPixel == 24 )
|
|
{
|
|
WR_CMD_REG_3(ucCurState | (DAC_CLK_2X | DAC_CLK_2X_489));
|
|
}
|
|
else
|
|
{
|
|
WR_CMD_REG_3(ucCurState | DAC_CLK_2X);
|
|
}
|
|
return;
|
|
}
|
|
|
|
|
|
VOID
|
|
P91Bt489ClrClkDoubler(
|
|
PHW_DEVICE_EXTENSION HwDeviceExtension
|
|
)
|
|
|
|
/*++
|
|
|
|
routine description:
|
|
|
|
Disable the DAC's internal clock doubler.
|
|
|
|
arguments:
|
|
|
|
hwdeviceextension - pointer to the miniport driver's device extension.
|
|
|
|
|
|
return value:
|
|
|
|
--*/
|
|
{
|
|
UCHAR ucCurState;
|
|
|
|
VideoDebugPrint((1, "P91Bt489ClrClkDoubler----------\n"));
|
|
RD_CMD_REG_3(ucCurState);
|
|
WR_CMD_REG_3(ucCurState & ~(DAC_CLK_2X | DAC_CLK_2X_489));
|
|
return;
|
|
}
|