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199 lines
4.0 KiB
199 lines
4.0 KiB
//
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// MODULE : IRQ.C
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// PURPOSE : PIC programming
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// AUTHOR : JBS Yadawa
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// CREATED : 7/20/96
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//
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//
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// Copyright (C) 1996 SGS-THOMSON Microelectronics
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//
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//
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// REVISION HISTORY :
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//
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// DATE :
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//
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// COMMENTS :
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//
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#include "stdefs.h"
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#include <conio.h>
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#include "irq.h"
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#include "debug.h"
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#define MASK1 0x21 // PIC 1 mask register
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#define MASK2 0xA1 // PIC 2 mask register
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#define EOI1 0x20 // PIC 1 eoi register
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#define EOI2 0xA0 // PIC 2 eoi register
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#define EOI 0x20 // Value to write in EOI1 or EOI2
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//---- Interrupt number constants
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#define IRQ0INT 0x08 // IRQ 0 is mapped on INT 0x08
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#define IRQ8INT 0x70 // IRQ 8 is mapped on INT 0x70
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#define SWITCH 8 // 1st PIC manages IRQ0-7, 2nd PIC manages IRQ8-15
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//---- Processor Flag mask constant
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#define IFFLAG 0x0200 // i80x86 Interrupt Flag mask
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static BOOL ITAlreadyDisabled = FALSE; // Holds current æP state of IT masking
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static WORD Count = 0;
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static BYTE NEARAPI HostGetITMask(BYTE IRQ);
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static void NEARAPI HostSetITMask(BYTE IRQ, BYTE Mask);
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void FARAPI HostDisableIT(void)
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{
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_asm {
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push ax // saves ax
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pushf // push the flag register on the stack
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pop ax // pop it in ax
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test ax, IFFLAG // Test the Interrupt Flag (IF) bit
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pop ax // restore ax
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jz Disabled // if not set goto Disabled
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cli // disable interrupts
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}
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ITAlreadyDisabled = FALSE; // Interrupts were not already disable
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return ;
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Disabled :
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ITAlreadyDisabled = TRUE; // Interrupts were already disable
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}
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void FARAPI HostEnableIT(void)
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{
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if (!ITAlreadyDisabled)
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_enable(); // enable interrupts (i80x86 sti instruction)
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}
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static void NEARAPI HostSetVect(BYTE SWInt, INTRFNPTR ISR)
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{
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WORD FnSeg;
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WORD FnOff;
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FnSeg = FP_SEG(ISR);
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FnOff = FP_OFF(ISR);
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_asm {
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push ds
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mov dx, FnOff
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mov ds, FnSeg
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mov al, SWInt
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mov ah, 0x25
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int 0x21
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pop ds
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}
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}
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static INTRFNPTR NEARAPI HostGetVect(BYTE SWInt)
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{
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WORD FnSeg;
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WORD FnOff;
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_asm {
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push es
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mov al, SWInt
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mov ah, 0x35
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int 0x21
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mov FnSeg, es
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mov FnOff, bx
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pop es
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}
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return (INTRFNPTR)(MK_FP(FnSeg, FnOff));
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}
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INTRFNPTR FARAPI HostSaveAndSetITVector(BYTE IRQ, INTRFNPTR ISR)
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{
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BYTE SWInt;
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INTRFNPTR OldISR;
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//---- If IRQ is managed by PIC2, Converts the IRQ to a SWInt (vector) nbr
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if (IRQ >= SWITCH)
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SWInt = IRQ8INT + (IRQ - SWITCH);
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else
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SWInt = IRQ0INT + IRQ;
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//---- Keep the old handler / set the new one
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HostDisableIT();
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OldISR = HostGetVect(SWInt);
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HostSetVect(SWInt, ISR);
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HostEnableIT();
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return OldISR;
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}
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void FARAPI HostRestoreITVector(BYTE IRQ, INTRFNPTR OldISR)
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{
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BYTE INT;
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//---- If IRQ is managed by PIC2, Converts the IRQ to an INT (vector) nbr
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if (IRQ >= SWITCH)
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INT = IRQ8INT - SWITCH + IRQ;
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else
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INT = IRQ0INT + IRQ;
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//---- Set the old vector
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HostDisableIT();
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HostSetVect(INT, OldISR);
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HostEnableIT();
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}
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void FARAPI HostAcknowledgeIT(BYTE IRQ)
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{
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//---- If the IRQ is managed by PIC2
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if (IRQ >= SWITCH)
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_outp(EOI2, EOI);
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//---- For PIC1 and PIC2
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_outp(EOI1, EOI);
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}
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static BYTE NEARAPI HostGetITMask(BYTE IRQ)
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{
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BYTE Mask;
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HostDisableIT();
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if (IRQ >= SWITCH)
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Mask = _inp(MASK2); // PIC2
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else
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Mask = _inp(MASK1); // PIC1
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HostEnableIT();
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return Mask;
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}
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static void NEARAPI HostSetITMask(BYTE IRQ, BYTE Mask)
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{
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HostDisableIT();
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if (IRQ >= SWITCH)
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_outp(MASK2, Mask); // PIC2
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else
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_outp(MASK1, Mask); // PIC1
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HostEnableIT();
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}
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void FARAPI HostMaskIT(BYTE IRQ)
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{
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//---- If the IRQ is managed by PIC2
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HostDisableIT();
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if (IRQ >= SWITCH)
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_outp(MASK2, (BYTE)(_inp(MASK2) | (1 << (IRQ - SWITCH)))) ; // PIC2
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else
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_outp(MASK1, (BYTE)(_inp(MASK1) | (1 << IRQ))) ; // PIC1
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HostEnableIT();
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}
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void FARAPI HostUnmaskIT(BYTE IRQ)
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{
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//---- If the IRQ is managed by PIC2
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HostDisableIT();
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if (IRQ >= SWITCH)
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_outp(MASK2, (BYTE)(_inp(MASK2) & ~(1 << (IRQ - SWITCH)))) ; // PIC2
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else
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_outp(MASK1, (BYTE)(_inp(MASK1) & ~(1 << IRQ))) ; // PIC1
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HostEnableIT();
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}
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