Windows NT 4.0 source code leak
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  1. /*++
  2. Copyright (c) 1992 Microsoft Corporation
  3. Module Name:
  4. elnkhw.h
  5. Abstract:
  6. Hardware specific values for the 3Com Etherlink/MC and Etherlink 16
  7. NDIS 3.0 driver.
  8. Author:
  9. Johnson R. Apacible (JohnsonA) 9-June-1991
  10. Environment:
  11. This driver is expected to work in DOS and NT at the equivalent
  12. of kernel mode.
  13. Architecturally, there is an assumption in this driver that we are
  14. on a little endian machine.
  15. Notes:
  16. optional-notes
  17. Revision History:
  18. --*/
  19. #ifndef _ELNKHARDWARE_
  20. #define _ELNKHARDWARE_
  21. #include <switch.h>
  22. #define MINIMUM_ETHERNET_PACKET_SIZE ((UINT)60) //64 if FCS included
  23. #define MAXIMUM_ETHERNET_PACKET_SIZE ((UINT)1514)
  24. #define ELNK_OFFSET_TO_NEXT_BUFFER ((UINT)1520)
  25. #define MAXIMUM_CARD_ADDRESS 0xffffff
  26. #if ELNKMC
  27. #define ELNKMC_ADAPTER_ID 0x6042
  28. //
  29. // Elnkmc defaults
  30. //
  31. #define ELNKMC_NUMBER_OF_RECEIVE_BUFFERS ((UINT)8)
  32. #define ELNKMC_NUMBER_OF_TRANSMIT_BUFFERS ((UINT)2)
  33. #define ELNKMC_MULTICAST_BLOCK_INDEX ELNKMC_NUMBER_OF_TRANSMIT_BUFFERS
  34. #else
  35. //
  36. // Elnk16 Defaults
  37. //
  38. #define ELNK16_DEFAULT_IOBASE 0x300
  39. #define ELNK16_DEFAULT_INTERRUPT_VECTOR 5
  40. #define ELNK16_DEFAULT_WINBASE 0xD0000
  41. #define ELNK16_DEFAULT_WINDOW_SIZE 0x8000
  42. //
  43. // Number of receive and transmit buffers for the different Etherlink 16
  44. // configurations
  45. //
  46. #define ELNK16_16K_TRANSMITS ((UINT)2)
  47. #define ELNK16_16K_RECEIVES ((UINT)8)
  48. #define ELNK16_32K_TRANSMITS ((UINT)5)
  49. #define ELNK16_32K_RECEIVES ((UINT)16)
  50. #define ELNK16_48K_TRANSMITS ((UINT)7)
  51. #define ELNK16_48K_RECEIVES ((UINT)24)
  52. #define ELNK16_64K_TRANSMITS ((UINT)10)
  53. #define ELNK16_64K_RECEIVES ((UINT)32)
  54. #endif
  55. //
  56. // Common Card Registers, these are offsets from Adapter->IoBase
  57. //
  58. #define ELNK_STATION_ID 0x00
  59. #define ELNK_CSR 0x06
  60. #if ELNKMC
  61. //
  62. // Elnkmc Card Register
  63. //
  64. #define ELNKMC_REVISION_LEVEL 0x07
  65. #else
  66. //
  67. // Elnk16 Card Registers, these are offsets from Adapter->IoBase
  68. //
  69. #define ELNK16_3COM 0x00
  70. #define ELNK16_INTCLR 0x0A
  71. #define ELNK16_CAR 0x0B
  72. #define ELNK16_ROM_CONFIG 0x0D
  73. #define ELNK16_RAM_CONFIG 0x0E
  74. #define ELNK16_ICR 0x0F
  75. //
  76. // Etherlink 16 ID Port
  77. //
  78. #define ELNK16_ID_PORT 0x100
  79. #endif // ELNKMC
  80. //
  81. // CSR bits
  82. //
  83. #define CSR_BANK_SELECT_MASK 0x03
  84. #define CSR_INTEN 0x04
  85. #define CSR_INT_ACTIVE 0x08
  86. #define CSR_LOOP_BACK_ENABLE 0x20
  87. #define CSR_CA 0x40
  88. #define CSR_RESET 0x80
  89. //
  90. // ROMCR bits
  91. //
  92. #define ROMCR_BNC 0x80
  93. #if ELNKMC
  94. //
  95. // Elnkmc CSR Values
  96. //
  97. #define CSR_DEFAULT CSR_BANK_SELECT_MASK |\
  98. CSR_INTEN |\
  99. CSR_RESET
  100. #else
  101. //
  102. // Elnk16 CSR Values
  103. //
  104. #define CSR_DEFAULT CSR_INTEN |\
  105. CSR_RESET
  106. //
  107. // Elnk16 ICR Values
  108. //
  109. #define ICR_RESET 0x10
  110. #endif
  111. //
  112. // Our buffer sizes.
  113. //
  114. // These are *not* configurable. Portions of the code assumes
  115. // that these buffers can contain *any* legal Ethernet packet.
  116. //
  117. #define ELNK_SIZE_OF_RECEIVE_BUFFERS (MAXIMUM_ETHERNET_PACKET_SIZE)
  118. //
  119. // Miscellaneous Constants
  120. //
  121. #define ELNK_NULL ((USHORT)0xffff)
  122. #define ELNK_EMPTY ((UINT)0xffff)
  123. #define ELNK_IMMEDIATE_DATA_LENGTH ((UINT)64)
  124. #define ELNK_MAXIMUM_MULTICAST 16
  125. //
  126. // Miscellaneous macros
  127. //
  128. #define WRITE_ADAPTER_REGISTER(_Adapter, _Offset, _Value) \
  129. NdisWriteRegisterUshort((PUSHORT)((_Adapter)->SharedRam + \
  130. (_Offset) - (_Adapter)->CardOffset), (_Value))
  131. #define READ_ADAPTER_REGISTER(_Adapter, _Offset, _pValue) \
  132. NdisReadRegisterUshort((PUSHORT) ((_Adapter)->SharedRam + \
  133. (_Offset) - (_Adapter->CardOffset)), (_pValue))
  134. //
  135. // read and writes from ports
  136. //
  137. #define ELNK_READ_UCHAR(_Adapter, _Offset, _pValue) \
  138. NdisReadPortUchar( \
  139. (_Adapter)->NdisAdapterHandle,\
  140. (ULONG)((_Adapter)->IoBase+(_Offset)), \
  141. (PUCHAR)(_pValue) \
  142. )
  143. #define ELNK_WRITE_UCHAR(_Adapter, _Offset, _Value) \
  144. NdisWritePortUchar( \
  145. (_Adapter)->NdisAdapterHandle, \
  146. (ULONG)((_Adapter)->IoBase+(_Offset)), \
  147. (UCHAR) (_Value) \
  148. )
  149. #if ELNKMC
  150. #define ELNKMC_READ_POS(_Offset) \
  151. READ_PORT_UCHAR( \
  152. (PUCHAR)(_Offset) \
  153. )
  154. #define ELNKMC_WRITE_POS(_Offset, _Value) \
  155. WRITE_PORT_UCHAR( \
  156. (PUCHAR) (_Offset), \
  157. (UCHAR) (_Value) \
  158. )
  159. #endif
  160. #define ELNK_DISABLE_INTERRUPT { \
  161. Adapter->CurrentCsr &= ~CSR_INTEN; \
  162. ELNK_WRITE_UCHAR(Adapter, ELNK_CSR, Adapter->CurrentCsr); \
  163. }
  164. #define ELNK_ENABLE_INTERRUPT { \
  165. Adapter->CurrentCsr |= CSR_INTEN; \
  166. ELNK_WRITE_UCHAR(Adapter, ELNK_CSR, Adapter->CurrentCsr); \
  167. }
  168. //
  169. // This pauses execution until a pending command to the adapter
  170. // has been accepted by the 586
  171. //
  172. #define ELNK_WAIT { \
  173. UINT _i; \
  174. USHORT _ScbCmd; \
  175. for (_i = 0; _i <= 20000 ; _i++ ) { \
  176. READ_ADAPTER_REGISTER(Adapter, OFFSET_SCBCMD, &_ScbCmd);\
  177. if (_ScbCmd == 0) { \
  178. break; \
  179. } \
  180. NdisStallExecution(50); \
  181. } \
  182. }
  183. #if ELNKMC
  184. //
  185. // This is the Etherlink/MC Channel Attention macro and is how we
  186. // interrupt the card. We need a 500ns delay between the 2 writes.
  187. //
  188. #define ELNK_CA { \
  189. ELNK_WRITE_UCHAR(Adapter, ELNK_CSR, Adapter->CurrentCsr | CSR_CA); \
  190. NdisStallExecution(1); \
  191. ELNK_WRITE_UCHAR(Adapter, ELNK_CSR, Adapter->CurrentCsr); \
  192. }
  193. #else
  194. //
  195. // This is the Channel Attention macro and is how we interrupt the card.
  196. //
  197. #define ELNK_CA ELNK_WRITE_UCHAR(Adapter, ELNK16_CAR, 0x00)
  198. #endif
  199. //
  200. // Get the card address given the host address
  201. //
  202. #define ELNK_GET_CARD_ADDRESS(_Adapter, _Virtual) (USHORT) \
  203. ((ULONG)(_Virtual) - (ULONG)((_Adapter)->SharedRam) + (_Adapter)->CardOffset)
  204. //
  205. // Get the host offset given card address
  206. //
  207. #define ELNK_GET_HOST_ADDRESS(_Adapter, _CardAddress) ((PUCHAR) \
  208. ((_Adapter)->SharedRam) + (_CardAddress) - (_Adapter)->CardOffset)
  209. #include <82586.h>
  210. //
  211. // MCA stuff for the Etherlink/MC card
  212. //
  213. #if ELNKMC
  214. //
  215. // Use this register to select which channel (slot) is being configured
  216. //
  217. #define POS_CHANNEL_SELECT 0x96
  218. //
  219. // or this with the channel number to select new channel
  220. //
  221. #define POS_NEW_CHANNEL_CODE 0x08
  222. //
  223. // each card has an ID that can be used to identify it
  224. //
  225. #define POS_CARD_ID_1 0x100
  226. #define POS_CARD_ID_2 0x101
  227. //
  228. // Etherlink MCA card ID
  229. //
  230. #define ELNKMC_CARD_ID_1 ((UCHAR)0x42)
  231. #define ELNKMC_CARD_ID_2 ((UCHAR)0x60)
  232. //
  233. // Card specific registers
  234. //
  235. #define POS_CARD_REGISTER_1 0x102
  236. #define POS_CARD_REGISTER_2 0x103
  237. //
  238. // register one bits
  239. //
  240. #define REG1_CARD_ENABLE 0x01
  241. #define REG1_IO_BASE_MASK 0x06
  242. #define REG1_RAM_BASE_MASK 0x18
  243. #define REG1_ON_BOARD_TRANSCEIVER 0x20
  244. #define REG1_INTERRUPT_LEVEL_MASK 0xC0
  245. //
  246. // register 2 (used for setting system interrupt level)
  247. //
  248. #define REG2_INTERRUPT_LEVEL_MASK 0x0F
  249. //
  250. // Misc defines
  251. //
  252. #define MCA_MAX_NUMBER_OF_CHANNELS 0x08
  253. #endif
  254. #endif // _ELNKHARDWARE_