Leaked source code of windows server 2003
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826 lines
24 KiB

  1. #if 1 // The following includes are used when building with the microsoft internal build tree.
  2. #include <nt.h>
  3. #include <ntrtl.h>
  4. #include <nturtl.h>
  5. #include <windows.h>
  6. #else // These headers are used when building with the microsoft DDK.
  7. #include <ntddk.h>
  8. #include <windef.h>
  9. #include <winerror.h>
  10. #endif
  11. #include <stdio.h>
  12. #include <stdlib.h>
  13. #include <string.h>
  14. #include <ntddnetd.h>
  15. #include <ncnet.h>
  16. #include <netdet.h>
  17. BOOLEAN
  18. Nia35DetInit(
  19. IN HANDLE hModule,
  20. IN DWORD dwReason,
  21. IN DWORD dwReserved
  22. )
  23. /*++
  24. Routine Description:
  25. This routine is the entry point into the detection dll.
  26. This routine only return "TRUE".
  27. ++*/
  28. {
  29. return (TRUE);
  30. }
  31. ULONG
  32. Nia35NextIoAddress(
  33. IN ULONG IoBaseAddress
  34. )
  35. /*++
  36. Routine Description:
  37. This routine provide next I/O address for detect PC-9801-107/108.
  38. ++*/
  39. {
  40. switch(IoBaseAddress){
  41. case 0x0770:
  42. return (0x2770);
  43. case 0x2770:
  44. return (0x4770);
  45. case 0x4770:
  46. return (0x6770);
  47. default:
  48. return (0xffff);
  49. }
  50. }
  51. VOID
  52. Nia35CardSetup(
  53. IN INTERFACE_TYPE InterfaceType,
  54. IN ULONG BusNumber,
  55. IN ULONG IoBaseAddress,
  56. OUT PULONG MemoryBaseAddress,
  57. IN BOOLEAN EightBitSlot
  58. )
  59. /*++
  60. Routine Description:
  61. Sets up the card, using the sequence given in the Etherlink II
  62. technical reference.
  63. Arguments:
  64. InterfaceType - The type of bus, ISA or EISA.
  65. BusNumber - The bus number in the system.
  66. IoBaseAddress - The IO port address of the card.
  67. MemoryBaseAddress - Pointer to store the base address of card memory.
  68. EightBitSlot - TRUE if the adapter is in an 8-bit slot.
  69. Return Value:
  70. None.
  71. --*/
  72. {
  73. UINT i;
  74. UCHAR Tmp;
  75. NTSTATUS NtStatus;
  76. LARGE_INTEGER Delay;
  77. *MemoryBaseAddress = 0;
  78. // Stop the card.
  79. NtStatus = NDetWritePortUchar(InterfaceType,
  80. BusNumber,
  81. IoBaseAddress,
  82. 0x21); // STOP | ABORT_DMA
  83. if(!NT_SUCCESS(NtStatus)){
  84. return;
  85. }
  86. // Initialize the Data Configuration register.
  87. NtStatus = NDetWritePortUchar(InterfaceType,
  88. BusNumber,
  89. IoBaseAddress + 0x100c, // NIC_DATA_CONFIG
  90. 0x50); // DCR_AUTO_INIT | DCR_FIFO_8_BYTE
  91. if(!NT_SUCCESS(NtStatus)){
  92. return;
  93. }
  94. // Set Xmit start location
  95. NtStatus = NDetWritePortUchar(InterfaceType,
  96. BusNumber,
  97. IoBaseAddress + 0x0008, // NIC_XMIT_START
  98. 0xA0);
  99. if(!NT_SUCCESS(NtStatus)){
  100. return;
  101. }
  102. // Set Xmit configuration
  103. NtStatus = NDetWritePortUchar(InterfaceType,
  104. BusNumber,
  105. IoBaseAddress + 0x100a, // NIC_XMIT_CONFIG
  106. 0x0);
  107. if(!NT_SUCCESS(NtStatus)){
  108. return;
  109. }
  110. // Set Receive configuration
  111. NtStatus = NDetWritePortUchar(InterfaceType,
  112. BusNumber,
  113. IoBaseAddress + 0x1008, // NIC_RCV_CONFIG
  114. 0);
  115. if(!NT_SUCCESS(NtStatus)){
  116. return;
  117. }
  118. // Set Receive start
  119. NtStatus = NDetWritePortUchar(InterfaceType,
  120. BusNumber,
  121. IoBaseAddress + 0x0002, // NIC_PAGE_START
  122. 0x4);
  123. if(!NT_SUCCESS(NtStatus)){
  124. return;
  125. }
  126. // Set Receive end
  127. NtStatus = NDetWritePortUchar(InterfaceType,
  128. BusNumber,
  129. IoBaseAddress + 0x0004, // NIC_PAGE_STOP
  130. 0xFF);
  131. if(!NT_SUCCESS(NtStatus)){
  132. return;
  133. }
  134. // Set Receive boundary
  135. NtStatus = NDetWritePortUchar(InterfaceType,
  136. BusNumber,
  137. IoBaseAddress + 0x0006, // NIC_BOUNDARY
  138. 0x4);
  139. if(!NT_SUCCESS(NtStatus)){
  140. return;
  141. }
  142. // Set Xmit bytes
  143. NtStatus = NDetWritePortUchar(InterfaceType,
  144. BusNumber,
  145. IoBaseAddress + 0x000a, // NIC_XMIT_COUNT_LSB
  146. 0x3C);
  147. if(!NT_SUCCESS(NtStatus)){
  148. return;
  149. }
  150. NtStatus = NDetWritePortUchar(InterfaceType,
  151. BusNumber,
  152. IoBaseAddress + 0x000c, // NIC_XMIT_COUNT_MSB
  153. 0x0);
  154. if(!NT_SUCCESS(NtStatus)){
  155. return;
  156. }
  157. // Pause
  158. // Wait for reset to complete. (100 ms)
  159. Delay.LowPart = 100000;
  160. Delay.HighPart = 0;
  161. NtDelayExecution(FALSE, &Delay);
  162. // Ack all interrupts that we might have produced
  163. NtStatus = NDetWritePortUchar(InterfaceType,
  164. BusNumber,
  165. IoBaseAddress + 0x000e, // NIC_INTR_STATUS
  166. 0xFF);
  167. if(!NT_SUCCESS(NtStatus)){
  168. return;
  169. }
  170. // Change to page 1
  171. NtStatus = NDetWritePortUchar(InterfaceType,
  172. BusNumber,
  173. IoBaseAddress,
  174. 0x61); // CR_PAGE1 | CR_STOP
  175. if(!NT_SUCCESS(NtStatus)){
  176. return;
  177. }
  178. // Set current
  179. NtStatus = NDetWritePortUchar(InterfaceType,
  180. BusNumber,
  181. IoBaseAddress + 0x000e, // NIC_CURRENT
  182. 0x4);
  183. if(!NT_SUCCESS(NtStatus)){
  184. return;
  185. }
  186. // Back to page 0
  187. NtStatus = NDetWritePortUchar(InterfaceType,
  188. BusNumber,
  189. IoBaseAddress,
  190. 0x21); // CR_PAGE0 | CR_STOP
  191. if(!NT_SUCCESS(NtStatus)){
  192. return;
  193. }
  194. // Pause
  195. Delay.LowPart = 2000;
  196. Delay.HighPart = 0;
  197. NtDelayExecution(FALSE, &Delay);
  198. // Do initialization errata
  199. NtStatus = NDetWritePortUchar(InterfaceType,
  200. BusNumber,
  201. IoBaseAddress + 0x1004, // NIC_RMT_COUNT_LSB
  202. 55);
  203. if(!NT_SUCCESS(NtStatus)){
  204. return;
  205. }
  206. // Reset the chip
  207. NtStatus = NDetReadPortUchar(InterfaceType,
  208. BusNumber,
  209. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  210. &Tmp);
  211. if(!NT_SUCCESS(NtStatus)){
  212. return;
  213. }
  214. NtStatus = NDetWritePortUchar(InterfaceType,
  215. BusNumber,
  216. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  217. 0xFF);
  218. if(!NT_SUCCESS(NtStatus)){
  219. return;
  220. }
  221. // Start the chip
  222. NtStatus = NDetWritePortUchar(InterfaceType,
  223. BusNumber,
  224. IoBaseAddress,
  225. 0x22);
  226. if(!NT_SUCCESS(NtStatus)){
  227. return;
  228. }
  229. // Mask Interrupts
  230. NtStatus = NDetWritePortUchar(InterfaceType,
  231. BusNumber,
  232. IoBaseAddress + 0x100e, // NIC_INTR_MASK
  233. 0xFF);
  234. if(!NT_SUCCESS(NtStatus)){
  235. return;
  236. }
  237. if(EightBitSlot){
  238. NtStatus = NDetWritePortUchar(InterfaceType,
  239. BusNumber,
  240. IoBaseAddress + 0x100c, // NIC_DATA_CONFIG
  241. 0x48); // DCR_FIFO_8_BYTE | DCR_NORMAL | DCR_BYTE_WIDE
  242. }else{
  243. NtStatus = NDetWritePortUchar(InterfaceType,
  244. BusNumber,
  245. IoBaseAddress + 0x100c, // NIC_DATA_CONFIG
  246. 0x49); // DCR_FIFO_8_BYTE | DCR_NORMAL | DCR_WORD_WIDE
  247. }
  248. if(!NT_SUCCESS(NtStatus)){
  249. return;
  250. }
  251. NtStatus = NDetWritePortUchar(InterfaceType,
  252. BusNumber,
  253. IoBaseAddress + 0x100a, // NIC_XMIT_CONFIG
  254. 0);
  255. if(!NT_SUCCESS(NtStatus)){
  256. return;
  257. }
  258. NtStatus = NDetWritePortUchar(InterfaceType,
  259. BusNumber,
  260. IoBaseAddress + 0x1008, // NIC_RCV_CONFIG
  261. 0);
  262. if(!NT_SUCCESS(NtStatus)){
  263. return;
  264. }
  265. NtStatus = NDetWritePortUchar(InterfaceType,
  266. BusNumber,
  267. IoBaseAddress + 0x000e, // NIC_INTR_STATUS
  268. 0xFF);
  269. if(!NT_SUCCESS(NtStatus)){
  270. return;
  271. }
  272. NtStatus = NDetWritePortUchar(InterfaceType,
  273. BusNumber,
  274. IoBaseAddress,
  275. 0x21); // CR_NO_DMA | CR_STOP
  276. if(!NT_SUCCESS(NtStatus)){
  277. return;
  278. }
  279. NtStatus = NDetWritePortUchar(InterfaceType,
  280. BusNumber,
  281. IoBaseAddress + 0x1004, // NIC_RMT_COUNT_LSB
  282. 0);
  283. if(!NT_SUCCESS(NtStatus)){
  284. return;
  285. }
  286. NtStatus = NDetWritePortUchar(InterfaceType,
  287. BusNumber,
  288. IoBaseAddress + 0x1006, // NIC_RMT_COUNT_MSB
  289. 0);
  290. if(!NT_SUCCESS(NtStatus)){
  291. return;
  292. }
  293. // Wait for STOP to complete
  294. i = 0xFF;
  295. while (--i){
  296. NtStatus = NDetReadPortUchar(InterfaceType,
  297. BusNumber,
  298. IoBaseAddress + 0x000e, // NIC_INTR_STATUS
  299. &Tmp);
  300. if(!NT_SUCCESS(NtStatus)){
  301. return;
  302. }
  303. // ISR_RESET
  304. if(Tmp & 0x80){
  305. break;
  306. }
  307. }
  308. // Put card in loopback mode
  309. NtStatus = NDetWritePortUchar(InterfaceType,
  310. BusNumber,
  311. IoBaseAddress + 0x100a, // NIC_XMIT_CONFIG
  312. 0x2); // TCR_LOOPBACK
  313. if(NtStatus != STATUS_SUCCESS){
  314. return;
  315. }
  316. NtStatus = NDetWritePortUchar(InterfaceType,
  317. BusNumber,
  318. IoBaseAddress,
  319. 0x22); // CR_NO_DMA | CR_START
  320. if(NtStatus != STATUS_SUCCESS){
  321. return;
  322. }
  323. // ... but it is still in loopback mode.
  324. return;
  325. }
  326. NTSTATUS
  327. Nia35CardSlotTest(
  328. IN INTERFACE_TYPE InterfaceType,
  329. IN ULONG BusNumber,
  330. IN ULONG IoBaseAddress,
  331. OUT PBOOLEAN EightBitSlot
  332. )
  333. /*++
  334. Routine Description:
  335. Checks if the card is in an 8 or 16 bit slot and sets a flag in the
  336. adapter structure.
  337. Arguments:
  338. InterfaceType - The type of bus, ISA or EISA.
  339. BusNumber - The bus number in the system.
  340. IoBaseAddress - The IO port address of the card.
  341. EightBitSlot - Result of test.
  342. Return Value:
  343. TRUE, if all goes well, else FALSE.
  344. --*/
  345. {
  346. UCHAR Tmp;
  347. UCHAR RomCopy[32];
  348. UCHAR i;
  349. NTSTATUS NtStatus;
  350. LARGE_INTEGER Delay;
  351. // Reset the chip
  352. NtStatus = NDetReadPortUchar(InterfaceType,
  353. BusNumber,
  354. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  355. &Tmp);
  356. if(!NT_SUCCESS(NtStatus)){
  357. return(NtStatus);
  358. }
  359. NtStatus = NDetWritePortUchar(InterfaceType,
  360. BusNumber,
  361. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  362. 0xFF);
  363. if(!NT_SUCCESS(NtStatus)){
  364. return(NtStatus);
  365. }
  366. // Go to page 0 and stop
  367. NtStatus = NDetWritePortUchar(InterfaceType,
  368. BusNumber,
  369. IoBaseAddress,
  370. 0x21); // CR_STOP | CR_NO_DMA
  371. if(!NT_SUCCESS(NtStatus)){
  372. return(NtStatus);
  373. }
  374. // Pause
  375. Delay.LowPart = 2000;
  376. Delay.HighPart = 0;
  377. NtDelayExecution(FALSE, &Delay);
  378. // Setup to read from ROM
  379. NtStatus = NDetWritePortUchar(InterfaceType,
  380. BusNumber,
  381. IoBaseAddress + 0x100c, // NIC_DATA_CONFIG
  382. 0x48); // DCR_BYTE_WIDE | DCR_FIFO_8_BYTE | DCR_NORMAL
  383. if(!NT_SUCCESS(NtStatus)){
  384. return(NtStatus);
  385. }
  386. NtStatus = NDetWritePortUchar(InterfaceType,
  387. BusNumber,
  388. IoBaseAddress + 0x100e, // NIC_INTR_MASK
  389. 0x0);
  390. if(!NT_SUCCESS(NtStatus)){
  391. return(NtStatus);
  392. }
  393. // Ack any interrupts that may be hanging around
  394. NtStatus = NDetWritePortUchar(InterfaceType,
  395. BusNumber,
  396. IoBaseAddress + 0x000e, // NIC_INTR_STATUS
  397. 0xFF);
  398. if(!NT_SUCCESS(NtStatus)){
  399. return(NtStatus);
  400. }
  401. NtStatus = NDetWritePortUchar(InterfaceType,
  402. BusNumber,
  403. IoBaseAddress + 0x1000, // NIC_RMT_ADDR_LSB
  404. 0x0);
  405. if(!NT_SUCCESS(NtStatus)){
  406. return(NtStatus);
  407. }
  408. NtStatus = NDetWritePortUchar(InterfaceType,
  409. BusNumber,
  410. IoBaseAddress + 0x1002, // NIC_RMT_ADDR_MSB,
  411. 0x0);
  412. if(!NT_SUCCESS(NtStatus)){
  413. return(NtStatus);
  414. }
  415. NtStatus = NDetWritePortUchar(InterfaceType,
  416. BusNumber,
  417. IoBaseAddress + 0x1004, // NIC_RMT_COUNT_LSB
  418. 32);
  419. if(!NT_SUCCESS(NtStatus)){
  420. return(NtStatus);
  421. }
  422. NtStatus = NDetWritePortUchar(InterfaceType,
  423. BusNumber,
  424. IoBaseAddress + 0x1006, // NIC_RMT_COUNT_MSB
  425. 0x0);
  426. if(!NT_SUCCESS(NtStatus)){
  427. return(NtStatus);
  428. }
  429. NtStatus = NDetWritePortUchar(InterfaceType,
  430. BusNumber,
  431. IoBaseAddress,
  432. 0xA); // CR_DMA_READ | CR_START
  433. if(!NT_SUCCESS(NtStatus)){
  434. return(NtStatus);
  435. }
  436. // Read first 32 bytes in 16 bit mode
  437. for (i = 0; i < 32; i++){
  438. NtStatus = NDetReadPortUchar(InterfaceType,
  439. BusNumber,
  440. ((IoBaseAddress >> 1) & 0xf000) + 0x0888, //NIC_RACK_NIC
  441. RomCopy + i);
  442. if(NtStatus != STATUS_SUCCESS){
  443. return(NtStatus);
  444. }
  445. }
  446. // Reset the chip
  447. NtStatus = NDetReadPortUchar(InterfaceType,
  448. BusNumber,
  449. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  450. &Tmp);
  451. if(NtStatus != STATUS_SUCCESS){
  452. return(NtStatus);
  453. }
  454. NtStatus = NDetWritePortUchar(InterfaceType,
  455. BusNumber,
  456. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  457. 0xFF);
  458. if(NtStatus != STATUS_SUCCESS){
  459. return(NtStatus);
  460. }
  461. // Check ROM for 'B' (byte) or 'W' (word)
  462. for (i = 16; i < 31; i++){
  463. if (((RomCopy[i] == 'B') && (RomCopy[i+1] == 'B')) ||
  464. ((RomCopy[i] == 'W') && (RomCopy[i+1] == 'W'))){
  465. if(RomCopy[i] == 'B'){
  466. *EightBitSlot = TRUE;
  467. }else{
  468. *EightBitSlot = FALSE;
  469. }
  470. // Now check that the address is singular. On an Ne1000 the
  471. // ethernet address is store in offsets 0 thru 5. On the Ne2000 and Nia35
  472. // the address is stored in offsets 0 thru 11, where each byte
  473. // is duplicated.
  474. //
  475. if ((RomCopy[0] == RomCopy[1]) &&
  476. (RomCopy[2] == RomCopy[3]) &&
  477. (RomCopy[4] == RomCopy[5]) &&
  478. (RomCopy[6] == RomCopy[7]) &&
  479. (RomCopy[8] == RomCopy[9]) &&
  480. (RomCopy[10] == RomCopy[11])){
  481. return(STATUS_SUCCESS);
  482. }
  483. return(STATUS_UNSUCCESSFUL);
  484. }
  485. }
  486. // If neither found -- then not an NIA35
  487. return(STATUS_UNSUCCESSFUL);
  488. }
  489. NTSTATUS
  490. FindNia35Adapter(
  491. OUT PMND_ADAPTER_INFO *pDetectedAdapter,
  492. IN INTERFACE_TYPE InterfaceType,
  493. IN ULONG BusNumber,
  494. IN ULONG IoBaseAddress,
  495. IN PWSTR pPnpId
  496. )
  497. {
  498. NTSTATUS NtStatus;
  499. UCHAR Data;
  500. USHORT CheckSum = 0;
  501. USHORT StoredCheckSum;
  502. UINT Place;
  503. UCHAR Interrupt = 0;
  504. HANDLE TrapHandle;
  505. UCHAR InterruptList[4];
  506. UCHAR ResultList[4] = {0};
  507. UINT cResources;
  508. UINT c;
  509. UCHAR Value;
  510. ULONG RamAddr = 0;
  511. do{
  512. // check I/O port range.
  513. NtStatus = NDetCheckPortUsage(InterfaceType,
  514. BusNumber,
  515. IoBaseAddress,
  516. 0x10);
  517. NtStatus |= NDetCheckPortUsage(InterfaceType,
  518. BusNumber,
  519. IoBaseAddress + 0x1000, // upper range
  520. 0x10);
  521. NtStatus |= NDetCheckPortUsage(InterfaceType,
  522. BusNumber,
  523. ((IoBaseAddress >> 1) & 0xf000) + 0x0888, // NIC_RACK_NIC
  524. 0x2);
  525. NtStatus |= NDetCheckPortUsage(InterfaceType,
  526. BusNumber,
  527. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, // NIC_RESET
  528. 0x2);
  529. if(!NT_SUCCESS(NtStatus)){
  530. #if DBG
  531. DbgPrint("FindNia35Adapter : Port range in use. IoBaseAddress = %x\n", IoBaseAddress);
  532. #endif
  533. break;
  534. }
  535. NDetReadPortUchar(InterfaceType,
  536. BusNumber,
  537. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  538. &Value);
  539. NDetWritePortUchar(InterfaceType,
  540. BusNumber,
  541. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  542. 0xFF);
  543. NDetWritePortUchar(InterfaceType,
  544. BusNumber,
  545. IoBaseAddress, // COMMAND
  546. 0x21);
  547. // check interrupt.
  548. InterruptList[0] = 3;
  549. InterruptList[1] = 5;
  550. InterruptList[2] = 6;
  551. InterruptList[3] = 12;
  552. NtStatus = NDetSetInterruptTrap(InterfaceType,
  553. BusNumber,
  554. &TrapHandle,
  555. InterruptList,
  556. 4);
  557. if(NT_SUCCESS(NtStatus)){
  558. NtStatus = Nia35CardSlotTest(InterfaceType,
  559. BusNumber,
  560. IoBaseAddress,
  561. &Value);
  562. if(!NT_SUCCESS(NtStatus)){
  563. NDetRemoveInterruptTrap(TrapHandle);
  564. break;
  565. }
  566. // CardSetup
  567. Nia35CardSetup(InterfaceType,
  568. BusNumber,
  569. IoBaseAddress,
  570. &RamAddr,
  571. Value);
  572. // Check for interrupt.
  573. NtStatus = NDetQueryInterruptTrap(TrapHandle, ResultList, 4);
  574. // Stop the chip.
  575. NDetReadPortUchar(InterfaceType,
  576. BusNumber,
  577. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  578. &Value);
  579. NDetWritePortUchar(InterfaceType,
  580. BusNumber,
  581. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
  582. 0xFF);
  583. NDetWritePortUchar(InterfaceType,
  584. BusNumber,
  585. IoBaseAddress, // COMMAND
  586. 0x21);
  587. NtStatus = NDetRemoveInterruptTrap(TrapHandle);
  588. if(!NT_SUCCESS(NtStatus)){
  589. break;
  590. }
  591. for(c=0 ; c<4 ; c++){
  592. if((ResultList[c] == 1) || (ResultList[c] == 2)){
  593. Interrupt = InterruptList[c];
  594. break;
  595. }
  596. }
  597. }
  598. // Allocate the adapter information.
  599. NtStatus = NetDetectAllocAdapterInfo(pDetectedAdapter,
  600. InterfaceType,
  601. BusNumber,
  602. pPnpId,
  603. 0,
  604. 0,
  605. 0,
  606. 2);
  607. if (!NT_SUCCESS(NtStatus)){
  608. #if DBG
  609. DbgPrint("FindNia35Adapter: Unable to allocate adapter info\n");
  610. #endif
  611. break;
  612. }
  613. // Initialize the resources.
  614. NetDetectInitializeResource(*pDetectedAdapter,
  615. 0,
  616. MndResourcePort,
  617. IoBaseAddress,
  618. 0x10);
  619. NetDetectInitializeResource(*pDetectedAdapter,
  620. 0,
  621. MndResourcePort,
  622. IoBaseAddress + 0x1000,
  623. 0x10);
  624. NetDetectInitializeResource(*pDetectedAdapter,
  625. 0,
  626. MndResourcePort,
  627. ((IoBaseAddress >> 1) & 0xf000) + 0x0888, // NIC_RACK_NIC
  628. 0x2);
  629. NetDetectInitializeResource(*pDetectedAdapter,
  630. 0,
  631. MndResourcePort,
  632. ((IoBaseAddress >> 1) & 0xf000) + 0x088a, // NIC_RESET
  633. 0x2);
  634. if(Interrupt != 0){
  635. NetDetectInitializeResource(*pDetectedAdapter,
  636. 1,
  637. MndResourceInterrupt,
  638. Interrupt,
  639. MND_RESOURCE_INTERRUPT_LATCHED);
  640. }
  641. NtStatus = STATUS_SUCCESS;
  642. }while(FALSE);
  643. return (NtStatus);
  644. }
  645. NTSTATUS
  646. WINAPI
  647. FindAdapterHandler(
  648. IN OUT PMND_ADAPTER_INFO *pDetectedAdapter,
  649. IN INTERFACE_TYPE InterfaceType,
  650. IN ULONG BusNumber,
  651. IN PDET_ADAPTER_INFO pAdapterInfo,
  652. IN PDET_CONTEXT pDetContext
  653. )
  654. /*++
  655. Routine Description:
  656. Arguments:
  657. Return Value:
  658. --*/
  659. {
  660. NTSTATUS NtStatus;
  661. ULONG IoBaseAddress;
  662. if(InterfaceType != Isa){
  663. return(STATUS_INVALID_PARAMETER);
  664. }
  665. // Are we looking for the first adapter?
  666. if (fDET_CONTEXT_FIND_FIRST == (pDetContext->Flags & fDET_CONTEXT_FIND_FIRST)){
  667. // Initialize the context information so that we start detecting
  668. // at the initialize port range.
  669. pDetContext->ISA.IoBaseAddress = 0x0770;
  670. }
  671. for (IoBaseAddress = pDetContext->ISA.IoBaseAddress;
  672. IoBaseAddress <= 0x6770;
  673. IoBaseAddress = Nia35NextIoAddress(IoBaseAddress)){
  674. // Look for the ee16 adapter at the current port.
  675. NtStatus = FindNia35Adapter(pDetectedAdapter,
  676. InterfaceType,
  677. BusNumber,
  678. IoBaseAddress,
  679. pAdapterInfo->PnPId);
  680. if (NT_SUCCESS(NtStatus)){
  681. // We found an adapter. Save the next IO address to check.
  682. pDetContext->ISA.IoBaseAddress = Nia35NextIoAddress(IoBaseAddress);
  683. break;
  684. }
  685. }
  686. if (0xffff == IoBaseAddress){
  687. NtStatus = STATUS_NO_MORE_ENTRIES;
  688. }
  689. return(NtStatus);
  690. }