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826 lines
24 KiB
826 lines
24 KiB
#if 1 // The following includes are used when building with the microsoft internal build tree.
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#include <nt.h>
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#include <ntrtl.h>
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#include <nturtl.h>
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#include <windows.h>
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#else // These headers are used when building with the microsoft DDK.
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#include <ntddk.h>
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#include <windef.h>
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#include <winerror.h>
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#endif
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <ntddnetd.h>
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#include <ncnet.h>
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#include <netdet.h>
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BOOLEAN
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Nia35DetInit(
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IN HANDLE hModule,
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IN DWORD dwReason,
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IN DWORD dwReserved
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)
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/*++
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Routine Description:
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This routine is the entry point into the detection dll.
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This routine only return "TRUE".
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++*/
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{
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return (TRUE);
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}
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ULONG
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Nia35NextIoAddress(
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IN ULONG IoBaseAddress
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)
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/*++
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Routine Description:
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This routine provide next I/O address for detect PC-9801-107/108.
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++*/
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{
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switch(IoBaseAddress){
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case 0x0770:
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return (0x2770);
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case 0x2770:
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return (0x4770);
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case 0x4770:
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return (0x6770);
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default:
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return (0xffff);
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}
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}
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VOID
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Nia35CardSetup(
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IN INTERFACE_TYPE InterfaceType,
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IN ULONG BusNumber,
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IN ULONG IoBaseAddress,
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OUT PULONG MemoryBaseAddress,
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IN BOOLEAN EightBitSlot
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)
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/*++
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Routine Description:
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Sets up the card, using the sequence given in the Etherlink II
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technical reference.
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Arguments:
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InterfaceType - The type of bus, ISA or EISA.
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BusNumber - The bus number in the system.
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IoBaseAddress - The IO port address of the card.
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MemoryBaseAddress - Pointer to store the base address of card memory.
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EightBitSlot - TRUE if the adapter is in an 8-bit slot.
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Return Value:
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None.
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--*/
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{
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UINT i;
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UCHAR Tmp;
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NTSTATUS NtStatus;
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LARGE_INTEGER Delay;
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*MemoryBaseAddress = 0;
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// Stop the card.
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress,
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0x21); // STOP | ABORT_DMA
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Initialize the Data Configuration register.
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x100c, // NIC_DATA_CONFIG
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0x50); // DCR_AUTO_INIT | DCR_FIFO_8_BYTE
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Set Xmit start location
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x0008, // NIC_XMIT_START
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0xA0);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Set Xmit configuration
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x100a, // NIC_XMIT_CONFIG
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0x0);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Set Receive configuration
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x1008, // NIC_RCV_CONFIG
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0);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Set Receive start
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x0002, // NIC_PAGE_START
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0x4);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Set Receive end
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x0004, // NIC_PAGE_STOP
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0xFF);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Set Receive boundary
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x0006, // NIC_BOUNDARY
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0x4);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Set Xmit bytes
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x000a, // NIC_XMIT_COUNT_LSB
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0x3C);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x000c, // NIC_XMIT_COUNT_MSB
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0x0);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Pause
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// Wait for reset to complete. (100 ms)
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Delay.LowPart = 100000;
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Delay.HighPart = 0;
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NtDelayExecution(FALSE, &Delay);
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// Ack all interrupts that we might have produced
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x000e, // NIC_INTR_STATUS
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0xFF);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Change to page 1
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress,
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0x61); // CR_PAGE1 | CR_STOP
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Set current
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x000e, // NIC_CURRENT
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0x4);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Back to page 0
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress,
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0x21); // CR_PAGE0 | CR_STOP
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Pause
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Delay.LowPart = 2000;
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Delay.HighPart = 0;
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NtDelayExecution(FALSE, &Delay);
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// Do initialization errata
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x1004, // NIC_RMT_COUNT_LSB
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55);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Reset the chip
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NtStatus = NDetReadPortUchar(InterfaceType,
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BusNumber,
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((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
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&Tmp);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
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0xFF);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Start the chip
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress,
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0x22);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Mask Interrupts
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x100e, // NIC_INTR_MASK
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0xFF);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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if(EightBitSlot){
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x100c, // NIC_DATA_CONFIG
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0x48); // DCR_FIFO_8_BYTE | DCR_NORMAL | DCR_BYTE_WIDE
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}else{
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x100c, // NIC_DATA_CONFIG
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0x49); // DCR_FIFO_8_BYTE | DCR_NORMAL | DCR_WORD_WIDE
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}
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x100a, // NIC_XMIT_CONFIG
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0);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x1008, // NIC_RCV_CONFIG
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0);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x000e, // NIC_INTR_STATUS
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0xFF);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress,
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0x21); // CR_NO_DMA | CR_STOP
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x1004, // NIC_RMT_COUNT_LSB
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0);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x1006, // NIC_RMT_COUNT_MSB
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0);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// Wait for STOP to complete
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i = 0xFF;
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while (--i){
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NtStatus = NDetReadPortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x000e, // NIC_INTR_STATUS
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&Tmp);
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if(!NT_SUCCESS(NtStatus)){
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return;
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}
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// ISR_RESET
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if(Tmp & 0x80){
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break;
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}
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}
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// Put card in loopback mode
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress + 0x100a, // NIC_XMIT_CONFIG
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0x2); // TCR_LOOPBACK
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if(NtStatus != STATUS_SUCCESS){
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return;
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}
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NtStatus = NDetWritePortUchar(InterfaceType,
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BusNumber,
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IoBaseAddress,
|
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0x22); // CR_NO_DMA | CR_START
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if(NtStatus != STATUS_SUCCESS){
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return;
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}
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// ... but it is still in loopback mode.
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return;
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}
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NTSTATUS
|
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Nia35CardSlotTest(
|
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IN INTERFACE_TYPE InterfaceType,
|
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IN ULONG BusNumber,
|
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IN ULONG IoBaseAddress,
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OUT PBOOLEAN EightBitSlot
|
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)
|
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/*++
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Routine Description:
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Checks if the card is in an 8 or 16 bit slot and sets a flag in the
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adapter structure.
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Arguments:
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InterfaceType - The type of bus, ISA or EISA.
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BusNumber - The bus number in the system.
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IoBaseAddress - The IO port address of the card.
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EightBitSlot - Result of test.
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Return Value:
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TRUE, if all goes well, else FALSE.
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--*/
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{
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UCHAR Tmp;
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UCHAR RomCopy[32];
|
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UCHAR i;
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NTSTATUS NtStatus;
|
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LARGE_INTEGER Delay;
|
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|
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// Reset the chip
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NtStatus = NDetReadPortUchar(InterfaceType,
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BusNumber,
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((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
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&Tmp);
|
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if(!NT_SUCCESS(NtStatus)){
|
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return(NtStatus);
|
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}
|
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|
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NtStatus = NDetWritePortUchar(InterfaceType,
|
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BusNumber,
|
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((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
|
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0xFF);
|
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if(!NT_SUCCESS(NtStatus)){
|
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return(NtStatus);
|
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}
|
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|
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// Go to page 0 and stop
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NtStatus = NDetWritePortUchar(InterfaceType,
|
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BusNumber,
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IoBaseAddress,
|
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0x21); // CR_STOP | CR_NO_DMA
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|
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if(!NT_SUCCESS(NtStatus)){
|
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return(NtStatus);
|
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}
|
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|
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// Pause
|
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Delay.LowPart = 2000;
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Delay.HighPart = 0;
|
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NtDelayExecution(FALSE, &Delay);
|
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|
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// Setup to read from ROM
|
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NtStatus = NDetWritePortUchar(InterfaceType,
|
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BusNumber,
|
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IoBaseAddress + 0x100c, // NIC_DATA_CONFIG
|
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0x48); // DCR_BYTE_WIDE | DCR_FIFO_8_BYTE | DCR_NORMAL
|
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|
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if(!NT_SUCCESS(NtStatus)){
|
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return(NtStatus);
|
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}
|
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|
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NtStatus = NDetWritePortUchar(InterfaceType,
|
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BusNumber,
|
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IoBaseAddress + 0x100e, // NIC_INTR_MASK
|
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0x0);
|
|
|
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if(!NT_SUCCESS(NtStatus)){
|
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return(NtStatus);
|
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}
|
|
|
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// Ack any interrupts that may be hanging around
|
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NtStatus = NDetWritePortUchar(InterfaceType,
|
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BusNumber,
|
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IoBaseAddress + 0x000e, // NIC_INTR_STATUS
|
|
0xFF);
|
|
|
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if(!NT_SUCCESS(NtStatus)){
|
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return(NtStatus);
|
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}
|
|
|
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NtStatus = NDetWritePortUchar(InterfaceType,
|
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BusNumber,
|
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IoBaseAddress + 0x1000, // NIC_RMT_ADDR_LSB
|
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0x0);
|
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if(!NT_SUCCESS(NtStatus)){
|
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return(NtStatus);
|
|
}
|
|
|
|
NtStatus = NDetWritePortUchar(InterfaceType,
|
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BusNumber,
|
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IoBaseAddress + 0x1002, // NIC_RMT_ADDR_MSB,
|
|
0x0);
|
|
if(!NT_SUCCESS(NtStatus)){
|
|
return(NtStatus);
|
|
}
|
|
|
|
NtStatus = NDetWritePortUchar(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress + 0x1004, // NIC_RMT_COUNT_LSB
|
|
32);
|
|
if(!NT_SUCCESS(NtStatus)){
|
|
return(NtStatus);
|
|
}
|
|
|
|
NtStatus = NDetWritePortUchar(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress + 0x1006, // NIC_RMT_COUNT_MSB
|
|
0x0);
|
|
if(!NT_SUCCESS(NtStatus)){
|
|
return(NtStatus);
|
|
}
|
|
|
|
NtStatus = NDetWritePortUchar(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress,
|
|
0xA); // CR_DMA_READ | CR_START
|
|
|
|
if(!NT_SUCCESS(NtStatus)){
|
|
return(NtStatus);
|
|
}
|
|
|
|
// Read first 32 bytes in 16 bit mode
|
|
for (i = 0; i < 32; i++){
|
|
NtStatus = NDetReadPortUchar(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x0888, //NIC_RACK_NIC
|
|
RomCopy + i);
|
|
|
|
if(NtStatus != STATUS_SUCCESS){
|
|
return(NtStatus);
|
|
}
|
|
}
|
|
|
|
// Reset the chip
|
|
NtStatus = NDetReadPortUchar(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
|
|
&Tmp);
|
|
|
|
if(NtStatus != STATUS_SUCCESS){
|
|
return(NtStatus);
|
|
}
|
|
|
|
NtStatus = NDetWritePortUchar(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
|
|
0xFF);
|
|
if(NtStatus != STATUS_SUCCESS){
|
|
return(NtStatus);
|
|
}
|
|
|
|
// Check ROM for 'B' (byte) or 'W' (word)
|
|
for (i = 16; i < 31; i++){
|
|
if (((RomCopy[i] == 'B') && (RomCopy[i+1] == 'B')) ||
|
|
((RomCopy[i] == 'W') && (RomCopy[i+1] == 'W'))){
|
|
if(RomCopy[i] == 'B'){
|
|
*EightBitSlot = TRUE;
|
|
}else{
|
|
*EightBitSlot = FALSE;
|
|
}
|
|
|
|
// Now check that the address is singular. On an Ne1000 the
|
|
// ethernet address is store in offsets 0 thru 5. On the Ne2000 and Nia35
|
|
// the address is stored in offsets 0 thru 11, where each byte
|
|
// is duplicated.
|
|
//
|
|
if ((RomCopy[0] == RomCopy[1]) &&
|
|
(RomCopy[2] == RomCopy[3]) &&
|
|
(RomCopy[4] == RomCopy[5]) &&
|
|
(RomCopy[6] == RomCopy[7]) &&
|
|
(RomCopy[8] == RomCopy[9]) &&
|
|
(RomCopy[10] == RomCopy[11])){
|
|
return(STATUS_SUCCESS);
|
|
}
|
|
|
|
return(STATUS_UNSUCCESSFUL);
|
|
}
|
|
}
|
|
|
|
// If neither found -- then not an NIA35
|
|
return(STATUS_UNSUCCESSFUL);
|
|
}
|
|
|
|
|
|
|
|
NTSTATUS
|
|
FindNia35Adapter(
|
|
OUT PMND_ADAPTER_INFO *pDetectedAdapter,
|
|
IN INTERFACE_TYPE InterfaceType,
|
|
IN ULONG BusNumber,
|
|
IN ULONG IoBaseAddress,
|
|
IN PWSTR pPnpId
|
|
)
|
|
{
|
|
NTSTATUS NtStatus;
|
|
UCHAR Data;
|
|
USHORT CheckSum = 0;
|
|
USHORT StoredCheckSum;
|
|
UINT Place;
|
|
UCHAR Interrupt = 0;
|
|
HANDLE TrapHandle;
|
|
UCHAR InterruptList[4];
|
|
UCHAR ResultList[4] = {0};
|
|
UINT cResources;
|
|
UINT c;
|
|
UCHAR Value;
|
|
ULONG RamAddr = 0;
|
|
|
|
do{
|
|
|
|
// check I/O port range.
|
|
NtStatus = NDetCheckPortUsage(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress,
|
|
0x10);
|
|
NtStatus |= NDetCheckPortUsage(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress + 0x1000, // upper range
|
|
0x10);
|
|
NtStatus |= NDetCheckPortUsage(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x0888, // NIC_RACK_NIC
|
|
0x2);
|
|
NtStatus |= NDetCheckPortUsage(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x088a, // NIC_RESET
|
|
0x2);
|
|
|
|
if(!NT_SUCCESS(NtStatus)){
|
|
#if DBG
|
|
DbgPrint("FindNia35Adapter : Port range in use. IoBaseAddress = %x\n", IoBaseAddress);
|
|
#endif
|
|
break;
|
|
}
|
|
|
|
NDetReadPortUchar(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
|
|
&Value);
|
|
NDetWritePortUchar(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
|
|
0xFF);
|
|
NDetWritePortUchar(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress, // COMMAND
|
|
0x21);
|
|
|
|
// check interrupt.
|
|
InterruptList[0] = 3;
|
|
InterruptList[1] = 5;
|
|
InterruptList[2] = 6;
|
|
InterruptList[3] = 12;
|
|
|
|
NtStatus = NDetSetInterruptTrap(InterfaceType,
|
|
BusNumber,
|
|
&TrapHandle,
|
|
InterruptList,
|
|
4);
|
|
if(NT_SUCCESS(NtStatus)){
|
|
|
|
NtStatus = Nia35CardSlotTest(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress,
|
|
&Value);
|
|
if(!NT_SUCCESS(NtStatus)){
|
|
NDetRemoveInterruptTrap(TrapHandle);
|
|
break;
|
|
}
|
|
|
|
// CardSetup
|
|
Nia35CardSetup(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress,
|
|
&RamAddr,
|
|
Value);
|
|
|
|
// Check for interrupt.
|
|
NtStatus = NDetQueryInterruptTrap(TrapHandle, ResultList, 4);
|
|
|
|
// Stop the chip.
|
|
NDetReadPortUchar(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
|
|
&Value);
|
|
|
|
NDetWritePortUchar(InterfaceType,
|
|
BusNumber,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x088a, //NIC_RESET
|
|
0xFF);
|
|
|
|
NDetWritePortUchar(InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress, // COMMAND
|
|
0x21);
|
|
|
|
NtStatus = NDetRemoveInterruptTrap(TrapHandle);
|
|
if(!NT_SUCCESS(NtStatus)){
|
|
break;
|
|
}
|
|
|
|
for(c=0 ; c<4 ; c++){
|
|
if((ResultList[c] == 1) || (ResultList[c] == 2)){
|
|
Interrupt = InterruptList[c];
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
// Allocate the adapter information.
|
|
NtStatus = NetDetectAllocAdapterInfo(pDetectedAdapter,
|
|
InterfaceType,
|
|
BusNumber,
|
|
pPnpId,
|
|
0,
|
|
0,
|
|
0,
|
|
2);
|
|
if (!NT_SUCCESS(NtStatus)){
|
|
#if DBG
|
|
DbgPrint("FindNia35Adapter: Unable to allocate adapter info\n");
|
|
#endif
|
|
break;
|
|
}
|
|
|
|
// Initialize the resources.
|
|
NetDetectInitializeResource(*pDetectedAdapter,
|
|
0,
|
|
MndResourcePort,
|
|
IoBaseAddress,
|
|
0x10);
|
|
NetDetectInitializeResource(*pDetectedAdapter,
|
|
0,
|
|
MndResourcePort,
|
|
IoBaseAddress + 0x1000,
|
|
0x10);
|
|
NetDetectInitializeResource(*pDetectedAdapter,
|
|
0,
|
|
MndResourcePort,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x0888, // NIC_RACK_NIC
|
|
0x2);
|
|
NetDetectInitializeResource(*pDetectedAdapter,
|
|
0,
|
|
MndResourcePort,
|
|
((IoBaseAddress >> 1) & 0xf000) + 0x088a, // NIC_RESET
|
|
0x2);
|
|
|
|
|
|
if(Interrupt != 0){
|
|
NetDetectInitializeResource(*pDetectedAdapter,
|
|
1,
|
|
MndResourceInterrupt,
|
|
Interrupt,
|
|
MND_RESOURCE_INTERRUPT_LATCHED);
|
|
}
|
|
|
|
NtStatus = STATUS_SUCCESS;
|
|
|
|
}while(FALSE);
|
|
|
|
return (NtStatus);
|
|
|
|
}
|
|
|
|
NTSTATUS
|
|
WINAPI
|
|
FindAdapterHandler(
|
|
IN OUT PMND_ADAPTER_INFO *pDetectedAdapter,
|
|
IN INTERFACE_TYPE InterfaceType,
|
|
IN ULONG BusNumber,
|
|
IN PDET_ADAPTER_INFO pAdapterInfo,
|
|
IN PDET_CONTEXT pDetContext
|
|
)
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
Arguments:
|
|
|
|
Return Value:
|
|
|
|
--*/
|
|
{
|
|
NTSTATUS NtStatus;
|
|
ULONG IoBaseAddress;
|
|
|
|
if(InterfaceType != Isa){
|
|
return(STATUS_INVALID_PARAMETER);
|
|
}
|
|
|
|
// Are we looking for the first adapter?
|
|
if (fDET_CONTEXT_FIND_FIRST == (pDetContext->Flags & fDET_CONTEXT_FIND_FIRST)){
|
|
// Initialize the context information so that we start detecting
|
|
// at the initialize port range.
|
|
pDetContext->ISA.IoBaseAddress = 0x0770;
|
|
}
|
|
|
|
for (IoBaseAddress = pDetContext->ISA.IoBaseAddress;
|
|
IoBaseAddress <= 0x6770;
|
|
IoBaseAddress = Nia35NextIoAddress(IoBaseAddress)){
|
|
|
|
// Look for the ee16 adapter at the current port.
|
|
NtStatus = FindNia35Adapter(pDetectedAdapter,
|
|
InterfaceType,
|
|
BusNumber,
|
|
IoBaseAddress,
|
|
pAdapterInfo->PnPId);
|
|
|
|
if (NT_SUCCESS(NtStatus)){
|
|
// We found an adapter. Save the next IO address to check.
|
|
pDetContext->ISA.IoBaseAddress = Nia35NextIoAddress(IoBaseAddress);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (0xffff == IoBaseAddress){
|
|
NtStatus = STATUS_NO_MORE_ENTRIES;
|
|
}
|
|
|
|
return(NtStatus);
|
|
|
|
}
|