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201 lines
7.1 KiB
201 lines
7.1 KiB
/***************************************************************************\
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*
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* ************************
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* * MINIPORT SAMPLE CODE *
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* ************************
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*
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* Module Name:
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*
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* interupt.h
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*
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* Abstract:
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*
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* This module contains the definitions for the shared memory used by
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* the interrupt control routines.
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*
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* Environment:
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*
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* Kernel mode
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*
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*
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* Copyright (c) 1994-1999 3Dlabs Inc. Ltd. All rights reserved.
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* Copyright (c) 1995-2003 Microsoft Corporation. All Rights Reserved.
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*
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\***************************************************************************/
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//
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// we manage a queue of DMA buffers that are to be loaded under interrupt control.
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// Each entry has a physical address and a count to be loaded into Permedia 3.
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// The command can be used to indicate other things to do in the DMA interrupt.
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//
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typedef struct _glint_dma_queue {
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ULONG command;
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ULONG address;
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ULONG count;
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} DMABufferQueue;
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typedef struct PXRXdmaInfo_Tag {
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volatile ULONG scheme; // Used by the interrupt handler only
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volatile ULONG hostInId; // Current internal HostIn id,
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// used by the HIid DMA scheme
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volatile ULONG fifoCount; // Current internal FIFO count,
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// used by various DMA schemes
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volatile ULONG NTbuff; // Current buffer number (0 or 1)
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volatile ULONG *NTptr; // 32/64 bit ptr
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// Last address written to by NT
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// (but not necesserily the end of
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// a completed buffer)
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volatile ULONG *NTdone; // 32/64 bit ptr
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// Last address NT has finished with
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// (end of a buffer, but not
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// necessarily sent to P3 yet)
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volatile ULONG *P3at; // 32/64 bit ptr
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// Last address sent to the P3
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volatile BOOLEAN bFlushRequired; // Is a flush required to empty
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// the FBwrite unit's cache?
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ULONG *DMAaddrL[2]; // 32/64 bit ptr
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// Linear address of the start
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// of each DMA buffer
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ULONG *DMAaddrEndL[2]; // 32/64 bit ptr
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// Linear address of the end of
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// each DMA buffer
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ULONG DMAaddrP[2]; // 32 bit ptr
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// Physical address of the start of
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// each DMA buffer
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ULONG DMAaddrEndP[2]; // 32 bit ptr
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// Physical address of the end of
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// each DMA buffer
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} PXRXdmaInfo;
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// interrupt status bits
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typedef enum {
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DMA_INTERRUPT_AVAILABLE = 0x01, // can use DMA interrupts
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VBLANK_INTERRUPT_AVAILABLE = 0x02, // can use VBLANK interrupts
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SUSPEND_DMA_TILL_VBLANK = 0x04, // Stop doing DMA till after next VBLANK
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DIRECTDRAW_VBLANK_ENABLED = 0x08, // Set flag for DirectDraw on VBLANK
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PXRX_SEND_ON_VBLANK_ENABLED = 0x10, // Set flag for PXRX DMA on VBLANK
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PXRX_CHECK_VFIFO_IN_VBLANK = 0x20, // Set flag for VFIFO underrun checking on VBLANK
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} INTERRUPT_CONTROL;
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// commands to the interrupt controller on the next VBLANK
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typedef enum {
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NO_COMMAND = 0,
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COLOR_SPACE_BUFFER_0,
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COLOR_SPACE_BUFFER_1,
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} VBLANK_CONTROL_COMMAND;
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// Display driver structure for 'general use'.
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typedef struct _pointer_interrupt_control
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{
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volatile ULONG bDisplayDriverHasAccess;
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volatile ULONG bMiniportHasAccess;
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volatile ULONG bInterruptPending;
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volatile ULONG bHidden;
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volatile ULONG CursorMode;
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volatile ULONG x, y;
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} PTR_INTR_CTL;
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// Display driver structure for 'pointer use'.
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typedef struct _general_interrupt_control
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{
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volatile ULONG bDisplayDriverHasAccess;
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volatile ULONG bMiniportHasAccess;
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} GEN_INTR_CTL;
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#define MAX_DMA_QUEUE_ENTRIES 10
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typedef struct _glint_interrupt_control {
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// contains various status bits. ** MUST BE THE FIRST FIELD **
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volatile INTERRUPT_CONTROL Control;
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// profiling counters for Permedia3 busy time
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ULONG PerfCounterShift;
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ULONG BusyTime; // at DMA interrupt add (TimeNow-StartTime) to this
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ULONG StartTime; // set this when DMACount is loaded
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ULONG IdleTime;
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ULONG IdleStart;
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// commands to perform on the next VBLANK
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volatile VBLANK_CONTROL_COMMAND VBCommand;
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// flag to indicate whether we expect another DMA interrupt
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volatile ULONG InterruptPending;
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volatile ULONG DDRAW_VBLANK; // flag for DirectDraw to indicate that a VBLANK occured.
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volatile ULONG bOverlayEnabled; // TRUE if the overlay is on at all
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volatile ULONG bVBLANKUpdateOverlay; // TRUE if the overlay needs to be updated by the VBLANK routine.
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volatile ULONG VBLANKUpdateOverlayWidth; // overlay width (updated in vblank)
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volatile ULONG VBLANKUpdateOverlayHeight; // overlay height (updated in vblank)
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// Volatile structures are required to enforce single-threading
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// We need 1 for general display use and 1 for pointer use, because
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// the pointer is synchronous.
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volatile PTR_INTR_CTL Pointer;
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volatile GEN_INTR_CTL General;
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// dummy DMA buffer to cause an interrupt but transfer no data
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ULONG dummyDMAAddress;
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ULONG dummyDMACount;
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// index offsets into the queue for the front, back and end. Using separate
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// front and back offsets allows the display driver to add and the interrupt
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// controller to remove entries without a need for locking code.
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volatile ULONG frontIndex;
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ULONG backIndex;
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ULONG endIndex;
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ULONG maximumIndex;
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// For P3RX 2D DMA:
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ULONG lastAddr;
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PXRXdmaInfo pxrxDMA;
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// array to contain the DMA queue
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DMABufferQueue dmaQueue[MAX_DMA_QUEUE_ENTRIES];
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} INTERRUPT_CONTROL_BLOCK, *PINTERRUPT_CONTROL_BLOCK;
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#define REQUEST_INTR_CMD_BLOCK_MUTEX(pBlock, bHaveMutex) \
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{ \
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pBlock->bMiniportHasAccess = TRUE; \
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if(!pBlock->bDisplayDriverHasAccess) \
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{ \
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bHaveMutex = TRUE; \
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} \
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else \
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{ \
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bHaveMutex = FALSE; \
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pBlock->bMiniportHasAccess = FALSE; \
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} \
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}
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#define RELEASE_INTR_CMD_BLOCK_MUTEX(pBlock) \
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{ \
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pBlock->bMiniportHasAccess = FALSE; \
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}
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//
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// structure containing information about the interrupt control block
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//
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typedef struct _interrupt_control_buffer_ {
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PHYSICAL_ADDRESS PhysAddress;
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INTERRUPT_CONTROL_BLOCK ControlBlock;
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PVOID kdpc;
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BOOLEAN bInterruptsInitialized;
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} PERM3_INTERRUPT_CTRLBUF, *PPERM3_INTERRUPT_CTRLBUF;
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