Source code of Windows XP (NT5)
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  1. /*++
  2. Copyright (c) 1992 Microsoft Corporation
  3. Module Name:
  4. et400dat.c
  5. Abstract:
  6. This module contains all the global data used by the et4000 driver.
  7. Environment:
  8. Kernel mode
  9. Revision History:
  10. --*/
  11. #include "dderror.h"
  12. #include "devioctl.h"
  13. #include "miniport.h"
  14. #include "ntddvdeo.h"
  15. #include "video.h"
  16. #include "et4000.h"
  17. #include "cmdcnst.h"
  18. #if defined(ALLOC_PRAGMA)
  19. #pragma data_seg("PAGE")
  20. #endif
  21. //
  22. // This structure describes to which ports access is required.
  23. //
  24. VIDEO_ACCESS_RANGE VgaAccessRange[] = {
  25. {
  26. VGA_BASE_IO_PORT, 0x00000000, // 64-bit linear base address
  27. // of range
  28. VGA_START_BREAK_PORT - VGA_BASE_IO_PORT + 1, // # of ports
  29. 1, // range is in I/O space
  30. 1, // range should be visible
  31. 0 // range should be shareable
  32. },
  33. {
  34. VGA_END_BREAK_PORT, 0x00000000,
  35. VGA_MAX_IO_PORT - VGA_END_BREAK_PORT + 1,
  36. 1,
  37. 1,
  38. 0
  39. },
  40. {
  41. CRTCB_IO_PORT_BASE, 0x00000000, // 64-bit linear base address
  42. CRTCB_IO_PORT_LEN, // # of ports
  43. 1, // range is in I/O space
  44. 1, // range should be visible
  45. 0 // range should be shareable
  46. },
  47. {
  48. 0x000A0000, 0x00000000,
  49. 0x00020000,
  50. 0,
  51. 1,
  52. 0
  53. },
  54. //
  55. // Linear frame buffer access range (uninitialized)
  56. //
  57. {
  58. 0x00000000, 0x00000000,
  59. 0x00000000,
  60. 0,
  61. 1,
  62. 0
  63. }
  64. };
  65. //
  66. // PUBLIC ACCESS RANGE OFFSETS
  67. //
  68. // This table contains the offsets from the start of the frame
  69. // buffer for each of the MMU ranges.
  70. //
  71. RANGE_OFFSETS RangeOffsets[2][2] =
  72. {
  73. {
  74. {BANKED_MMU_BUFFER_MEMORY_ADDR,
  75. BANKED_MMU_BUFFER_MEMORY_LEN},
  76. {BANKED_MMU_MEMORY_MAPPED_REGS_ADDR,
  77. BANKED_MMU_MEMORY_MAPPED_REGS_LEN}
  78. },
  79. {
  80. {MMU_BUFFER_MEMORY_ADDR,
  81. MMU_BUFFER_MEMORY_LEN},
  82. {MMU_MEMORY_MAPPED_REGS_ADDR,
  83. MMU_MEMORY_MAPPED_REGS_LEN}
  84. }
  85. };
  86. //
  87. // Validator Port list.
  88. // This structure describes all the ports that must be hooked out of the V86
  89. // emulator when a DOS app goes to full-screen mode.
  90. // The structure determines to which routine the data read or written to a
  91. // specific port should be sent.
  92. //
  93. EMULATOR_ACCESS_ENTRY VgaEmulatorAccessEntries[] = {
  94. //
  95. // Traps for byte OUTs.
  96. //
  97. {
  98. 0x000003b0, // range start I/O address
  99. 0xC, // range length
  100. Uchar, // access size to trap
  101. EMULATOR_READ_ACCESS | EMULATOR_WRITE_ACCESS, // types of access to trap
  102. FALSE, // does not support string accesses
  103. (PVOID)VgaValidatorUcharEntry // routine to which to trap
  104. },
  105. {
  106. 0x000003c0, // range start I/O address
  107. 0x20, // range length
  108. Uchar, // access size to trap
  109. EMULATOR_READ_ACCESS | EMULATOR_WRITE_ACCESS, // types of access to trap
  110. FALSE, // does not support string accesses
  111. (PVOID)VgaValidatorUcharEntry // routine to which to trap
  112. },
  113. //
  114. // Traps for word OUTs.
  115. //
  116. {
  117. 0x000003b0,
  118. 0x06,
  119. Ushort,
  120. EMULATOR_READ_ACCESS | EMULATOR_WRITE_ACCESS,
  121. FALSE,
  122. (PVOID)VgaValidatorUshortEntry
  123. },
  124. {
  125. 0x000003c0,
  126. 0x10,
  127. Ushort,
  128. EMULATOR_READ_ACCESS | EMULATOR_WRITE_ACCESS,
  129. FALSE,
  130. (PVOID)VgaValidatorUshortEntry
  131. },
  132. //
  133. // Traps for dword OUTs.
  134. //
  135. {
  136. 0x000003b0,
  137. 0x03,
  138. Ulong,
  139. EMULATOR_READ_ACCESS | EMULATOR_WRITE_ACCESS,
  140. FALSE,
  141. (PVOID)VgaValidatorUlongEntry
  142. },
  143. {
  144. 0x000003c0,
  145. 0x08,
  146. Ulong,
  147. EMULATOR_READ_ACCESS | EMULATOR_WRITE_ACCESS,
  148. FALSE,
  149. (PVOID)VgaValidatorUlongEntry
  150. }
  151. };
  152. //
  153. // Used to trap only the sequncer and the misc output registers
  154. //
  155. VIDEO_ACCESS_RANGE MinimalVgaValidatorAccessRange[] = {
  156. {
  157. VGA_BASE_IO_PORT, 0x00000000,
  158. VGA_START_BREAK_PORT - VGA_BASE_IO_PORT + 1,
  159. 1,
  160. 1, // <- enable range IOPM so that it is not trapped.
  161. 0
  162. },
  163. {
  164. VGA_END_BREAK_PORT, 0x00000000,
  165. VGA_MAX_IO_PORT - VGA_END_BREAK_PORT + 1,
  166. 1,
  167. 1,
  168. 0
  169. },
  170. {
  171. VGA_BASE_IO_PORT + MISC_OUTPUT_REG_WRITE_PORT, 0x00000000,
  172. 0x00000001,
  173. 1,
  174. 0,
  175. 0
  176. },
  177. {
  178. VGA_BASE_IO_PORT + SEQ_ADDRESS_PORT, 0x00000000,
  179. 0x00000002,
  180. 1,
  181. 0,
  182. 0
  183. }
  184. };
  185. //
  186. // Used to trap all registers
  187. //
  188. VIDEO_ACCESS_RANGE FullVgaValidatorAccessRange[] = {
  189. {
  190. VGA_BASE_IO_PORT, 0x00000000,
  191. VGA_START_BREAK_PORT - VGA_BASE_IO_PORT + 1,
  192. 1,
  193. 0, // <- disable range in the IOPM so that it is trapped.
  194. 0
  195. },
  196. {
  197. VGA_END_BREAK_PORT, 0x00000000,
  198. VGA_MAX_IO_PORT - VGA_END_BREAK_PORT + 1,
  199. 1,
  200. 0,
  201. 0
  202. }
  203. };
  204. USHORT ET4K_1K_WIDE[] = {
  205. OW, // stretch scans to 1k
  206. CRTC_ADDRESS_PORT_COLOR,
  207. 0x8013,
  208. EOD
  209. };
  210. // This is the only value that avoids broken rasters (at least they're not
  211. // broken within the visible portion of the bitmap)
  212. USHORT ET4K_1928_WIDE[] = {
  213. OW, // stretch scans to 1928
  214. CRTC_ADDRESS_PORT_COLOR,
  215. 0xF113,
  216. EOD
  217. };
  218. USHORT MODESET_MODEX_320_200[] = {
  219. OW,
  220. SEQ_ADDRESS_PORT,
  221. 0x0604,
  222. OWM,
  223. CRTC_ADDRESS_PORT_COLOR,
  224. 2,
  225. 0xe317,
  226. 0x0014,
  227. EOD
  228. };
  229. USHORT MODESET_MODEX_320_240[] = {
  230. OWM,
  231. SEQ_ADDRESS_PORT,
  232. 2,
  233. 0x0604,
  234. 0x0100,
  235. OB,
  236. MISC_OUTPUT_REG_WRITE_PORT,
  237. 0xe3,
  238. OW,
  239. SEQ_ADDRESS_PORT,
  240. 0x0300,
  241. OB,
  242. CRTC_ADDRESS_PORT_COLOR,
  243. 0x11,
  244. METAOUT+MASKOUT,
  245. CRTC_DATA_PORT_COLOR,
  246. 0x7f, 0x00,
  247. OWM,
  248. CRTC_ADDRESS_PORT_COLOR,
  249. 10,
  250. 0x0d06,
  251. 0x3e07,
  252. 0x4109,
  253. 0xea10,
  254. 0xac11,
  255. 0xdf12,
  256. 0x0014,
  257. 0xe715,
  258. 0x0616,
  259. 0xe317,
  260. OW,
  261. SEQ_ADDRESS_PORT,
  262. 0x0f02,
  263. EOD
  264. };
  265. USHORT MODESET_MODEX_320_400[] = {
  266. OW,
  267. SEQ_ADDRESS_PORT,
  268. 0x0604,
  269. OWM,
  270. CRTC_ADDRESS_PORT_COLOR,
  271. 3,
  272. 0xe317,
  273. 0x0014,
  274. 0x4009,
  275. EOD
  276. };
  277. USHORT MODESET_MODEX_320_480[] = {
  278. OWM,
  279. SEQ_ADDRESS_PORT,
  280. 2,
  281. 0x0604,
  282. 0x0100,
  283. OB,
  284. MISC_OUTPUT_REG_WRITE_PORT,
  285. 0xe3,
  286. OW,
  287. SEQ_ADDRESS_PORT,
  288. 0x0300,
  289. OB,
  290. CRTC_ADDRESS_PORT_COLOR,
  291. 0x11,
  292. METAOUT+MASKOUT,
  293. CRTC_DATA_PORT_COLOR,
  294. 0x7f, 0x00,
  295. OWM,
  296. CRTC_ADDRESS_PORT_COLOR,
  297. 10,
  298. 0x0d06,
  299. 0x3e07,
  300. 0x4109,
  301. 0xea10,
  302. 0xac11,
  303. 0xdf12,
  304. 0x0014,
  305. 0xe715,
  306. 0x0616,
  307. 0xe317,
  308. OW,
  309. SEQ_ADDRESS_PORT,
  310. 0x0f02,
  311. OW,
  312. CRTC_ADDRESS_PORT_COLOR,
  313. 0x4009,
  314. EOD
  315. };
  316. //
  317. // Memory map table -
  318. //
  319. // These memory maps are used to save and restore the physical video buffer.
  320. //
  321. MEMORYMAPS MemoryMaps[] = {
  322. // length start
  323. // ------ -----
  324. { 0x08000, 0xB0000}, // all mono text modes (7)
  325. { 0x08000, 0xB8000}, // all color text modes (0, 1, 2, 3,
  326. { 0x10000, 0xA0000}, // all VGA graphics modes
  327. };
  328. //
  329. // Video mode table - contains information and commands for initializing each
  330. // mode. These entries must correspond with those in VIDEO_MODE_VGA. The first
  331. // entry is commented; the rest follow the same format, but are not so
  332. // heavily commented.
  333. //
  334. VIDEOMODE ModesVGA[] = {
  335. //
  336. // Standard VGA modes.
  337. //
  338. //
  339. // Mode index 0
  340. // Color text mode 3, 720x400, 9x16 char cell (VGA).
  341. //
  342. {
  343. VIDEO_MODE_COLOR, // flags that this mode is a color mode, but not graphics
  344. 4, // four planes
  345. 1, // one bit of colour per plane
  346. 80, 25, // 80x25 text resolution
  347. 720, 400, // 720x400 pixels on screen
  348. 160, 0x10000, // 160 bytes per scan line, 64K of CPU-addressable bitmap
  349. 0, 0, // only support one frequency, non-interlaced
  350. NoBanking, // no banking supported or needed in this mode
  351. MemMap_CGA, // the memory mapping is the standard CGA memory mapping
  352. // of 32K at B8000
  353. FALSE, // Mode is not available by default
  354. 0x3, // int 10 modesset value
  355. NULL, // scan line stretching option
  356. },
  357. //
  358. // Color text mode 3, 640x350, 8x14 char cell (EGA).
  359. //
  360. { VIDEO_MODE_COLOR, 4, 1, 80, 25,
  361. 640, 350, 160, 0x10000, 0, 0, NoBanking, MemMap_CGA,
  362. FALSE,
  363. 0x3,
  364. NULL,
  365. },
  366. //
  367. // Standard VGA Color graphics mode 0x12, 640x480 16 colors.
  368. //
  369. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 80, 30,
  370. 640, 480, 80, 0x10000, 60, 0, NoBanking, MemMap_VGA,
  371. FALSE,
  372. 0x12,
  373. NULL,
  374. },
  375. //
  376. // Standard VGA Color graphics mode 0x12, 640x480 16 colors. 72Hz
  377. //
  378. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 80, 30,
  379. 640, 480, 80, 0x10000, 72, 0, NoBanking, MemMap_VGA,
  380. FALSE,
  381. 0x12,
  382. NULL,
  383. },
  384. //
  385. // Standard ModeX Color graphics mode 0x13, 320x200 256 colors.
  386. //
  387. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 8, 1, 80, 30,
  388. 320, 200, 80, 0x10000, 70, 0, NoBanking, MemMap_VGA,
  389. FALSE,
  390. 0x13,
  391. MODESET_MODEX_320_200,
  392. },
  393. //
  394. // Standard ModeX Color graphics mode 0x13, 320x240 256 colors.
  395. //
  396. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 8, 1, 80, 30,
  397. 320, 240, 80, 0x10000, 60, 0, NoBanking, MemMap_VGA,
  398. FALSE,
  399. 0x13,
  400. MODESET_MODEX_320_240,
  401. },
  402. //
  403. // Standard ModeX Color graphics mode 0x13, 320x400 256 colors.
  404. //
  405. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 8, 1, 80, 30,
  406. 320, 400, 80, 0x10000, 70, 0, NoBanking, MemMap_VGA,
  407. FALSE,
  408. 0x13,
  409. MODESET_MODEX_320_400,
  410. },
  411. //
  412. // Standard ModeX Color graphics mode 0x13, 320x480 256 colors.
  413. //
  414. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 8, 1, 80, 30,
  415. 320, 480, 80, 0x10000, 60, 0, NoBanking, MemMap_VGA,
  416. FALSE,
  417. 0x13,
  418. MODESET_MODEX_320_480,
  419. },
  420. //
  421. // Beginning of SVGA modes
  422. //
  423. //
  424. // 800x600 16 colors.
  425. //
  426. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 100, 37,
  427. 800, 600, 100, 0x10000, 60, 0, NoBanking, MemMap_VGA,
  428. FALSE,
  429. 0x29,
  430. NULL,
  431. },
  432. //
  433. // 800x600 16 colors. 72 hz
  434. //
  435. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 100, 37,
  436. 800, 600, 100, 0x10000, 72, 0, NoBanking, MemMap_VGA,
  437. FALSE,
  438. 0x29,
  439. NULL,
  440. },
  441. //
  442. // 800x600 16 colors. 56 hz for 8514/a monitors... (fixed freq)
  443. //
  444. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 100, 37,
  445. 800, 600, 100, 0x10000, 56, 0, NoBanking, MemMap_VGA,
  446. FALSE,
  447. 0x29,
  448. NULL,
  449. },
  450. //
  451. // 1024x768 non-interlaced 16 colors.
  452. // Assumes 512K.
  453. //
  454. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 128, 48,
  455. 1024, 768, 128, 0x20000, 60, 0, NormalBanking, MemMap_VGA,
  456. FALSE,
  457. 0x37,
  458. NULL,
  459. },
  460. //
  461. // 1024x768 non-interlaced 16 colors. 70hz
  462. // Assumes 512K.
  463. //
  464. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 128, 48,
  465. 1024, 768, 128, 0x20000, 70, 0, NormalBanking, MemMap_VGA,
  466. FALSE,
  467. 0x37,
  468. NULL
  469. },
  470. //
  471. // 1024x768 non-interlaced 16 colors. Interlaced (45 hz)
  472. // Assumes 512K.
  473. //
  474. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 128, 48,
  475. 1024, 768, 128, 0x20000, 45, 1, NormalBanking, MemMap_VGA,
  476. FALSE,
  477. 0x37,
  478. NULL
  479. },
  480. //////////////////////////////////////////////////////////////////
  481. // Non Planar Modes
  482. //
  483. //
  484. // 640x480x256
  485. //
  486. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  487. 640, 480, 1024, 0x80000, 60, 0, PlanarHCBanking, MemMap_VGA,
  488. FALSE,
  489. 0x2E,
  490. ET4K_1K_WIDE
  491. },
  492. //
  493. // 640x480x256 72 Hz
  494. //
  495. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  496. 640, 480, 1024, 0x80000, 72, 0, PlanarHCBanking, MemMap_VGA,
  497. FALSE,
  498. 0x2E,
  499. ET4K_1K_WIDE
  500. },
  501. //
  502. // 640x480x256 75 Hz
  503. //
  504. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  505. 640, 480, 1024, 0x80000, 75, 0, PlanarHCBanking, MemMap_VGA,
  506. FALSE,
  507. 0x2E,
  508. ET4K_1K_WIDE
  509. },
  510. //
  511. // 640x480x256 85 Hz
  512. //
  513. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  514. 640, 480, 1024, 0x80000, 85, 0, PlanarHCBanking, MemMap_VGA,
  515. FALSE,
  516. 0x2E,
  517. ET4K_1K_WIDE
  518. },
  519. //
  520. // 640x480x256 90 Hz
  521. //
  522. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  523. 640, 480, 1024, 0x80000, 90, 0, PlanarHCBanking, MemMap_VGA,
  524. FALSE,
  525. 0x2E,
  526. ET4K_1K_WIDE
  527. },
  528. // NOTE: 800x600 modes need 1Meg until we support broken rasters
  529. //
  530. // 800x600x256 56Hz
  531. //
  532. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  533. 800, 600, 1024, 0x100000, 56, 0, PlanarHCBanking, MemMap_VGA,
  534. FALSE,
  535. 0x30,
  536. ET4K_1K_WIDE
  537. },
  538. //
  539. // 800x600x256 60Hz
  540. //
  541. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  542. 800, 600, 1024, 0x100000, 60, 0, PlanarHCBanking, MemMap_VGA,
  543. FALSE,
  544. 0x30,
  545. ET4K_1K_WIDE
  546. },
  547. //
  548. // 800x600x256 72Hz
  549. //
  550. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  551. 800, 600, 1024, 0x100000, 72, 0, PlanarHCBanking, MemMap_VGA,
  552. FALSE,
  553. 0x30,
  554. ET4K_1K_WIDE
  555. },
  556. //
  557. // 800x600x256 75Hz
  558. //
  559. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  560. 800, 600, 1024, 0x100000, 75, 0, PlanarHCBanking, MemMap_VGA,
  561. FALSE,
  562. 0x30,
  563. ET4K_1K_WIDE
  564. },
  565. //
  566. // 800x600x256 85Hz
  567. //
  568. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  569. 800, 600, 1024, 0x100000, 85, 0, PlanarHCBanking, MemMap_VGA,
  570. FALSE,
  571. 0x30,
  572. ET4K_1K_WIDE
  573. },
  574. //
  575. // 800x600x256 90Hz
  576. //
  577. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  578. 800, 600, 1024, 0x100000, 90, 0, PlanarHCBanking, MemMap_VGA,
  579. FALSE,
  580. 0x30,
  581. ET4K_1K_WIDE
  582. },
  583. //
  584. // 1024x768x256 45Hz (Interlaced)
  585. //
  586. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  587. 1024, 768, 1024, 0x100000, 45, 1, PlanarHCBanking, MemMap_VGA,
  588. FALSE,
  589. 0x38,
  590. NULL
  591. },
  592. //
  593. // 1024x768x256 60Hz
  594. //
  595. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  596. 1024, 768, 1024, 0x100000, 60, 0, PlanarHCBanking, MemMap_VGA,
  597. FALSE,
  598. 0x38,
  599. NULL
  600. },
  601. //
  602. // 1024x768x256 70Hz
  603. //
  604. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  605. 1024, 768, 1024, 0x100000, 70, 0, PlanarHCBanking, MemMap_VGA,
  606. FALSE,
  607. 0x38,
  608. NULL
  609. },
  610. //
  611. // 1024x768x256 72Hz
  612. //
  613. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  614. 1024, 768, 1024, 0x100000, 72, 0, PlanarHCBanking, MemMap_VGA,
  615. FALSE,
  616. 0x38,
  617. NULL
  618. },
  619. //
  620. // 1024x768x256 75Hz
  621. //
  622. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  623. 1024, 768, 1024, 0x100000, 75, 0, PlanarHCBanking, MemMap_VGA,
  624. FALSE,
  625. 0x38,
  626. NULL
  627. },
  628. //
  629. // 640x480x64K
  630. //
  631. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  632. 640, 480, 1928, 0x100000, 60, 0, PlanarHCBanking, MemMap_VGA,
  633. FALSE,
  634. 0x2E,
  635. ET4K_1928_WIDE
  636. },
  637. //
  638. // 640x480x64K 72Hz
  639. //
  640. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  641. 640, 480, 1928, 0x100000, 72, 0, PlanarHCBanking, MemMap_VGA,
  642. FALSE,
  643. 0x2E,
  644. ET4K_1928_WIDE
  645. },
  646. //
  647. // 640x480x64K 75Hz
  648. //
  649. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  650. 640, 480, 1928, 0x80000, 75, 0, PlanarHCBanking, MemMap_VGA,
  651. FALSE,
  652. 0x2E,
  653. ET4K_1928_WIDE
  654. },
  655. //
  656. // 640x480x64K 90Hz
  657. //
  658. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  659. 640, 480, 1928, 0x80000, 90, 0, PlanarHCBanking, MemMap_VGA,
  660. FALSE,
  661. 0x2E,
  662. ET4K_1928_WIDE
  663. },
  664. //
  665. // 800x600x64K
  666. //
  667. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  668. 800, 600, 800*2, 0x100000, 60, 0, NormalBanking, MemMap_VGA,
  669. FALSE,
  670. 0x30,
  671. NULL
  672. },
  673. //
  674. // 800x600x64K 72Hz
  675. //
  676. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  677. 800, 600, 800*2, 0x100000, 72, 0, NormalBanking, MemMap_VGA,
  678. FALSE,
  679. 0x30,
  680. NULL
  681. },
  682. //
  683. // 800x600x64K 75Hz
  684. //
  685. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  686. 800, 600, 800*2, 0x100000, 75, 0, NormalBanking, MemMap_VGA,
  687. FALSE,
  688. 0x30,
  689. NULL
  690. },
  691. //
  692. // 800x600x64K 90Hz
  693. //
  694. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  695. 800, 600, 800*2, 0x100000, 90, 0, NormalBanking, MemMap_VGA,
  696. FALSE,
  697. 0x30,
  698. NULL
  699. },
  700. //
  701. // 1024x768x64K
  702. //
  703. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  704. 1024, 768, 1024*2, 0x200000, 60, 0, NormalBanking, MemMap_VGA,
  705. FALSE,
  706. 0x38,
  707. NULL
  708. },
  709. //
  710. // 1024x768x64K 70Hz
  711. //
  712. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  713. 1024, 768, 1024*2, 0x200000, 70, 0, NormalBanking, MemMap_VGA,
  714. FALSE,
  715. 0x38,
  716. NULL
  717. },
  718. //
  719. // 1024x768x64K 75Hz
  720. //
  721. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  722. 1024, 768, 1024*2, 0x200000, 75, 0, NormalBanking, MemMap_VGA,
  723. FALSE,
  724. 0x38,
  725. NULL
  726. },
  727. //
  728. // 1280x1024x256 45Hz (interlaced)
  729. //
  730. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  731. 1280, 1024, 1280, 0x200000, 45, 1, PlanarHCBanking, MemMap_VGA,
  732. FALSE,
  733. 0x3F,
  734. NULL
  735. },
  736. //
  737. // 1280x1024 8bpp 60Hz
  738. //
  739. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  740. 1280, 1024, 1280, 0x200000, 60, 0, PlanarHCBanking, MemMap_VGA,
  741. FALSE,
  742. 0x3F,
  743. NULL
  744. },
  745. //
  746. // 1280x1024 8bpp 70Hz
  747. //
  748. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  749. 1280, 1024, 1280, 0x200000, 70, 0, PlanarHCBanking, MemMap_VGA,
  750. FALSE,
  751. 0x3F,
  752. NULL
  753. },
  754. //
  755. // 1280x1024 8bpp 75Hz
  756. //
  757. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  758. 1280, 1024, 1280, 0x200000, 75, 0, PlanarHCBanking, MemMap_VGA,
  759. FALSE,
  760. 0x3F,
  761. NULL
  762. },
  763. //
  764. // 640x480 24bpp 60Hz
  765. //
  766. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  767. 640, 480, 640*3, 640*480*3, 60, 0, MemMgrBanking, MemMap_VGA,
  768. FALSE,
  769. 0x2E,
  770. NULL
  771. },
  772. //
  773. // 640x480 24bpp 75Hz
  774. //
  775. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  776. 640, 480, 640*3, 640*480*3, 75, 0, MemMgrBanking, MemMap_VGA,
  777. FALSE,
  778. 0x2E,
  779. NULL
  780. },
  781. //
  782. // 640x480 24bpp 90Hz
  783. //
  784. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  785. 640, 480, 640*3, 640*480*3, 90, 0, MemMgrBanking, MemMap_VGA,
  786. FALSE,
  787. 0x2E,
  788. NULL
  789. },
  790. //
  791. // 800x600 24bpp 60Hz
  792. //
  793. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  794. 800, 600, 800*3, 800*600*3, 60, 0, MemMgrBanking, MemMap_VGA,
  795. FALSE,
  796. 0x30,
  797. NULL
  798. },
  799. //
  800. // 800x600 24bpp 75Hz
  801. //
  802. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  803. 800, 600, 800*3, 800*600*3, 75, 0, MemMgrBanking, MemMap_VGA,
  804. FALSE,
  805. 0x30,
  806. NULL
  807. },
  808. //
  809. // 800x600 24bpp 90Hz
  810. //
  811. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  812. 800, 600, 800*3, 800*600*3, 90, 0, MemMgrBanking, MemMap_VGA,
  813. FALSE,
  814. 0x30,
  815. NULL
  816. },
  817. #if 0
  818. //
  819. // 1024x768 24bpp 60Hz
  820. //
  821. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  822. 1024, 768, 1024*3, 1024*768*3, 60, 0, MemMgrBanking, MemMap_VGA,
  823. FALSE,
  824. 0x30,
  825. NULL
  826. },
  827. //
  828. // 1024x768 24bpp 75Hz
  829. //
  830. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  831. 1024, 768, 1024*3, 1024*768*3, 75, 0, MemMgrBanking, MemMap_VGA,
  832. FALSE,
  833. 0x30,
  834. NULL
  835. },
  836. #endif
  837. //////////////////////////////////////////////////////////////////////
  838. // DirectDraw modes
  839. //
  840. //
  841. // 320x200 8bpp 70Hz
  842. //
  843. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  844. 320, 200, 320, 320*200, 70, 0, PlanarHCBanking, MemMap_VGA,
  845. FALSE,
  846. 0x13,
  847. NULL
  848. },
  849. //
  850. // 320x200 16bpp 70Hz
  851. //
  852. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  853. 320, 200, 320*2, 320*200*2, 70, 0, PlanarHCBanking, MemMap_VGA,
  854. FALSE,
  855. 0x13,
  856. NULL
  857. },
  858. //
  859. // 320x200 24bpp 70Hz
  860. //
  861. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  862. 320, 200, 320*3, 320*200*3, 70, 0, PlanarHCBanking, MemMap_VGA,
  863. FALSE,
  864. 0x13,
  865. NULL
  866. },
  867. //
  868. // 320x240 8bpp 60Hz
  869. //
  870. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  871. 320, 240, 320, 320*240, 60, 0, PlanarHCBanking, MemMap_VGA,
  872. FALSE,
  873. 0x1e,
  874. NULL
  875. },
  876. //
  877. // 320x240 16bpp 60Hz
  878. //
  879. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  880. 320, 240, 320*2, 320*240*2, 60, 0, PlanarHCBanking, MemMap_VGA,
  881. FALSE,
  882. 0x1e,
  883. NULL
  884. },
  885. //
  886. // 320x240 24bpp 60Hz
  887. //
  888. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  889. 320, 240, 320*3, 320*240*3, 60, 0, PlanarHCBanking, MemMap_VGA,
  890. FALSE,
  891. 0x1e,
  892. NULL
  893. },
  894. //
  895. // 512x384 8bpp 60Hz
  896. //
  897. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  898. 512, 384, 512, 512*384, 60, 0, PlanarHCBanking, MemMap_VGA,
  899. FALSE,
  900. 0x1f,
  901. NULL
  902. },
  903. //
  904. // 512x384 16bpp 60Hz
  905. //
  906. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  907. 512, 384, 512*2, 512*384*2, 60, 0, PlanarHCBanking, MemMap_VGA,
  908. FALSE,
  909. 0x1f,
  910. NULL
  911. },
  912. //
  913. // 512x384 24bpp 60Hz
  914. //
  915. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  916. 512, 384, 512*3, 512*384*3, 60, 0, PlanarHCBanking, MemMap_VGA,
  917. FALSE,
  918. 0x1f,
  919. NULL
  920. },
  921. //
  922. // 640x400 8bpp 60Hz
  923. //
  924. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
  925. 640, 400, 640, 640*400, 60, 0, PlanarHCBanking, MemMap_VGA,
  926. FALSE,
  927. 0x2f,
  928. NULL
  929. },
  930. //
  931. // 640x400 16bpp 60Hz
  932. //
  933. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 16, 80, 30,
  934. 640, 400, 640*2, 640*400*2, 60, 0, PlanarHCBanking, MemMap_VGA,
  935. FALSE,
  936. 0x2f,
  937. NULL
  938. },
  939. //
  940. // 640x400 24bpp 60Hz
  941. //
  942. { VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 24, 80, 30,
  943. 640, 400, 640*3, 640*400*3, 60, 0, PlanarHCBanking, MemMap_VGA,
  944. FALSE,
  945. 0x2f,
  946. NULL
  947. },
  948. };
  949. ULONG NumVideoModes = sizeof(ModesVGA) / sizeof(VIDEOMODE);
  950. //
  951. //
  952. // Data used to set the Graphics and Sequence Controllers to put the
  953. // VGA into a planar state at A0000 for 64K, with plane 2 enabled for
  954. // reads and writes, so that a font can be loaded, and to disable that mode.
  955. //
  956. // Settings to enable planar mode with plane 2 enabled.
  957. //
  958. USHORT EnableA000Data[] = {
  959. OWM,
  960. SEQ_ADDRESS_PORT,
  961. 1,
  962. 0x0100,
  963. OWM,
  964. GRAPH_ADDRESS_PORT,
  965. 3,
  966. 0x0204, // Read Map = plane 2
  967. 0x0005, // Graphics Mode = read mode 0, write mode 0
  968. 0x0406, // Graphics Miscellaneous register = A0000 for 64K, not odd/even,
  969. // graphics mode
  970. OWM,
  971. SEQ_ADDRESS_PORT,
  972. 3,
  973. 0x0402, // Map Mask = write to plane 2 only
  974. 0x0404, // Memory Mode = not odd/even, not full memory, graphics mode
  975. 0x0300, // end sync reset
  976. EOD
  977. };
  978. //
  979. // Settings to disable the font-loading planar mode.
  980. //
  981. USHORT DisableA000Color[] = {
  982. OWM,
  983. SEQ_ADDRESS_PORT,
  984. 1,
  985. 0x0100,
  986. OWM,
  987. GRAPH_ADDRESS_PORT,
  988. 3,
  989. 0x0004, 0x1005, 0x0E06,
  990. OWM,
  991. SEQ_ADDRESS_PORT,
  992. 3,
  993. 0x0302, 0x0204, 0x0300, // end sync reset
  994. EOD
  995. };
  996. #if defined(ALLOC_PRAGMA)
  997. #pragma data_seg()
  998. #endif