Source code of Windows XP (NT5)
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  1. /*++
  2. Copyright (c) 1999-2001 Microsoft Corporation. All Rights Reserved.
  3. Module Name:
  4. apic.h
  5. Abstract:
  6. This module contains private x86 processor local APIC defines, variables, inline
  7. functions and prototypes.
  8. Author:
  9. Joseph Ballantyne
  10. Environment:
  11. Kernel Mode
  12. Revision History:
  13. --*/
  14. // Local APIC defines.
  15. // APIC register address offsets from the APICBASE.
  16. // These are offsets to registers used to control local interrupt sources for the processor.
  17. // The local APIC timer is built into the local APIC on the processor itself and is
  18. // separate from other timers on the motherboard.
  19. #define APICSPURIOUS 0xf0 // Spurious interrupt
  20. #define APICTIMER 0x320 // Local APIC timer interrupt (maskable only)
  21. #define APICPERF 0x340 // Performance counter interrupt (NMI or maskable)
  22. #define APICINTR 0x350 // External interrupt 1 (normally connected to external maskable interrupts)
  23. #define APICNMI 0x360 // External interrupt 2 (normally connected to external NMI)
  24. #define APICERROR 0x370 // Local APIC error interrupt.
  25. // These are assorted additional registers in the local APIC.
  26. #define APICID 0x20
  27. #define APICVERSION 0x30
  28. #define APICTPR 0x80
  29. #define APICAPR 0x90
  30. #define APICPPR 0xa0
  31. #define APICEOI 0xb0 // Used to EOI maskable interrupt sources.
  32. #define APICSTATUS 0x280
  33. #define APICICRLOW 0x300 // Used to generate interrupts on the local APIC bus under software control.
  34. #define APICICRHIGH 0x310
  35. // These are registers associated with the local APIC timer.
  36. #define APICTIMERINITIALCOUNT 0x380 // Loads initial count into timer and starts it running.
  37. #define APICTIMERCURRENTCOUNT 0x390 // Used to read the local APIC timer current count.
  38. #define APICTIMERDIVIDE 0x3e0 // Programs local APIC timer divisor (divide by 1, 2, 4 etc)
  39. // These are values that can be written into the local apic interrupt control
  40. // registers (APICSPURIOUS-APICERROR) to control what type of interrupt each of the
  41. // local interrupt sources generate.
  42. #define FIXED 0 // Maskable interrupt. Interrupt vector is specified.
  43. #define NMI 0x400 // Non maskable interrupt. Interrupt vector ignored. (Vector 2 always used).
  44. #define EXTINT 0x700 // Used ONLY for exteral maskable PIC controlled interrupts. (APICINTR)
  45. // This is a mask for the interrupt vector in the local apic interrupt control registers.
  46. #define VECTORMASK 0xff
  47. // These values are also written into the local apic interrupt control registers.
  48. // All of the local interrupt sources can be individually masked or unmasked in the local apic.
  49. #define MASKED 0x10000
  50. #define UNMASKED 0
  51. // The following values are used to program the mode of the local APIC timer.
  52. #define PERIODIC 0x20000
  53. #define ONESHOT 0
  54. // The following values are used to program the divisor used by the local APIC timer.
  55. #define DIVIDEBY1 0xb
  56. #define DIVIDEBY2 0x0
  57. #define DIVIDEBY4 0x1
  58. #define DIVIDEBY8 0x2
  59. #define SENDPENDING 0x1000
  60. #define ASSERTIRQ 0x4000
  61. // Local APIC globals.
  62. // This global contains the base virtual address of the local APIC.
  63. // The local APIC is memory mapped.
  64. extern CHAR *ApicBase;
  65. // These global variables point to their respective interrupt control registers.
  66. extern volatile ULONG *ApicPerfInterrupt;
  67. extern volatile ULONG *ApicTimerInterrupt;
  68. extern volatile ULONG *ApicNmiInterrupt;
  69. extern volatile ULONG *ApicIntrInterrupt;
  70. // These are the interrupt vectors for the local apic timer and performance counter
  71. // interrupt control registers. We use variables now instead of constants
  72. // for these, so that we keep using the same vector locations that the HALs which
  73. // support the local APIC initially program into the control registers.
  74. extern ULONG ApicTimerVector;
  75. extern ULONG ApicPerfVector;
  76. extern ULONG ApicErrorVector;
  77. extern ULONG ApicSpuriousVector;
  78. // Various local APIC related function prototypes.
  79. BOOL
  80. MachineHasAPIC (
  81. VOID
  82. );
  83. BOOL
  84. EnableAPIC (
  85. VOID
  86. );
  87. // Inline functions for reading and writing local APIC registers.
  88. #pragma LOCKED_CODE
  89. // __inline
  90. // ULONG
  91. // ReadAPIC (
  92. // ULONG offset
  93. // )
  94. //
  95. // /*++
  96. //
  97. // Function Description:
  98. //
  99. // Reads and returns the contents of the specified processor local APIC register.
  100. //
  101. // Arguments:
  102. //
  103. // offset - Supplies the offset from the base address of the local APIC of the register
  104. // to be read.
  105. //
  106. // Return Value:
  107. //
  108. // The value read from the specified local APIC register is returned.
  109. //
  110. // --*/
  111. __inline
  112. ULONG
  113. ReadAPIC (
  114. ULONG offset
  115. )
  116. {
  117. ASSERT( ApicBase );
  118. return *(ULONG *)(ApicBase+offset);
  119. }
  120. // __inline
  121. // VOID
  122. // WriteAPIC (
  123. // ULONG offset,
  124. // ULONG value
  125. // )
  126. //
  127. // /*++
  128. //
  129. // Function Description:
  130. //
  131. // Writes the processor local apic register at the specified offset from the local
  132. // APIC base address, with the specifed value.
  133. //
  134. // Arguments:
  135. //
  136. // offset - Supplies the offset from the base address of the local APIC of the register
  137. // to be written.
  138. //
  139. // value - Supplies the value to be written into the local APIC register.
  140. //
  141. // Return Value:
  142. //
  143. // None.
  144. //
  145. // --*/
  146. __inline
  147. VOID
  148. WriteAPIC (
  149. ULONG offset,
  150. ULONG value
  151. )
  152. {
  153. ASSERT( ApicBase );
  154. *(ULONG *)(ApicBase+offset)=value;
  155. }
  156. #pragma PAGEABLE_CODE