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239 lines
5.3 KiB
239 lines
5.3 KiB
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/*++
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Copyright (c) 1999-2001 Microsoft Corporation. All Rights Reserved.
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Module Name:
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apic.h
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Abstract:
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This module contains private x86 processor local APIC defines, variables, inline
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functions and prototypes.
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Author:
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Joseph Ballantyne
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Environment:
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Kernel Mode
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Revision History:
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--*/
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// Local APIC defines.
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// APIC register address offsets from the APICBASE.
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// These are offsets to registers used to control local interrupt sources for the processor.
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// The local APIC timer is built into the local APIC on the processor itself and is
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// separate from other timers on the motherboard.
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#define APICSPURIOUS 0xf0 // Spurious interrupt
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#define APICTIMER 0x320 // Local APIC timer interrupt (maskable only)
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#define APICPERF 0x340 // Performance counter interrupt (NMI or maskable)
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#define APICINTR 0x350 // External interrupt 1 (normally connected to external maskable interrupts)
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#define APICNMI 0x360 // External interrupt 2 (normally connected to external NMI)
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#define APICERROR 0x370 // Local APIC error interrupt.
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// These are assorted additional registers in the local APIC.
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#define APICID 0x20
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#define APICVERSION 0x30
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#define APICTPR 0x80
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#define APICAPR 0x90
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#define APICPPR 0xa0
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#define APICEOI 0xb0 // Used to EOI maskable interrupt sources.
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#define APICSTATUS 0x280
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#define APICICRLOW 0x300 // Used to generate interrupts on the local APIC bus under software control.
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#define APICICRHIGH 0x310
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// These are registers associated with the local APIC timer.
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#define APICTIMERINITIALCOUNT 0x380 // Loads initial count into timer and starts it running.
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#define APICTIMERCURRENTCOUNT 0x390 // Used to read the local APIC timer current count.
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#define APICTIMERDIVIDE 0x3e0 // Programs local APIC timer divisor (divide by 1, 2, 4 etc)
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// These are values that can be written into the local apic interrupt control
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// registers (APICSPURIOUS-APICERROR) to control what type of interrupt each of the
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// local interrupt sources generate.
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#define FIXED 0 // Maskable interrupt. Interrupt vector is specified.
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#define NMI 0x400 // Non maskable interrupt. Interrupt vector ignored. (Vector 2 always used).
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#define EXTINT 0x700 // Used ONLY for exteral maskable PIC controlled interrupts. (APICINTR)
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// This is a mask for the interrupt vector in the local apic interrupt control registers.
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#define VECTORMASK 0xff
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// These values are also written into the local apic interrupt control registers.
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// All of the local interrupt sources can be individually masked or unmasked in the local apic.
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#define MASKED 0x10000
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#define UNMASKED 0
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// The following values are used to program the mode of the local APIC timer.
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#define PERIODIC 0x20000
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#define ONESHOT 0
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// The following values are used to program the divisor used by the local APIC timer.
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#define DIVIDEBY1 0xb
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#define DIVIDEBY2 0x0
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#define DIVIDEBY4 0x1
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#define DIVIDEBY8 0x2
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#define SENDPENDING 0x1000
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#define ASSERTIRQ 0x4000
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// Local APIC globals.
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// This global contains the base virtual address of the local APIC.
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// The local APIC is memory mapped.
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extern CHAR *ApicBase;
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// These global variables point to their respective interrupt control registers.
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extern volatile ULONG *ApicPerfInterrupt;
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extern volatile ULONG *ApicTimerInterrupt;
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extern volatile ULONG *ApicNmiInterrupt;
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extern volatile ULONG *ApicIntrInterrupt;
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// These are the interrupt vectors for the local apic timer and performance counter
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// interrupt control registers. We use variables now instead of constants
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// for these, so that we keep using the same vector locations that the HALs which
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// support the local APIC initially program into the control registers.
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extern ULONG ApicTimerVector;
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extern ULONG ApicPerfVector;
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extern ULONG ApicErrorVector;
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extern ULONG ApicSpuriousVector;
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// Various local APIC related function prototypes.
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BOOL
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MachineHasAPIC (
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VOID
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);
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BOOL
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EnableAPIC (
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VOID
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);
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// Inline functions for reading and writing local APIC registers.
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#pragma LOCKED_CODE
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// __inline
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// ULONG
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// ReadAPIC (
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// ULONG offset
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// )
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//
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// /*++
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//
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// Function Description:
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//
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// Reads and returns the contents of the specified processor local APIC register.
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//
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// Arguments:
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//
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// offset - Supplies the offset from the base address of the local APIC of the register
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// to be read.
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//
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// Return Value:
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//
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// The value read from the specified local APIC register is returned.
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//
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// --*/
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__inline
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ULONG
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ReadAPIC (
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ULONG offset
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)
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{
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ASSERT( ApicBase );
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return *(ULONG *)(ApicBase+offset);
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}
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// __inline
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// VOID
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// WriteAPIC (
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// ULONG offset,
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// ULONG value
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// )
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//
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// /*++
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//
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// Function Description:
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//
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// Writes the processor local apic register at the specified offset from the local
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// APIC base address, with the specifed value.
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//
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// Arguments:
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//
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// offset - Supplies the offset from the base address of the local APIC of the register
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// to be written.
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//
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// value - Supplies the value to be written into the local APIC register.
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//
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// Return Value:
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//
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// None.
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//
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// --*/
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__inline
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VOID
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WriteAPIC (
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ULONG offset,
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ULONG value
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)
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{
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ASSERT( ApicBase );
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*(ULONG *)(ApicBase+offset)=value;
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}
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#pragma PAGEABLE_CODE
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