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158 lines
3.9 KiB
158 lines
3.9 KiB
/*++
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Copyright (c) 1993 Weitek Corporation
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Module Name:
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pci.h
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Abstract:
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This module contains PCI definitions for the Weitek P9 miniport
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device driver.
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Environment:
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Kernel mode
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Revision History may be found at the end of this file.
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--*/
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//
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// Local function prototypes defined in PCI.C.
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//
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BOOLEAN
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PciFindDevice(
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IN PHW_DEVICE_EXTENSION HwDeviceExtension,
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IN USHORT usDeviceId,
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IN USHORT usVendorId,
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IN OUT PULONG pulSlotNum
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);
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//
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// Externals used by the PCI routines.
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//
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extern VIDEO_ACCESS_RANGE VLDefDACRegRange[];
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#if 0
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//
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// Define P9 register/frame buffer addresses using the OEM's default
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// base address.
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//
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#define MemBase 0xA0000000
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#endif
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//
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// Bit to write to the sequencer control register to enable/disable P9
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// video output.
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//
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#define P9_VIDEO_ENB 0x10
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#define P9_VIDEO_DIS ~P9_VIDEO_ENB
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//
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// Define the bit in the sequencer control register which determines
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// the sync polarities. For Weitek board, 1 = positive.
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//
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#define HSYNC_POL_MASK 0x20
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#define POL_MASK HSYNC_POL_MASK
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#define VIPER_HSYNC_POL_MASK 0x40
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#define VIPER_VSYNC_POL_MASK 0x80
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//
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// Defines which are specific to the Weitek PCI Implementation.
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//
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#define WTK_VENDOR_ID (USHORT) 0x100E
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#define WTK_9001_ID (USHORT) 0x9001
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#define WTK_9002_ID (USHORT) 0x9002
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#define P9001_IO_RANGE 0x1000 // 4K worth of IO ports.
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#define WTK_9100_ID (USHORT) 0x9100
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//
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// Weitek P9001 specific configuration space registers.
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//
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#define P9001_CMD_REG 0x04
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#define P9001_REV_ID 0x08
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#define P9001_BASE_ADDR 0x10
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#define P9001_REG_BASE 0x14
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#define P9001_BIOS_BASE_ADDR 0x30
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#define WTK_VGA_PRESENT 0x300
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//
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// Weitek P9002 specific registers/definitions.
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//
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#define P9002_VGA_ID 0x30l
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#define OAK_VGA 1l
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#define TRIDENT_VGA 2l
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#define WTK_VGA 3l
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#define VGA_MSK 3l
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//
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// Viper PCI ID String to search for ROM BIOS.
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//
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#define VIPER_ID_STR "VIPER"
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#define BIOS_RANGE_LEN 0x8000
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//
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// Misc PCI definitions.
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//
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#define PCI_BIOS_ENB 0x01l // Bit def to enable the adapter BIOS
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#define PCI_BIOS_DIS ~PCI_BIOS_ENB // Bit def to disable the adapter BIOS
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#define P9001_IO_ENB 0x01 // Bit def to enable IO space
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#define P9001_MEM_ENB 0x02 // Bit def to enable mem space
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//
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// The following block defines the base address for each of the RS registers
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// defined in the Bt485 spec. The IO addresses given below are used to map
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// the DAC registers to a series of virtual addresses which are kept
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// in the device extension. OEMs should change these definitions as
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// appropriate for their implementation.
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//
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#define RS_0_PCI_9001_ADDR 0x03c8
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#define RS_1_PCI_9001_ADDR 0x03c9
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#define RS_2_PCI_9001_ADDR 0x03c6
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#define RS_3_PCI_9001_ADDR 0x03c7
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#define RS_4_PCI_9001_ADDR 0x0400
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#define RS_5_PCI_9001_ADDR 0x0401
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#define RS_6_PCI_9001_ADDR 0x0402
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#define RS_7_PCI_9001_ADDR 0x0403
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#define RS_8_PCI_9001_ADDR 0x0800
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#define RS_9_PCI_9001_ADDR 0x0801
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#define RS_A_PCI_9001_ADDR 0x0802
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#define RS_B_PCI_9001_ADDR 0x0803
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#define RS_C_PCI_9001_ADDR 0x0C00
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#define RS_D_PCI_9001_ADDR 0x0C01
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#define RS_E_PCI_9001_ADDR 0x0C02
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#define RS_F_PCI_9001_ADDR 0x0C03
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#define RS_0_PCI_9002_ADDR 0x03c8
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#define RS_1_PCI_9002_ADDR 0x03c9
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#define RS_2_PCI_9002_ADDR 0x03c6
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#define RS_3_PCI_9002_ADDR 0x03c7
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#define RS_4_PCI_9002_ADDR 0x0040
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#define RS_5_PCI_9002_ADDR 0x0041
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#define RS_6_PCI_9002_ADDR 0x0042
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#define RS_7_PCI_9002_ADDR 0x0043
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#define RS_8_PCI_9002_ADDR 0x0080
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#define RS_9_PCI_9002_ADDR 0x0081
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#define RS_A_PCI_9002_ADDR 0x0082
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#define RS_B_PCI_9002_ADDR 0x0083
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#define RS_C_PCI_9002_ADDR 0x00C0
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#define RS_D_PCI_9002_ADDR 0x00C1
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#define RS_E_PCI_9002_ADDR 0x00C2
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#define RS_F_PCI_9002_ADDR 0x00C3
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